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1. 发明授权

US07204104B2 Damper of drum type washing machine 失效
标题翻译：滚筒式洗衣机阻尼器
公开(公告)号：US07204104B2
公开(公告)日：2007-04-17
申请号：US10755139
申请日：2004-01-12
申请人： Young-Ho Kim , Joon-Woo Kim , Dong-Won Kim , Seung-Chul Park , Si -Moon Jeon , Gwan-Ryong Park
发明人： Young-Ho Kim , Joon-Woo Kim , Dong-Won Kim , Seung-Chul Park , Si -Moon Jeon , Gwan-Ryong Park
IPC分类号： D06F37/20
CPC分类号： D06F37/20
摘要： A damper includes: a cylinder: a piston rod inserted to be movable linearly in the cylinder; a guide member provided with a coupling hole to which an insertion portion of the rod member is coupled at a center thereof, and provided with first and second grooves at an outer circumferential surface thereof; a fixed damping member fitted into the first groove and adhered to an inner surface of the cylinder; and a movable damping member up and down movably fitted into the second groove and selectively adhered to the inner surface of the cylinder.
摘要翻译：阻尼器包括：气缸：插入以在气缸中可线性移动的活塞杆; 引导构件，其具有联接孔，所述杆构件的插入部分在其中心处联接到所述联接孔，并且在其外周表面处设置有第一和第二槽; 固定的阻尼构件，其配合到所述第一槽中并且粘附到所述气缸的内表面; 以及可移动地可移动地装配到第二槽中并且选择性地粘附到气缸的内表面的可动阻尼构件。

2. 发明授权

US07086254B2 Direct-drive washing machine 失效
公开(公告)号：US07086254B2
公开(公告)日：2006-08-08
申请号：US10171547
申请日：2002-06-17
申请人： Hee-Tae Lim , Dong-Won Kim , Seung-Chul Park , Bo-Yung Chang
发明人： Hee-Tae Lim , Dong-Won Kim , Seung-Chul Park , Bo-Yung Chang
IPC分类号： D06F37/30 , F16D11/04
CPC分类号： D06F37/40
摘要： Disclosed is a direct-drive washing machine enabling to revolve a pulsator only or both of the pulsator and inner tub in accordance with a load condition such as a laundry quantity, a washing water quantity, etc, a fabric condition, and the like so as to realize an optimal washing condition as well as improve a washing efficiency. The present invention includes a first rotating shaft connected directly between the drive motor and pulsator so as to transfer a drive power of the drive motor to the pulsator directly, a second rotating shaft installed between the drive motor and inner tub separately so as to transfer the drive power of the drive motor to the inner tub selectively, a clutch installed between the second rotating shaft and drive motor so as to connect or cut off the drive power transferred from the drive motor to the inner tub, and a clutch operating device actuating the clutch.

3. 发明授权

US09003675B2 Fuel preprocess system for coal combustion boiler 有权
标题翻译：燃煤锅炉燃料预处理系统
公开(公告)号：US09003675B2
公开(公告)日：2015-04-14
申请号：US13090891
申请日：2011-04-20
申请人： Dong-Won Kim , Jong-Min Lee , Young-Joo Kim , Jae-Sung Kim
发明人： Dong-Won Kim , Jong-Min Lee , Young-Joo Kim , Jae-Sung Kim
IPC分类号： F26B19/00 , F23G5/04 , F23G5/027 , F23G5/50 , F23G7/10 , F26B3/08
CPC分类号： F23G5/04 , C10L5/442 , C10L5/46 , C10L9/083 , C10L2290/02 , C10L2290/06 , C10L2290/08 , C10L2290/54 , F23G5/0276 , F23G5/50 , F23G7/10 , F23G2201/303 , F23G2201/50 , F23G2201/60 , F23G2206/10 , F23L2900/15043 , F26B3/08 , F26B2200/02 , Y02E50/10 , Y02E50/15 , Y02E50/30
摘要： A fuel preprocess system for a coal combustion boiler is disclosed. The fuel preprocess system for a coal combustion boiler that dries biomass or refuse-derived fuel in accordance with the present invention can include: a dryer configured to dry the biomass or refuse-derived fuel by use of flue gas generated after combustion in the boiler; and a torrefier configured to devolatilize a fibrous component contained in the dried fuel from the fuel dried in the dryer by use of primary air that is heat-exchanged after the combustion in the boiler.
摘要翻译：公开了一种用于燃煤锅炉的燃料预处理系统。用于根据本发明干燥生物质或垃圾衍生燃料的燃煤锅炉的燃料预处理系统可以包括：干燥器，其构造成通过使用在锅炉中燃烧后产生的烟道来干燥生物质或垃圾衍生燃料; 以及构造成通过使用在锅炉中燃烧之后进行热交换的一次空气从在干燥机中干燥的燃料脱挥发干燥燃料中所含的纤维成分的蒸锅。

4. 发明授权

US08519484B2 Semiconductor devices having dual trench, methods of fabricating the same, and electronic system having the same 有权
标题翻译：具有双沟槽的半导体器件及其制造方法以及具有该半导体器件的电子系统
公开(公告)号：US08519484B2
公开(公告)日：2013-08-27
申请号：US13368556
申请日：2012-02-08
申请人： Dong-Won Kim , Jae-Hwang Sim , Keon-Soo Kim , Young-Ho Lee
发明人： Dong-Won Kim , Jae-Hwang Sim , Keon-Soo Kim , Young-Ho Lee
IPC分类号： H01L21/70
CPC分类号： H01L21/76229
摘要： A semiconductor device having a dual trench and methods of fabricating the same, a semiconductor module, an electronic circuit board, and an electronic system are provided. The semiconductor device includes a semiconductor substrate having a cell region including a cell trench and a peripheral region including a peripheral trench. The cell trench is filled with a core insulating material layer, and the peripheral trench is filled with a padding insulating material layer conformably formed on an inner surface thereof and a core insulating material layer formed on an inner surface of the padding insulating material layer. The core insulating material layer has a greater fluidity than the padding insulating material layer.
摘要翻译：提供具有双沟槽的半导体器件及其制造方法，半导体模块，电子电路板和电子系统。半导体器件包括具有包括单元沟道的单元区域和包括外围沟槽的周边区域的半导体衬底。电池沟槽填充有芯绝缘材料层，并且周边沟槽填充有在内表面上顺应地形成的填充绝缘材料层和形成在填充绝缘材料层的内表面上的芯绝缘材料层。芯绝缘材料层具有比填充绝缘材料层更大的流动性。

5. 发明授权

US08466511B2 Vertical channel fin field-effect transistors having increased source/drain contact area and methods for fabricating the same 有权
标题翻译：具有增加的源/漏接触面积的垂直沟道鳍场效应晶体管及其制造方法
公开(公告)号：US08466511B2
公开(公告)日：2013-06-18
申请号：US12613025
申请日：2009-11-05
申请人： Chang-Woo Oh , Dong-Gun Park , Sung-Young Lee , Jeong-Dong Choe , Dong-Won Kim
发明人： Chang-Woo Oh , Dong-Gun Park , Sung-Young Lee , Jeong-Dong Choe , Dong-Won Kim
IPC分类号： H01L29/78
CPC分类号： H01L29/785 , H01L29/66818 , H01L29/78618
摘要： A fin field-effect transistor (FinFET) device includes a fin-shaped active region having first and second source/drain regions therein and a channel region therebetween vertically protruding from a semiconductor substrate. A gate electrode is formed on an upper surface and sidewalls of the channel region. First and second source/drain contacts are formed on respective upper surfaces and sidewalls of the first and second source/drain regions of the fin-shaped active region at opposite sides of the gate electrode. The channel region may be narrower than the first and second source/drain regions of the fin-shaped active region.
摘要翻译：翅片场效应晶体管（FinFET）器件包括其中具有第一和第二源极/漏极区域的鳍状有源区域以及从半导体衬底垂直突出的沟道区域。栅电极形成在沟道区的上表面和侧壁上。第一和第二源极/漏极触点形成在栅极电极的相对侧的鳍状有源区域的第一和第二源极/漏极区域的相应上表面和侧壁上。沟道区域可以比鳍状有源区域的第一和第二源极/漏极区域窄。

6. 发明申请

US20120238067A1 Methods of Fabricating Semiconductor Devices Having Gate Trenches 审中-公开
标题翻译：制造具有栅极沟槽的半导体器件的方法
公开(公告)号：US20120238067A1
公开(公告)日：2012-09-20
申请号：US13422223
申请日：2012-03-16
申请人： Won-Cheol Jeong , Yun-Young Yeoh , Dong-Won Kim , Hong-Bae Park , Hag-Ju Cho
发明人： Won-Cheol Jeong , Yun-Young Yeoh , Dong-Won Kim , Hong-Bae Park , Hag-Ju Cho
IPC分类号： H01L21/336
CPC分类号： H01L29/66545 , H01L29/4966 , H01L29/517 , H01L29/78
摘要： Methods of fabricating semiconductor devices including providing a substrate having a channel region defined therein; forming an insulation layer on the substrate; forming a gate trench for forming a gate electrode having a sidewall portion, a bottom portion and an edge portion between the sidewall portion and the bottom portion on the insulation layer, the gate electrode trench overlapping the channel region; and forming a gate electrode in the gate electrode trench. Forming the gate electrode includes forming a first metal layer pattern in the gate electrode trench and forming a second metal layer pattern on the first metal layer pattern.
摘要翻译：制造半导体器件的方法包括提供其中限定有沟道区的衬底; 在所述基板上形成绝缘层; 形成用于形成具有侧壁部分，底部和所述侧壁部分与所述绝缘层上的所述底部之间的边缘部分的栅电极的栅极沟槽，所述栅电极沟槽与所述沟道区重叠; 以及在所述栅电极沟槽中形成栅电极。形成栅电极包括在栅电极沟槽中形成第一金属层图案，并在第一金属层图案上形成第二金属层图案。

7. 发明授权

US08129238B2 Semiconductor devices having dual trench, methods of fabricating the same, and electronic system having the same 有权
标题翻译：具有双沟槽的半导体器件及其制造方法以及具有该半导体器件的电子系统
公开(公告)号：US08129238B2
公开(公告)日：2012-03-06
申请号：US12951490
申请日：2010-11-22
申请人： Dong-Won Kim , Jae-Hwang Sim , Keon-Soo Kim , Young-Ho Lee
发明人： Dong-Won Kim , Jae-Hwang Sim , Keon-Soo Kim , Young-Ho Lee
IPC分类号： H01L21/8242
CPC分类号： H01L21/76229
摘要： A semiconductor device having a dual trench and methods of fabricating the same, a semiconductor module, an electronic circuit board, and an electronic system are provided. The semiconductor device includes a semiconductor substrate having a cell region including a cell trench and a peripheral region including a peripheral trench. The cell trench is filled with a core insulating material layer, and the peripheral trench is filled with a padding insulating material layer conformably formed on an inner surface thereof and a core insulating material layer formed on an inner surface of the padding insulating material layer. The core insulating material layer has a greater fluidity than the padding insulating material layer.
摘要翻译：提供具有双沟槽的半导体器件及其制造方法，半导体模块，电子电路板和电子系统。半导体器件包括具有包括单元沟道的单元区域和包括外围沟槽的周边区域的半导体衬底。电池沟槽填充有芯绝缘材料层，并且周边沟槽填充有在内表面上顺应地形成的填充绝缘材料层和形成在填充绝缘材料层的内表面上的芯绝缘材料层。芯绝缘材料层具有比填充绝缘材料层更大的流动性。

8. 发明申请

US20110165757A1 SEMICONDUCTOR DEVICES HAVING DUAL TRENCH, METHODS OF FABRICATING THE SAME, AND ELECTRONIC SYSTEM HAVING THE SAME 有权
标题翻译：具有双重TRENCH的半导体器件，其制造方法以及具有其的电子系统
公开(公告)号：US20110165757A1
公开(公告)日：2011-07-07
申请号：US12951490
申请日：2010-11-22
申请人： Dong-Won Kim , Jae-Hwang Sim , Keon-Soo Kim , Young-Ho Lee
发明人： Dong-Won Kim , Jae-Hwang Sim , Keon-Soo Kim , Young-Ho Lee
IPC分类号： H01L21/762
CPC分类号： H01L21/76229
摘要： A semiconductor device having a dual trench and methods of fabricating the same, a semiconductor module, an electronic circuit board, and an electronic system are provided. The semiconductor device includes a semiconductor substrate having a cell region including a cell trench and a peripheral region including a peripheral trench. The cell trench is filled with a core insulating material layer, and the peripheral trench is filled with a padding insulating material layer conformably formed on an inner surface thereof and a core insulating material layer formed on an inner surface of the padding insulating material layer. The core insulating material layer has a greater fluidity than the padding insulating material layer.
摘要翻译：提供具有双沟槽的半导体器件及其制造方法，半导体模块，电子电路板和电子系统。半导体器件包括具有包括单元沟道的单元区域和包括外围沟槽的周边区域的半导体衬底。电池沟槽填充有芯绝缘材料层，并且周边沟槽填充有在内表面上顺应地形成的填充绝缘材料层和形成在填充绝缘材料层的内表面上的芯绝缘材料层。芯绝缘材料层具有比填充绝缘材料层更大的流动性。

9. 发明授权

US07947558B2 Electromechanical memory devices and methods of manufacturing the same 有权
标题翻译：机电存储器件及其制造方法
公开(公告)号：US07947558B2
公开(公告)日：2011-05-24
申请号：US12720276
申请日：2010-03-09
申请人： Eunjung Yun , Sung-Young Lee , Dong-Won Kim
发明人： Eunjung Yun , Sung-Young Lee , Dong-Won Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/10 , H01L2924/0002 , H01L2924/00
摘要： In a memory device and a method of forming the same, in one embodiment, the memory device comprises a first word line structure on a substrate, the first word line structure extending in a first direction. A bit line is provided over the first word line structure and spaced apart from the first word line by a first gap, the bit line extending in a second direction transverse to the first direction. A second word line structure is provided over the bit line and spaced apart from the bit line by a second gap, the second word line structure extending in the first direction. The bit line is suspended between the first word line structure and the second word line structure such that the bit line deflects to be electrically coupled with a top portion of the first word line structure through the first gap in a first bent position and deflects to be electrically coupled with a bottom portion of the second word line structure through the second gap in a second bent position, and is isolated from the first word line structure and the second word line structure in a rest position.
摘要翻译：在一种存储器件及其形成方法中，在一个实施例中，存储器件包括在衬底上的第一字线结构，第一字线结构沿第一方向延伸。位线设置在第一字线结构之上并且与第一字线间隔开第一间隙，位线沿横向于第一方向的第二方向延伸。第二字线结构设置在位线上并与位线间隔第二间隙，第二字线结构沿第一方向延伸。位线悬挂在第一字线结构和第二字线结构之间，使得位线在第一弯曲位置通过第一间隙偏转以与第一字线结构的顶部电耦合，并且偏转为在第二弯曲位置通过第二间隙与第二字线结构的底部电耦合，并且在静止位置与第一字线结构和第二字线结构隔离。

10. 发明申请

US20100314604A1 Gate-all-around type semiconductor device and method of manufacturing the same 有权
标题翻译：栅极全周型半导体器件及其制造方法
公开(公告)号：US20100314604A1
公开(公告)日：2010-12-16
申请号：US12805776
申请日：2010-08-19
申请人： Sung-Dae Suk , Dong-Won Kim , Kyoung-Hwan Yeo
发明人： Sung-Dae Suk , Dong-Won Kim , Kyoung-Hwan Yeo
IPC分类号： H01L29/775
CPC分类号： H01L29/78696 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/42392
摘要： The gate-all-around (GAA) type semiconductor device may include source/drain layers, a nanowire channel, a gate electrode and an insulation layer pattern. The source/drain layers may be disposed at a distance in a first direction on a semiconductor substrate. The nanowire channel may connect the source/drain layers. The gate electrode may extend in a second direction substantially perpendicular to the first direction. The gate electrode may have a height in a third direction substantially perpendicular to the first and second directions and may partially surround the nanowire channel. The insulation layer pattern may be formed between and around the source/drain layers on the semiconductor substrate and may cover the nanowire channel and a portion of the gate electrode. Thus, a size of the gate electrode may be reduced, and/or a gate induced drain leakage (GIDL) and/or a gate leakage current may be reduced.
摘要翻译：栅极全能（GAA）型半导体器件可以包括源极/漏极层，纳米线沟道，栅电极和绝缘层图案。源极/漏极层可以在半导体衬底上沿第一方向设置一定距离。纳米线通道可以连接源极/漏极层。栅电极可以在基本上垂直于第一方向的第二方向上延伸。栅电极可以具有基本上垂直于第一和第二方向的第三方向的高度，并且可以部分地包围纳米线通道。绝缘层图案可以形成在半导体衬底上的源极/漏极层之间和周围，并且可以覆盖纳米线沟道和栅电极的一部分。因此，可以减小栅电极的尺寸，和/或栅极感应漏极泄漏（GIDL）和/或栅极泄漏电流可能降低。

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