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1. 发明授权

US5740065A Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5740065A
公开(公告)日：1998-04-14
申请号：US449853
申请日：1995-05-24
申请人： Young-Chul Jang , Hyo-Seok Choi , Dong-Heui Jang , Sun-Yong Lee
发明人： Young-Chul Jang , Hyo-Seok Choi , Dong-Heui Jang , Sun-Yong Lee
IPC分类号： H01L21/02 , G03F7/20 , G03F9/00 , H01L21/68 , G01B11/26 , G06F17/18
CPC分类号： G03F7/70633 , G03F9/7046
摘要： A method for manufacturing a semiconductor device comprises the steps of extracting an optimal working condition by accumulatively averaging accumulated working conditions of lots previously performed in an expectation process to be currently performed in the manufacturing equipment, extracting a correction condition by extracting information for an alignment state of a lower layer performed by the expectation process, and setting the working condition by adding the correction condition to the optimal working condition.
摘要翻译：一种制造半导体器件的方法，包括以下步骤：通过对在制造设备中当前执行的预期处理中先前执行的批量的累积工作条件累积平均来提取最佳工作条件，通过提取校准状态的信息来提取校正条件通过预期处理执行的下层，并且通过将校正条件添加到最佳工作条件来设定工作条件。

2. 发明授权

US08034668B2 Method for forming semiconductor device having metallization comprising select lines, bit lines and word lines 失效
标题翻译：用于形成具有包括选择线，位线和字线的金属化的半导体器件的方法
公开(公告)号：US08034668B2
公开(公告)日：2011-10-11
申请号：US12588240
申请日：2009-10-08
申请人： Young-Chul Jang , Won-Seok Cho , Jae-Hoon Jang , Soon-Moon Jung , Yang-Soo Son , Min-Sung Song
发明人： Young-Chul Jang , Won-Seok Cho , Jae-Hoon Jang , Soon-Moon Jung , Yang-Soo Son , Min-Sung Song
IPC分类号： H01L21/76
CPC分类号： H01L27/0688 , H01L27/105 , H01L27/11519 , H01L27/11526 , H01L27/11529 , H01L27/11551
摘要： A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region.
摘要翻译：半导体器件包括：半导体衬底，包括具有单元区域的第一区域和具有外围电路区域的第二区域;半导体衬底上的第一晶体管;覆盖第一晶体管的第一保护层;第一保护层上的第一绝缘层; ，第一区域中的第一绝缘层上的半导体图案，半导体图案上的第二晶体管，覆盖第二晶体管的第二保护层，第二保护层的厚度大于第一保护层的厚度，第二绝缘层在第二保护层和第二区域的第一绝缘层上。

3. 发明授权

US07910433B2 Methods of fabricating multi-layer nonvolatile memory devices 有权
标题翻译：制造多层非易失性存储器件的方法
公开(公告)号：US07910433B2
公开(公告)日：2011-03-22
申请号：US12478538
申请日：2009-06-04
申请人： Young-Chul Jang , Ki-Nam Kim , Soon-Moon Jung , Jae-Hoon Jang
发明人： Young-Chul Jang , Ki-Nam Kim , Soon-Moon Jung , Jae-Hoon Jang
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/84
CPC分类号： H01L27/105 , H01L21/8221 , H01L27/0688 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11526 , H01L27/11529 , H01L27/11551
摘要： A nonvolatile memory device includes a semiconductor substrate having a first well region of a first conductivity type, and at least one semiconductor layer formed on the semiconductor substrate. A first cell array is formed on the semiconductor substrate, and a second cell array formed on the semiconductor layer. The semiconductor layer includes a second well region of the first conductivity type having a doping concentration greater than a doping concentration of the first well region of the first conductivity type. As the doping concentration of the second well region is increased, a resistance difference may be reduced between the first and second well regions.
摘要翻译：非易失性存储器件包括具有第一导电类型的第一阱区和形成在半导体衬底上的至少一个半导体层的半导体衬底。第一单元阵列形成在半导体衬底上，第二单元阵列形成在半导体层上。半导体层包括第一导电类型的第二阱区，其具有大于第一导电类型的第一阱区的掺杂浓度的掺杂浓度。随着第二阱区域的掺杂浓度增加，可以在第一和第二阱区域之间减小电阻差。

4. 发明授权

US07683404B2 Stacked memory and method for forming the same 有权
标题翻译：堆积记忆及其形成方法
公开(公告)号：US07683404B2
公开(公告)日：2010-03-23
申请号：US11709234
申请日：2007-02-22
申请人： Young-Chul Jang , Won-Seok Cho , Jae-Hoon Jang , Soon-Moon Jung , Hoo-Sung Cho , Jong-Hyuk Kim
发明人： Young-Chul Jang , Won-Seok Cho , Jae-Hoon Jang , Soon-Moon Jung , Hoo-Sung Cho , Jong-Hyuk Kim
IPC分类号： H01L25/065
CPC分类号： H01L21/8221 , H01L27/0688 , H01L27/105 , H01L27/11526 , H01L27/11529 , H01L27/11551
摘要： A stacked memory includes at least two semiconductor layers each including a memory cell array. A transistor is formed in a peripheral circuit region of an uppermost semiconductor layer of the at least two semiconductor layers. The transistor is used to operate the memory cell array.
摘要翻译：堆叠存储器包括至少两个半导体层，每个半导体层包括存储单元阵列。晶体管形成在至少两个半导体层的最上半导体层的外围电路区域中。晶体管用于操作存储单元阵列。

5. 发明申请

US20110163411A1 MULTI-LAYER MEMORY DEVICES 有权
标题翻译：多层存储器件
公开(公告)号：US20110163411A1
公开(公告)日：2011-07-07
申请号：US13049495
申请日：2011-03-16
申请人： Young-Chul Jang , Ki-Nam Kim , Soon-Moon Jung , Jae-Hoon Jang
发明人： Young-Chul Jang , Ki-Nam Kim , Soon-Moon Jung , Jae-Hoon Jang
IPC分类号： H01L27/08
CPC分类号： H01L27/105 , H01L21/8221 , H01L27/0688 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11526 , H01L27/11529 , H01L27/11551
摘要： A nonvolatile memory device includes a semiconductor substrate having a first well region of a first conductivity type, and at least one semiconductor layer formed on the semiconductor substrate. A first cell array is formed on the semiconductor substrate, and a second cell array formed on the semiconductor layer. The semiconductor layer includes a second well region of the first conductivity type having a doping concentration greater than a doping concentration of the first well region of the first conductivity type. As the doping concentration of the second well region is increased, a resistance difference may be reduced between the first and second well regions.
摘要翻译：非易失性存储器件包括具有第一导电类型的第一阱区和形成在半导体衬底上的至少一个半导体层的半导体衬底。第一单元阵列形成在半导体衬底上，第二单元阵列形成在半导体层上。半导体层包括第一导电类型的第二阱区，其具有大于第一导电类型的第一阱区的掺杂浓度的掺杂浓度。随着第二阱区域的掺杂浓度增加，可以在第一和第二阱区域之间减小电阻差。

6. 发明申请

US20080067517A1 Semiconductor device and method for forming the same 有权
标题翻译：半导体装置及其形成方法
公开(公告)号：US20080067517A1
公开(公告)日：2008-03-20
申请号：US11655115
申请日：2007-01-19
申请人： Young-Chul Jang , Won-Seok Cho , Jae-Hoon Jang , Soon-Moon Jung , Yang-Soo Son , Min-Sung Song
发明人： Young-Chul Jang , Won-Seok Cho , Jae-Hoon Jang , Soon-Moon Jung , Yang-Soo Son , Min-Sung Song
IPC分类号： H01L29/772 , H01L21/8234
CPC分类号： H01L27/0688 , H01L27/105 , H01L27/11519 , H01L27/11526 , H01L27/11529 , H01L27/11551
摘要： A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region.
摘要翻译：半导体器件包括：半导体衬底，包括具有单元区域的第一区域和具有外围电路区域的第二区域;半导体衬底上的第一晶体管;覆盖第一晶体管的第一保护层;第一保护层上的第一绝缘层; ，第一区域中的第一绝缘层上的半导体图案，半导体图案上的第二晶体管，覆盖第二晶体管的第二保护层，第二保护层的厚度大于第一保护层的厚度，第二绝缘层在第二保护层和第二区域的第一绝缘层上。

7. 发明申请

US20070181170A1 Apparatus including an improved nozzle unit 审中-公开
标题翻译：装置包括改进的喷嘴单元
公开(公告)号：US20070181170A1
公开(公告)日：2007-08-09
申请号：US11702612
申请日：2007-02-06
申请人： Kyoung-Ho Kim , Young-Chul Jang
发明人： Kyoung-Ho Kim , Young-Chul Jang
IPC分类号： B08B3/00 , B08B3/12 , B08B6/00
CPC分类号： H01L21/6715
摘要： An apparatus for supplying a solution to a substrate includes a nozzle unit. The nozzle unit may include at least one nozzle having a variable structure in which lateral portions of the at least one nozzle are bent toward a central portion of the at least one nozzle. Each nozzle of the nozzle unit may include a hinged connecting member disposed at the central portion of each of the nozzles. The hinge angles between lateral portions of each of the nozzles may vary during operation. Each of the nozzles may include a plurality of spray holes for uniformly providing a developing solution onto the photoresist film. Some of the plurality of holes positioned near the central portion of the nozzles may be substantially wider than some of the plurality of holes positioned near lateral portions of the nozzles.
摘要翻译：用于将溶液供给到基板的装置包括喷嘴单元。喷嘴单元可以包括具有可变结构的至少一个喷嘴，其中至少一个喷嘴的侧向部分朝向至少一个喷嘴的中心部分弯曲。喷嘴单元的每个喷嘴可以包括设置在每个喷嘴的中心部分处的铰接连接构件。每个喷嘴的横向部分之间的铰链角度可以在操作期间变化。每个喷嘴可以包括用于均匀地将显影溶液提供到光致抗蚀剂膜上的多个喷射孔。位于喷嘴的中心部分附近的多个孔中的一些孔可以比位于喷嘴的侧面部分附近的多个孔中的一些孔大得多。

8. 发明授权

US07170133B2 Transistor and method of fabricating the same 有权
标题翻译：晶体管及其制造方法
公开(公告)号：US07170133B2
公开(公告)日：2007-01-30
申请号：US10977036
申请日：2004-10-28
申请人： Young-Chul Jang , Won-Seok Cho , Soon-Moon Jung
发明人： Young-Chul Jang , Won-Seok Cho , Soon-Moon Jung
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/66787 , H01L21/76224 , H01L27/10876
摘要： A transistor and a method of fabricating the same: The transistor includes an isolation layer disposed in a semiconductor substrate to define an active region. A pair of source/drain regions is disposed in the active region, spaced apart from each other. A channel region is interposed between the pair of the source/drain regions. The active region has a mesa disposed across the channel region. The mesa extends to the source/drain regions. A gate electrode is disposed to cross the active region along the direction across the mesa.
摘要翻译：晶体管及其制造方法：晶体管包括设置在半导体衬底中以限定有源区的隔离层。一对源极/漏极区域设置在有源区域中，彼此间隔开。沟道区域插入在一对源极/漏极区域之间。有源区域具有穿过沟道区域设置的台面。台面延伸到源极/漏极区域。栅电极设置成跨过台面的方向跨越有源区。

9. 发明申请

US20050110074A1 Transistor and method of fabricating the same 有权
标题翻译：晶体管及其制造方法
公开(公告)号：US20050110074A1
公开(公告)日：2005-05-26
申请号：US10977036
申请日：2004-10-28
申请人： Young-Chul Jang , Won-Seok Cho , Soon-Moon Jung
发明人： Young-Chul Jang , Won-Seok Cho , Soon-Moon Jung
IPC分类号： H01L21/76 , H01L21/336 , H01L21/762 , H01L21/8242 , H01L29/76
CPC分类号： H01L29/66787 , H01L21/76224 , H01L27/10876
摘要： A transistor and a method of fabricating the same: The transistor includes an isolation layer disposed in a semiconductor substrate to define an active region. A pair of source/drain regions is disposed in the active region, spaced apart from each other. A channel region is interposed between the pair of the source/drain regions. The active region has a mesa disposed across the channel region. The mesa extends to the source/drain regions. A gate electrode is disposed to cross the active region along the direction across the mesa.
摘要翻译：晶体管及其制造方法：晶体管包括设置在半导体衬底中以限定有源区的隔离层。一对源极/漏极区域设置在有源区域中，彼此间隔开。沟道区域插入在一对源极/漏极区域之间。有源区域具有穿过沟道区域设置的台面。台面延伸到源极/漏极区域。栅电极设置成跨过台面的方向跨越有源区。

10. 发明授权

US08399308B2 Method for forming semiconductor device having metallization comprising select lines, bit lines and word lines 有权
标题翻译：用于形成具有包括选择线，位线和字线的金属化的半导体器件的方法
公开(公告)号：US08399308B2
公开(公告)日：2013-03-19
申请号：US13236000
申请日：2011-09-19
申请人： Young-Chul Jang , Won-Seok Cho , Jae-Hoon Jang , Soon-Moon Jung , Yang-Soo Son , Min-Sung Song
发明人： Young-Chul Jang , Won-Seok Cho , Jae-Hoon Jang , Soon-Moon Jung , Yang-Soo Son , Min-Sung Song
IPC分类号： H01L21/82
CPC分类号： H01L27/0688 , H01L27/105 , H01L27/11519 , H01L27/11526 , H01L27/11529 , H01L27/11551
摘要： A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region.
摘要翻译：半导体器件包括：半导体衬底，包括具有单元区域的第一区域和具有外围电路区域的第二区域;半导体衬底上的第一晶体管;覆盖第一晶体管的第一保护层;第一保护层上的第一绝缘层; ，第一区域中的第一绝缘层上的半导体图案，半导体图案上的第二晶体管，覆盖第二晶体管的第二保护层，第二保护层的厚度大于第一保护层的厚度，第二绝缘层在第二保护层和第二区域的第一绝缘层上。

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