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1. 发明申请

US20080093995A1 Ballast For High Intensity Discharge Lamps 审中-公开
标题翻译：高强度放电灯镇流器
公开(公告)号：US20080093995A1
公开(公告)日：2008-04-24
申请号：US11813064
申请日：2005-10-18
申请人： Young Jin Song
发明人： Young Jin Song
IPC分类号： H05B41/24
CPC分类号： H05B41/2885 , H05B41/2881 , Y02B20/202
摘要： A multi-lamp electronic ballast for a high intensity discharge lamp is provided. The multi-lamp electronic ballast includes a first igniter connected to the inverter unit to induce a high voltage from a current input from the inverter unit and to apply the high voltage to the first lamp and a second igniter having the one side end connected to the inverter unit and the other side end connected in parallel to a second lamp.
摘要翻译：提供了一种用于高强度放电灯的多灯电子镇流器。多灯电子镇流器包括连接到逆变器单元的第一点火器，以从来自逆变器单元的电流输入引起高电压并将高电压施加到第一灯，以及第二点火器，其一侧端连接到逆变器单元，另一侧端与第二灯并联连接。

2. 发明授权

US5882534A Method for fabricating a multistage phase shift mask 失效
标题翻译：制造多级相移掩模的方法
公开(公告)号：US5882534A
公开(公告)日：1999-03-16
申请号：US443398
申请日：1995-05-17
申请人： Young Jin Song
发明人： Young Jin Song
IPC分类号： G03F1/28 , G03F1/30 , H01L21/027 , G03F1/00
CPC分类号： G03F1/28 , G03F1/30
摘要： A multistage phase shift mask includes a light transmissive substrate having light shielding regions and light transmissive regions. A shielding layer is disposed on the shielding regions of the substrate and a phase shifter layer extends over the light transmissive regions between a pair of the shielding regions. A first etched portion on the substrate is adjacent to the phase shifter layer that contacts with the substrate and a second etched portion on the substrate is between the phase shifter layer and the first etched portion of the substrate.The second etched portion consists of a gradual concave slope allowing a phase shift from approximately 0 to 180 degrees.
摘要翻译：多级相移掩模包括具有遮光区域和透光区域的透光基板。屏蔽层设置在衬底的屏蔽区域上，并且移相器层在一对屏蔽区域之间的透光区域上延伸。衬底上的第一蚀刻部分与与衬底接触的移相器层相邻，衬底上的第二蚀刻部分位于衬底的移相器层和第一蚀刻部分之间。第二蚀刻部分由允许相位从大约0到180度的渐变凹斜面组成。

3. 发明授权

US5869375A Transistor fabrication method 失效
标题翻译：晶体管制造方法
公开(公告)号：US5869375A
公开(公告)日：1999-02-09
申请号：US796038
申请日：1997-02-05
申请人： Jong-Moon Choi , Young Jin Song , Chang Reol Kim
发明人： Jong-Moon Choi , Young Jin Song , Chang Reol Kim
IPC分类号： H01L29/78 , H01L21/336 , H01L29/423 , H01L29/739
CPC分类号： H01L29/78 , H01L29/66628
摘要： A method for fabricating a transistor includes the steps of forming a gate insulation film on a substrate, forming a gate electrode on the gate insulation film and forming a first insulation film pattern on the gate electrode. A side wall spacer is formed at side surfaces of the first insulation film pattern and the gate electrode. The gate insulation film is etched to expose a portion of a surface of the substrate. An epitaxial layer is formed on the substrate where the gate insulation film is etched. The side wall spacer is removed and a thermal oxide film is grown on a portion corresponding to where the side wall spacer is removed and on an upper portion of the epitaxial layer. A source/drain region is formed by ion-implanting an impurity into the epitaxial layer.
摘要翻译：一种制造晶体管的方法包括以下步骤：在衬底上形成栅极绝缘膜，在栅极绝缘膜上形成栅电极，并在栅电极上形成第一绝缘膜图案。在第一绝缘膜图案和栅电极的侧表面处形成侧壁间隔物。蚀刻栅极绝缘膜以暴露基板表面的一部分。在栅极绝缘膜被蚀刻的基板上形成外延层。除去侧壁间隔物，并且在与去除侧壁间隔物的部分相对应的部分上和在外延层的上部上生长热氧化膜。通过将杂质离子注入到外延层中形成源/漏区。

4. 发明授权

US5700626A Method for forming multi-layer resist pattern 失效
标题翻译：形成多层抗蚀剂图案的方法
公开(公告)号：US5700626A
公开(公告)日：1997-12-23
申请号：US673476
申请日：1996-07-01
申请人： Jun Seok Lee , Hun Hur , Young Jin Song
发明人： Jun Seok Lee , Hun Hur , Young Jin Song
IPC分类号： G03F7/26 , G03F7/00 , G03F7/09 , H01L21/027 , H01L21/30
CPC分类号： G03F7/094 , G03F7/0035 , Y10S430/143 , Y10S438/949 , Y10S438/95
摘要： A method for forming a multi-layer resist (MLR) pattern capable of preventing a generation of a charge-up effect in an exposure to electron beams and reducing alignment detect errors, and employing a silylation process, thereby achieving an improvement in resonance. The method includes the steps of forming a primary alignment mark on a silicon substrate formed with a cell part including a plurality of cell patterns having steps, depositing a lower deposition film over the silicon substrate, coating a lower resist film over the lower deposition film, subjecting a portion of the lower resist film to a light exposure and a development to form a secondary alignment mark, forming an intermediate insulating layer over the lower resist film, coating an upper resist film over the intermediate insulating layer to form a MLR film, subjecting the upper resist film to a light exposure to fork a latent image pattern at a non-exposed portion of the upper resist film, subjecting the resulting structure to a silylation to form a silylated layer over the upper resist film, etching the upper resist film to form an upper resist pattern and removing the silylated layer, patterning the intermediate insulating layer by use of the upper resist pattern as a mask, and etching the lower resist film by use of the intermediate insulating layer as a mask, thereby forming a MLR pattern.
摘要翻译：一种用于形成能够防止在电子束曝光中产生电荷效应并降低取向检测误差的多层抗蚀剂（MLR）图案的方法，并且采用甲硅烷化处理，从而实现共振的改善。该方法包括以下步骤：在形成有包括多个单元图案的单元部分的硅衬底上形成主对准标记，该步骤包括在硅衬底上沉积下沉积膜，在下沉积膜上涂覆下抗蚀膜，使下部抗蚀剂膜的一部分曝光和显影以形成二次对准标记，在下部抗蚀剂膜上形成中间绝缘层，在中间绝缘层上涂覆上部抗蚀剂膜以形成MLR膜，上抗蚀剂膜曝光以在上抗蚀剂膜的未曝光部分处分散潜像图案，使所得结构进行甲硅烷基化以在上抗蚀剂膜上形成甲硅烷基化层，将上抗蚀剂膜蚀刻至形成上抗蚀剂图案并除去甲硅烷基化层，通过使用上抗蚀剂图案作为掩模等将中间绝缘层图案化等通过使用中间绝缘层作为掩模来将下抗蚀剂膜铰接，由此形成MLR图案。

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