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    • 7. 发明授权
    • Solid state imaging device with four-phase charge-coupled device and method of manufacturing the same
    • 具有四相电荷耦合器件的固态成像器件及其制造方法
    • US06335220B1
    • 2002-01-01
    • US09479423
    • 2000-01-07
    • Yoshiyuki ShioyamaHidenori Shibata
    • Yoshiyuki ShioyamaHidenori Shibata
    • H01L2100
    • H01L27/14812
    • In a high density solid-state imaging device, of four charge transfer electrodes formed on a semiconductor substrate via a gate insulating film, a first electrode, a fourth electrode, and a part of a second electrode are made of a first conductive film, and a third electrode and the remaining portion of the second electrode are made of a second conductive film. In the second electrode, the first conductive film is joined to the second conductive film. An oxidation film formed by thermally oxidizing the first conductive film isolates the first electrode from the second electrode, the second electrode from the third electrode, and the third electrode from the fourth electrode. The end of the second conductive film is formed so as to locate on the oxidation film on the first conductive film.
    • 在高密度固态成像装置中,通过栅极绝缘膜形成在半导体衬底上的四个电荷转移电极,第一电极,第四电极和第二电极的一部分由第一导电膜制成,并且 第三电极,第二电极的剩余部分由第二导电膜制成。 在第二电极中,第一导电膜与第二导电膜接合。 通过热氧化第一导电膜形成的氧化膜将第一电极与第二电极隔离,第二电极与第三电极隔离,第三电极从第四电极隔离。 第二导电膜的端部形成为位于第一导电膜上的氧化膜上。
    • 8. 发明授权
    • Failure detection system, failure detection method, and computer program product
    • 故障检测系统,故障检测方法和计算机程序产品
    • US07043384B2
    • 2006-05-09
    • US10784819
    • 2004-02-24
    • Hiroshi MatsushitaKenichi KadotaYoshiyuki Shioyama
    • Hiroshi MatsushitaKenichi KadotaYoshiyuki Shioyama
    • G01R31/28G01R31/00
    • G11C29/006G01R31/01G11C29/56G11C2029/0403G11C2029/5604
    • A failure detection system includes a wafer test information input unit which acquires pass/fail maps for wafers for a plurality of types of semiconductor devices, displaying failure chip areas based on results of electrical tests performed on chips; an analogous test information input unit which classifies the electrical tests into analogous electrical tests with regard to analogous failures among the semiconductor devices; a subarea setting unit which assigns subareas common to the types of semiconductor devices on a wafer surface; a characteristic quantity calculation unit which statistically calculates characteristic quantities based on a number of the failure chip areas included in the subareas for each analogous electrical test; and a categorization unit which obtains correlation coefficients between the characteristic quantities corresponding to the subareas, and classifies clustering failure patterns of the failure chip areas into categories by comparing the correlation coefficients with a threshold.
    • 故障检测系统包括晶片测试信息输入单元,其获取多种类型的半导体器件的晶片的通过/失败映射,基于对芯片执行的电测试的结果显示故障芯片区域; 类似的测试信息输入单元,其将电测试分类为关于半导体器件中的类似故障的类似电测试; 子区域设定单元,其在晶片表面上分配与所述半导体器件的类型相同的子区域; 特征量计算单元,其基于每个类似电测试在所述子区域中包括的故障码片区域的数量来统计计算特征量; 以及分类单元,其获得与所述子区域相对应的特征量之间的相关系数,并且通过将所述相关系数与阈值进行比较来将所述故障码片区域的聚类故障模式分类。