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1. 发明申请

US20100141306A1 PARALLEL-SERIAL CONVERSION CIRCUIT AND DATA RECEIVING SYSTEM 有权
标题翻译：并行转换电路和数据接收系统
公开(公告)号：US20100141306A1
公开(公告)日：2010-06-10
申请号：US12620157
申请日：2009-11-17
申请人： Yoshiyasu DOI , Hirotaka Tamura
发明人： Yoshiyasu DOI , Hirotaka Tamura
IPC分类号： H03B19/00 , G06F1/04
CPC分类号： H03M9/00
摘要： A parallel-serial conversion circuit includes: a plurality of data terminals each receiving a data signal; a selection circuit configured to select at least one of the data signals received through the plurality of data terminals; a first latch circuit configured to latch an output from the selection circuit based on a clock signal; a replica selection circuit configured to select one of a plurality of signals and output the selected signal; and a timing-signal generating circuit configured to generate a timing signal for controlling the selection circuit based on the output from the replica selection circuit, wherein the output from the replica selection circuit is latched based on the clock signal.
摘要翻译：并行串行转换电路包括：多个数据终端，每个接收数据信号; 选择电路，被配置为选择通过所述多个数据终端接收的数据信号中的至少一个; 第一锁存电路，被配置为基于时钟信号来锁存来自所述选择电路的输出; 复制选择电路，被配置为选择多个信号中的一个并输出所选择的信号; 以及定时信号生成电路，被配置为基于来自所述副本选择电路的输出产生用于控制所述选择电路的定时信号，其中，所述副本选择电路的输出基于所述时钟信号被锁存。

2. 发明申请

US20120020399A1 RECEIVER CIRCUIT 有权
标题翻译：接收电路
公开(公告)号：US20120020399A1
公开(公告)日：2012-01-26
申请号：US13155485
申请日：2011-06-08
申请人： Yoshiyasu DOI
发明人： Yoshiyasu DOI
IPC分类号： H04B1/10
CPC分类号： H04L7/0331 , H04L25/069
摘要： A receiver circuit includes: a first sampling circuit to sample input data in synchronization with a first edge of a sampling clock signal; a second sampling circuit to sample the input data in synchronization with a second edge of the sampling clock signal; a duty-cycle-distortion detection circuit to detect a duty-cycle-distortion amount indicating an error in a duty ratio of the sampling clock signal based on first data which is sampled by the first sampling circuit and second data which is sampled by the second sampling circuit; a correction circuit to correct the first data or the second data to generate first corrected data or second corrected data, respectively, based on the duty-cycle-distortion amount; and a clock data recovery circuit to select data out of the first corrected data and the second data and to recover the selected data.
摘要翻译：接收机电路包括：第一采样电路，用于与采样时钟信号的第一边沿同步地采样输入数据; 第二采样电路，用于与采样时钟信号的第二边沿同步地采样输入数据; 占空比失真检测电路，用于基于由第一采样电路采样的第一数据和由第二采样电路采样的第二数据来检测指示采样时钟信号的占空比误差的占空比失真量; 采样电路; 校正电路，用于校正第一数据或第二数据，以分别基于占空比失真量产生第一校正数据或第二校正数据; 以及时钟数据恢复电路，用于从第一校正数据和第二数据中选择数据，并恢复所选择的数据。

3. 发明申请

US20100117690A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20100117690A1
公开(公告)日：2010-05-13
申请号：US12692185
申请日：2010-01-22
申请人： Yoshiyasu DOI
发明人： Yoshiyasu DOI
IPC分类号： H03K3/00
CPC分类号： H03K19/018528
摘要： A semiconductor device includes a first buffer circuit transmitting input signals, a second buffer circuit having a lower drive capability than the first buffer circuit and transmitting the input signals, and a control circuit detecting transitions of the input signals, and activating the first buffer circuit during a period when the input signals make the transitions.
摘要翻译：一种半导体器件包括：传输输入信号的第一缓冲电路，具有比第一缓冲电路低的驱动能力并传输输入信号的第二缓冲电路;以及控制电路，检测输入信号的转变，以及激活第一缓冲电路输入信号进行转换的时间段。

4. 发明申请

US20090009223A1 PLL CIRCUIT AND SEMICONDUCTOR INTEGRATED DEVICE 有权
标题翻译： PLL电路和半导体集成器件
公开(公告)号：US20090009223A1
公开(公告)日：2009-01-08
申请号：US12182787
申请日：2008-07-30
申请人： Yoshiyasu DOI
发明人： Yoshiyasu DOI
IPC分类号： H03L7/06
CPC分类号： H03L7/0895 , H03L7/091 , H03L7/0995
摘要： A charge pump circuit comprises two MOS transistors serially connected between a power supply voltage VDD and ground, a switch SW0, four switches SW1 through SW4, four capacitors C1 through C4, and four switches SW5 through SW8. If a control voltage Vcntl is to be varied, a specific switch SW of the switches SW1 through SW4 is turned on such that a specific capacitor is charged to the power supply voltage VDD. Then, a specific switch SW of the switches SW5 through SW8 is turned on to transfer the electric charge stored in the capacitor to the capacitor of a low-pass filter and thereby the control voltage is controlled at a desired value.
摘要翻译：电荷泵电路包括串联连接在电源电压VDD与地之间的两个MOS晶体管，开关SW0，四个开关SW1至SW4，四个电容器C1至C4以及四个开关SW5至SW8。如果要改变控制电压Vcnt1，则开关SW1至SW4的特定开关SW导通，使得特定电容器被充电到电源电压VDD。然后，开关SW5至SW8的特定开关SW导通，将存储在电容器中的电荷转移到低通滤波器的电容器，从而将控制电压控制在期望值。

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