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    • 1. 发明授权
    • Video signal processing apparatus for reducing aliasing interference
    • 用于减少混叠干扰的视频信号处理装置
    • US5327241A
    • 1994-07-05
    • US915551
    • 1992-07-20
    • Atsushi IshizuMasaki TokoiYoshio Seki
    • Atsushi IshizuMasaki TokoiYoshio Seki
    • H04N7/015H04N5/213
    • H04N7/0152
    • In a video signal processing apparatus for restoring a signal which has been bandwidth-compressed by offset sub-sampling after restoring an image from sample points of a same field of a sub-sampled signal, a first adder performs an inter-field averaging process from inter-field signals before or after three adjacent fields. A second adder performs an inter-frame averaging process from inter-frame signals. One field difference and one frame difference are detected from the three adjacent inter-field signals thereby switching an output signal of the first adder and an output signal of the second adder in accordance with the magnitudes of the differences thus detected. In this way, aliasing interferences accompanied with bandwidth compression can be detected. By selecting an optimum eliminating filter, aliasing interference due to interfield sub-sampling and aliasing interference due to inter-frame sub-sampling can be eliminated.
    • 在一个视频信号处理装置中,从副采样信号的相同场的采样点恢复图像之后,通过偏移副采样来恢复被带宽压缩的信号,第一加法器执行场间平均处理, 三个相邻场之前或之后的场间信号。 第二加法器从帧间信号执行帧间平均处理。 从三个相邻的场间信号中检测一个场差和一个帧差,从而根据所检测的差的大小切换第一加法器的输出信号和第二加法器的输出信号。 以这种方式,可以检测伴随带宽压缩的混叠干扰。 通过选择最佳消除滤波器,可以消除由于场间子采样引起的混叠干扰和由于帧间子采样引起的混叠干扰。
    • 4. 发明授权
    • Video signal converting apparatus with reduced processing for aliasing
interference
    • 具有减少混叠干扰处理的视频信号转换装置
    • US5365274A
    • 1994-11-15
    • US61704
    • 1993-05-13
    • Yoshio SekiMasaki TokoiAtsushi IshizuYoichiro Miki
    • Yoshio SekiMasaki TokoiAtsushi IshizuYoichiro Miki
    • H04N7/01
    • H04N7/0125
    • A video signal conversion apparatus for converting high definition television signals band-width compressed by offset sub-sampling to a conventional standard television signal while removing aliasing interference caused by offset sub-sampling and using less memory capacity than is conventionally required is provided. The image of the sub-sampled signal is restored from the sampling points in the current field by an intra-field interpolation circuit, and the number of scan lines is reduced to the same number in the standard television signal format by a scan line number conversion circuit. Half of the pixels in the current field are then substituted into the signal for the one previous frame for inter-frame interpolation by a signal selector which alternately selects a signal from the scan line number conversion circuit and a signal from field memories, and a time-base operation for removing aliasing interference at the standard television signal rate is executed.
    • 提供了一种视频信号转换装置,用于将通过偏移次采样压缩的高清晰度电视信号转换为传统标准电视信号,同时消除由偏移次采样引起的混叠干扰并且使用比传统所需的更少的存储器容量。 子采样信号的图像由场内插入电路从当前场中的采样点恢复,并且通过扫描线数转换将扫描线的数量减少到标准电视信号格式的相同数量 电路。 当前字段中的一半像素被替换为前一帧的信号,用于通过交替地选择来自扫描行号码转换电路的信号和来自场存储器的信号的信号选择器进行帧间插值,并且时间 执行用于以标准电视信号速率去除混叠干扰的基地操作。
    • 7. 发明授权
    • Scanning line converting circuit and interpolation coefficient generating circuit
    • 扫描线转换电路和内插系数发生电路
    • US06380979B1
    • 2002-04-30
    • US08886448
    • 1997-07-01
    • Masaki TokoiIsao KawaharaTomohisa Tagami
    • Masaki TokoiIsao KawaharaTomohisa Tagami
    • H04N701
    • H04N7/0122H04N7/0135
    • There is provided a low-cost scanning line converting circuit being capable of properly converting the number of scanning lines for a video signal at various conversion ratios. Under the control of a write control signal generating circuit, an original video signal is written, on a scanning-line basis, in individual line memories. A write operation is performed to each of the line memories based on a clock and a horizontal synchronizing signal on the input side, while a read operation is performed to each of the line memories based on a clock and a horizontal synchronizing signal on the output side. A selecting circuit selects, based on a line select signal, at least one from scanning line signals stored in the individual line memories necessary to generate a post-conversion scanning line signal and outputting the selected scanning line signal. Coefficient multipliers multiply the scanning line signal selectively outputted by interpolation coefficients (1−k) and k and an adder adds up the results of multiplication to output the sum as the post-conversion scanning line signal. A coefficient control circuit and a dividing circuit are capable of generating a coefficient direct signal k in accordance with a ratio for converting the number of signal lines.
    • 提供了一种能够以各种转换比适当地转换视频信号的扫描行数的低成本扫描线转换电路。 在写入控制信号发生电路的控制下,原始视频信号在扫描线上被写入各个行存储器中。 基于输入侧的时钟和水平同步信号,对每个行存储器执行写入操作,同时基于输出侧的时钟和水平同步信号对每个行存储器进行读取操作 。 选择电路基于线选择信号选择存储在生成转换后扫描线信号所必需的各行存储器中的扫描线信号中的至少一个,并输出所选择的扫描线信号。 系数乘法器乘以由插值系数(1-k)和k选择性地输出的扫描线信号,并且加法器将相乘结果相加以输出和作为后转换扫描线信号。 系数控制电路和分频电路能够根据用于转换信号线数的比率产生系数直接信号k。