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1. 发明申请

US20100320526A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100320526A1
公开(公告)日：2010-12-23
申请号：US12727730
申请日：2010-03-19
申请人： Masaru KIDOH , Ryota KATSUMATA , Masaru KITO , Yoshiaki FUKUZUMI , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Tomoko FUJIWARA , Yoshimasa MIKAJIRI , Shigeto OOTA , Hideaki AOCHI , Ryouhei KIRISAWA , Junya MATSUNAMI
发明人： Masaru KIDOH , Ryota KATSUMATA , Masaru KITO , Yoshiaki FUKUZUMI , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Tomoko FUJIWARA , Yoshimasa MIKAJIRI , Shigeto OOTA , Hideaki AOCHI , Ryouhei KIRISAWA , Junya MATSUNAMI
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L27/11578 , H01L23/522 , H01L23/53257 , H01L23/53271 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要： A nonvolatile semiconductor memory device includes: a semiconductor substrate; a memory unit; and a circuit unit provided between the semiconductor substrate and the memory unit. The memory unit includes: a stacked structural unit having electrode films alternately stacked with inter-electrode-film insulating films; a semiconductor pillar piercing the stacked structural unit; and a storage unit provided corresponding to an intersection between the electrode films and the semiconductor pillar. The circuit unit includes first and second transistors having different conductivity type, a first interconnect, and first and second contact plugs. The first interconnect includes silicide provided on a side of the first and second transistors opposite to the semiconductor substrate. The first contact plug made of polysilicon of the first conductivity type connects the first interconnect to the first transistor. The second contact plug made of polysilicon of the second conductivity type connects the first interconnect to the second transistor.
摘要翻译：非易失性半导体存储器件包括：半导体衬底; 记忆单元以及设置在半导体衬底和存储器单元之间的电路单元。存储单元包括：层叠结构单元，其具有交替层叠有电极间绝缘膜的电极膜; 穿过堆叠结构单元的半导体柱; 以及与电极膜和半导体柱之间的交点对应地设置的存储单元。电路单元包括具有不同导电类型的第一和第二晶体管，第一互连以及第一和第二接触插塞。第一互连包括设置在与半导体衬底相对的第一和第二晶体管一侧的硅化物。由第一导电类型的多晶硅制成的第一接触插头将第一互连件连接到第一晶体管。由第二导电类型的多晶硅制成的第二接触插头将第一互连件连接到第二晶体管。

2. 发明申请

US20110063914A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20110063914A1
公开(公告)日：2011-03-17
申请号：US12725742
申请日：2010-03-17
申请人： Yoshimasa MIKAJIRI , Ryouhei Kirisawa , Masaru Kito , Shigeto Oota
发明人： Yoshimasa MIKAJIRI , Ryouhei Kirisawa , Masaru Kito , Shigeto Oota
IPC分类号： G11C16/04 , G11C11/34
CPC分类号： G11C16/0466 , G11C5/02 , G11C16/0483 , H01L27/11556 , H01L27/11573 , H01L27/11578
摘要： A nonvolatile semiconductor memory device includes: a memory unit; and a control unit. The memory unit includes: a multilayer structure including electrode films and interelectrode insulating films alternately stacked; a semiconductor pillar piercing the multilayer structure; insulating films and a memory layer provided between the electrode films and the semiconductor pillar; and a wiring connected to the semiconductor pillar. In an erase operation, the control unit performs: a first operation setting the wiring at a first potential and the electrode film at a second potential lower than the first potential during a first period; and a second operation setting the wiring at a third potential and the electrode film at a fourth potential lower than the third potential during a second period after the first operation. A length of the second period is shorter than the first period, and/or a difference between the third and fourth potentials is smaller than a difference between the first and second potentials.
摘要翻译：非易失性半导体存储器件包括：存储器单元; 和控制单元。存储单元包括：交替堆叠的包括电极膜和电极间绝缘膜的多层结构; 穿透多层结构的半导体柱; 绝缘膜和设置在电极膜和半导体柱之间的存储层; 以及连接到半导体柱的布线。在擦除操作中，控制单元执行以下操作：在第一时段期间将布线设置为第一电位的第一操作和低于第一电位的第二电位的电极膜; 以及在第一操作之后的第二周期期间将布线设置在第三电位的第二操作和电极膜处于低于第三电位的第四电位。第二周期的长度比第一周期短，和/或第三和第四电位之间的差小于第一和第二电位之间的差。

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