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1. 发明授权

US4932567A Container for foamy liquid discharged in small amounts 失效
标题翻译：用于少量排出泡沫液体的容器
公开(公告)号：US4932567A
公开(公告)日：1990-06-12
申请号：US312621
申请日：1989-02-17
申请人： Yoshikazu Tanabe , Takao Endo
发明人： Yoshikazu Tanabe , Takao Endo
IPC分类号： B65D47/34 , B05B7/00 , B05B11/00 , B65D47/06 , B65D83/76
CPC分类号： B05B11/3087 , B05B11/3001 , B05B11/3074 , B05B11/3098 , B05B7/0062
摘要： A container in which air and a foamable liquid are passed through porous gas/liquid mixing members at which the foamable liquid and air are mixed together to be foamed so that the foam of the foaming liquid may be discharged from the container. The gas/liquid mixing members are porous films of which one is disposed at the bottom of a cylinder and at least two are disposed in a hollow piston inclusive of a hollow piston rod at predetermined spacing. A check valve is provided at the bottom of the cylinder. A liquid passage hole in communication with a downwardly extending liquid passage pipe is provided. A gas passage hole opens to a junction of the liquid passage pipe and liquid passage hole to form a gas/liquid mixing portion, and a second check valve is provided in the piston rod.
摘要翻译：将空气和可发泡液体通过多孔气体/液体混合构件的容器，在该容器中将可发泡液体和空气混合在一起以发泡，使得发泡液体的泡沫体可从容器中排出。气/液混合构件是多孔膜，其中一个设置在气缸的底部，并且至少两个以预定间隔设置在包括中空活塞杆的中空活塞中。在气缸的底部设有止回阀。提供与向下延伸的液体通道管连通的液体通道孔。气体通道孔通向液体通道管和液体通道孔的接合处，以形成气体/液体混合部分，并且在活塞杆中设置有第二止回阀。

2. 发明授权

US07375013B2 Semiconductor integrated circuit device and process for manufacturing the same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US07375013B2
公开(公告)日：2008-05-20
申请号：US11396000
申请日：2006-04-03
申请人： Naoki Yamamoto , Yoshikazu Tanabe , Hiroshige Kogayu , Takehiko Yoshida
发明人： Naoki Yamamoto , Yoshikazu Tanabe , Hiroshige Kogayu , Takehiko Yoshida
IPC分类号： H01L21/28 , H01L21/44
CPC分类号： H01L29/4941 , H01L21/28044 , H01L21/28061 , H01L21/28176 , H01L21/28211 , H01L21/28556 , H01L21/324 , H01L27/10814 , H01L27/10873 , H01L27/10894
摘要： Formation of an WNX film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WNX film 24 is suppressed in the heat treatment step after the formation of the gate electrode 7A.
摘要翻译：在含有高浓度氮气的气氛中，形成构成具有多金属结构的栅电极7A的势垒层的WN X X膜24，从而从WN中释放N（氮）在形成栅电极7A之后的热处理步骤中抑制了薄膜24。

3. 发明申请

US20080045027A1 Method for fabricating semiconductor intergrated circuit device 有权
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US20080045027A1
公开(公告)日：2008-02-21
申请号：US11808805
申请日：2007-06-13
申请人： Yoshikazu Tanabe , Satoshi Sakai , Nobuyoshi Natsuaki
发明人： Yoshikazu Tanabe , Satoshi Sakai , Nobuyoshi Natsuaki
IPC分类号： H01L21/302
CPC分类号： H01L21/31662 , H01L21/02052 , H01L21/02238 , H01L21/02255 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L21/3144 , H01L21/31658 , H01L21/67109 , H01L21/67167 , H01L21/67173 , H01L21/67213 , H01L21/67219 , H01L21/823807 , H01L21/823814 , H01L21/823857 , H01L29/42364 , H01L29/518 , Y10S148/023 , Y10S148/116 , Y10S438/935
摘要： A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of oxide film and uniformity in thickness of the oxide film.
摘要翻译：制造本发明的半导体集成电路器件的方法包括将由氢和氧产生的低浓度水的氧化物质通过催化作用输送到半导体晶片的主表面或其附近，以及在半导体晶片的主表面上以氧化膜生长速率形成用作MOS晶体管的栅极绝缘膜的厚度为5nm以下的薄氧化膜，其足以确保形成氧化膜的保真度和均匀性的氧化膜厚度。

4. 发明申请

US20060175651A1 Semiconductor integrated circuit device and process for manufacturing the same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US20060175651A1
公开(公告)日：2006-08-10
申请号：US11396000
申请日：2006-04-03
申请人： Naoki Yamamoto , Yoshikazu Tanabe , Hiroshige Kogayu , Takehiko Yoshida
发明人： Naoki Yamamoto , Yoshikazu Tanabe , Hiroshige Kogayu , Takehiko Yoshida
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L29/00
CPC分类号： H01L29/4941 , H01L21/28044 , H01L21/28061 , H01L21/28176 , H01L21/28211 , H01L21/28556 , H01L21/324 , H01L27/10814 , H01L27/10873 , H01L27/10894
摘要： Formation of an WNX film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WNX film 24 is suppressed in the heat treatment step after the formation of the gate electrode 7A.
摘要翻译：在含有高浓度氮气的气氛中，形成构成具有多金属结构的栅电极7A的势垒层的WN X X膜24，从而从WN中释放N（氮）在形成栅电极7A之后的热处理步骤中抑制了薄膜24。

5. 发明授权

US06987069B2 Fabrication process of a semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造工艺
公开(公告)号：US06987069B2
公开(公告)日：2006-01-17
申请号：US10821842
申请日：2004-04-12
申请人： Yoshikazu Tanabe , Isamu Asano , Makoto Yoshida , Naoki Yamamoto , Masayoshi Saito , Nobuyoshi Natsuaki
发明人： Yoshikazu Tanabe , Isamu Asano , Makoto Yoshida , Naoki Yamamoto , Masayoshi Saito , Nobuyoshi Natsuaki
IPC分类号： H01L21/31
CPC分类号： H01L21/28247 , H01L21/28061 , H01L21/28176 , H01L21/32105 , H01L21/823437 , H01L21/823468 , H01L21/823828 , H01L21/823857 , H01L27/1052 , H01L27/10873 , H01L27/10894 , H01L29/4941
摘要： With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, in a gate processing step using a poly-metal, a gate electrode is formed by patterning a gate electrode material which has been deposited over a semiconductor wafer 1A having a gate oxide film formed thereon and has a poly-metal structure and then, the principal surface of the semiconductor wafer 1A heated to a predetermined temperature or vicinity thereof is supplied with a hydrogen gas which contains water at a low concentration, the water having been formed from hydrogen and oxygen by a catalytic action, to selectively oxidize the principal surface of the semiconductor wafer 1A, whereby the profile of the side-wall end portions of the gate electrode is improved.
摘要翻译：为了防止栅极图案化后的光氧化处理时的金属膜的氧化，同时能够控制氧化膜形成的再现性和栅侧壁端的氧化膜厚度的均匀性在使用多金属的栅极处理步骤中，通过对已在其上形成有栅极氧化膜的半导体晶片1A上淀积的具有多金属结构的栅电极材料进行构图来形成栅电极，向被加热到预定温度或附近的半导体晶片1A的主表面供给含有低浓度的水的氢气，由氢和氧通过催化作用形成的水，以选择性地氧化半导体晶片1A的主表面，从而提高了栅电极的侧壁端部的轮廓。

6. 发明申请

US20050266630A1 Fabrication process of a semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造工艺
公开(公告)号：US20050266630A1
公开(公告)日：2005-12-01
申请号：US11196293
申请日：2005-08-04
申请人： Yoshikazu Tanabe , Isamu Asano , Makoto Yoshida , Naoki Yamamoto , Masayoshi Saito , Nobuyoshi Natsuaki
发明人： Yoshikazu Tanabe , Isamu Asano , Makoto Yoshida , Naoki Yamamoto , Masayoshi Saito , Nobuyoshi Natsuaki
IPC分类号： H01L29/41 , H01L21/28 , H01L21/321 , H01L21/4763 , H01L21/8234 , H01L21/8238 , H01L21/8239 , H01L21/8242 , H01L27/108 , H01L29/49 , H01L29/76 , H01L29/78 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H03G3/30 , H03M3/02
CPC分类号： H01L21/28247 , H01L21/28061 , H01L21/28176 , H01L21/32105 , H01L21/823437 , H01L21/823468 , H01L21/823828 , H01L21/823857 , H01L27/1052 , H01L27/10873 , H01L27/10894 , H01L29/4941
摘要： With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, in a gate processing step using a poly-metal, a gate electrode is formed by patterning a gate electrode material which has been deposited over a semiconductor wafer 1A having a gate oxide film formed thereon and has a poly-metal structure and then, the principal surface of the semiconductor wafer 1A heated to a predetermined temperature or vicinity thereof is supplied with a hydrogen gas which contains water at a low concentration, the water having been formed from hydrogen and oxygen by a catalytic action, to selectively oxidize the principal surface of the semiconductor wafer 1A, whereby the profile of the side-wall end portions of the gate electrode is improved
摘要翻译：为了在栅极图案化之后防止光氧化处理时的金属膜的氧化，同时可以控制氧化膜形成的再现性和栅极侧壁端的氧化膜厚度的均匀性在使用多金属的栅极处理步骤中，通过对已在其上形成有栅极氧化膜的半导体晶片1A上淀积的具有多金属结构的栅电极材料进行构图来形成栅电极，向被加热到预定温度或附近的半导体晶片1A的主表面供给含有低浓度的水的氢气，由氢和氧通过催化作用形成的水，以选择性地氧化半导体晶片1A的主表面，从而提高了栅电极的侧壁端部的轮廓

7. 发明申请

US20050227501A1 Method for fabricating semiconductor integrated circuit device 有权
公开(公告)号：US20050227501A1
公开(公告)日：2005-10-13
申请号：US11132289
申请日：2005-05-19
申请人： Yoshikazu Tanabe , Satoshi Sakai , Nobuyoshi Natsuaki
发明人： Yoshikazu Tanabe , Satoshi Sakai , Nobuyoshi Natsuaki
IPC分类号： H01L21/00 , H01L21/28 , H01L21/306 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/336 , H01L21/469 , H01L21/76 , H01L21/8238 , H01L29/423 , H01L29/51
CPC分类号： H01L21/31662 , H01L21/02052 , H01L21/02238 , H01L21/02255 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L21/3144 , H01L21/31658 , H01L21/67109 , H01L21/67167 , H01L21/67173 , H01L21/67213 , H01L21/67219 , H01L21/823807 , H01L21/823814 , H01L21/823857 , H01L29/42364 , H01L29/518 , Y10S148/023 , Y10S148/116 , Y10S438/935
摘要： A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.

8. 发明授权

US06936550B2 Semiconductor integrated circuit device and method for manufacturing the same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US06936550B2
公开(公告)日：2005-08-30
申请号：US10760358
申请日：2004-01-21
申请人： Naoki Yamamoto , Yoshikazu Tanabe
发明人： Naoki Yamamoto , Yoshikazu Tanabe
IPC分类号： H01L29/78 , H01L21/28 , H01L21/316 , H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/43 , H01L29/49 , H01L29/51 , H01L21/44
CPC分类号： H01L21/28194 , H01L21/28079 , H01L21/28176 , H01L21/28185 , H01L21/28202 , H01L21/823828 , H01L21/823857 , H01L29/517 , H01L29/518
摘要： A manufacturing method for a semiconductor integrated circuit device comprises forming, over a gate insulating film which has been formed over the main surface of a single crystal silicon substrate to have an effective film thickness less than 5 nm in terms of SiO2, a W film as a gate electrode material, and heat treating the silicon substrate in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the W film, whereby defects of the gate insulating film right under the W film are repaired. In this way, in a MISFET having a metal gate electrode formed over a ultra-thin gate insulating film having an effective film thickness less than 5 nm in terms of SiO2, defects of the gate insulating film can be repaired without oxidizing the metal gate electrode.
摘要翻译：一种半导体集成电路器件的制造方法，包括在形成于单晶硅衬底的主表面上的栅极绝缘膜上形成有效膜厚度以SiO 2换算为5nm以下，作为栅极电极材料的W膜，并且在水蒸气和氢气气氛中对硅衬底进行热处理，其中水蒸气/氢分压比设定为允许氧化硅的比例， W膜的氧化，从而修复W膜正下方的栅极绝缘膜的缺陷。以这种方式，在具有金属栅电极的MISFET中，栅极绝缘膜的缺陷可以在SiO 2上具有有效膜厚小于5nm的超薄栅绝缘膜在不氧化金属栅电极的情况下进行修复。

9. 发明申请

US20050185172A1 Surface inspection apparatus and method thereof 有权
标题翻译：表面检查装置及其方法
公开(公告)号：US20050185172A1
公开(公告)日：2005-08-25
申请号：US11104621
申请日：2005-04-13
申请人： Ichiro Ishimaru , Minori Noguchi , Ichiro Moriyama , Yoshikazu Tanabe , Yasuo Yatsugake , Yukio Kenbou , Kenji Watanabe , Hirofumi Tsuchiyama
发明人： Ichiro Ishimaru , Minori Noguchi , Ichiro Moriyama , Yoshikazu Tanabe , Yasuo Yatsugake , Yukio Kenbou , Kenji Watanabe , Hirofumi Tsuchiyama
IPC分类号： G01B11/30 , G01B11/24 , G01B11/245 , G01N21/95 , G01N21/956 , G06T1/00 , H01L21/66 , G01N21/88
CPC分类号： G01N21/88 , G01N21/474 , G01N21/94 , G01N21/9501 , G01N21/9503 , G01N2021/8825 , G01N2021/8854
摘要： A surface inspection apparatus and a method for inspecting the surface of a sample are capable of inspecting discriminatingly between scratches of various configuration and adhered foreign objects that occur on the surface of a work target when the work target (for example, an insulating film on a semiconductor substrate) is subjected to a polishing process such as CMP or a grinding process, in semiconductor manufacturing process or magnetic head manufacturing process. In the invention, the scratch and foreign object that occur on the polished or ground surface of the sample is epi-illuminated and slant-illuminated by use of approximately same light flux, the difference between the scattered light intensity from the shallow scratch and from the foreign object is applied to thereby discriminate between the shallow scratch and the foreign object, and the directionality of the scattered light is detected to discriminate between the linear scratch and the foreign object.
摘要翻译：表面检查装置和检查样品表面的方法能够在工作目标（例如，工件的表面上的绝缘膜）上区别地检查在工作目标表面上发生的各种构造和附着异物的划痕半导体衬底）在半导体制造工艺或磁头制造工艺中进行诸如CMP或研磨工艺的抛光工艺。在本发明中，通过使用大致相同的光通量，在样品的抛光或地面上发生的划痕和异物被表面照射和倾斜照射，来自浅划痕的散射光强度与来自应用异物，从而区分浅刮痕和异物，并且检测散射光的方向性以区分线状划痕和异物。

10. 发明授权

US06737341B1 Semiconductor integrated circuit device and method for manufacturing the same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US06737341B1
公开(公告)日：2004-05-18
申请号：US09577671
申请日：2000-05-25
申请人： Naoki Yamamoto , Yoshikazu Tanabe
发明人： Naoki Yamamoto , Yoshikazu Tanabe
IPC分类号： H01L213205
CPC分类号： H01L21/28194 , H01L21/28079 , H01L21/28176 , H01L21/28185 , H01L21/28202 , H01L21/823828 , H01L21/823857 , H01L29/517 , H01L29/518
摘要： A manufacturing method for a semiconductor intergraded circuit device comprises forming, over a gate insulating film which has been formed over a gate insulating film which has been formed over the main surface of a single crystal silicon substrate to have an effective film thinkness less than 5 nm in terms of SiO2, a W film as a gate electrode material, and heat treating the silicon substrate in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the W film, whereby defects of the gate insulating film right under the W film are repaired. In this way, in a MISFET having a metal gate electrode formed over a ultra-thin gate insulating film having an effective film thinkness less than 5 nm in term of SiO2, defectes of the gate insulating film can be repaired without oxidizing the metal gate electrode.
摘要翻译：一种半导体集成电路器件的制造方法，包括在形成在单晶硅衬底的主表面上的栅极绝缘膜上形成的栅极绝缘膜上形成有效膜思想小于5nm 在SiO 2方面，将W膜作为栅电极材料，并将硅衬底在含有允许氧化硅的比例设定的水蒸气/氢气分压比的水蒸汽和氢气气氛中进行热处理而没有 W膜的大量氧化，从而修复W膜正下方的栅极绝缘膜的缺陷。以这种方式，在具有金属栅电极的MISFET中，在SiO 2以上有效膜思想小于5nm的超薄栅极绝缘膜上形成，可以在不使金属栅电极氧化的情况下修复栅极绝缘膜的缺陷。

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