会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Wafer bonding device
    • 晶圆接合装置
    • US6032715A
    • 2000-03-07
    • US883570
    • 1997-06-26
    • Yasunori OhkuboHiroshi SatohYoshihiro Miyazawa
    • Yasunori OhkuboHiroshi SatohYoshihiro Miyazawa
    • H01L21/683B25B11/00H01L21/02
    • B25B11/005Y10T156/17
    • A wafer bonding device which prevents the substrate from being deformed due to the presence of any particles on the chuck surface is provided to thereby prevent a deterioration in yield in the wafer bonding process. The wafer bonding device is equipped with a substrate holding section 3 having a chuck surface 9 for holding a substrate 1, which is one of two substrates 1 and 2 to be bonded together, and the other substrate 2 is bonded to the substrate 1, which is held by the chuck surface 9, wherein a suction member 8 engaged with a support member 4, forming the substrate holding section 3, is formed of a porous material, whereby minute recesses of a predetermined size are formed in high density on the chuck surface 9 of the substrate holding section 3, and any particles are captured in these minute recesses.
    • 提供了防止基板由于卡盘表面上的任何颗粒的存在而变形的晶片接合装置,从而防止了晶片接合工艺中的成品率的劣化。 晶片接合装置具有基板保持部3,基板保持部3具有用于保持基板1的卡盘面9,基板1是要接合在一起的两个基板1和2中的一个,另一个基板2接合到基板1, 由卡盘面9保持,其中与形成基板保持部3的支撑部件4接合的吸引部件8由多孔材料形成,由此在卡盘表面上以高密度形成预定尺寸的微小凹部 9,并且任何颗粒被捕获在这些微小的凹部中。
    • 6. 发明授权
    • Method of manufacturing full CMOS type SRAM
    • 制造全CMOS型SRAM的方法
    • US5332688A
    • 1994-07-26
    • US855663
    • 1992-03-23
    • Makoto HashimotoYoshihiro MiyazawaTakeshi Matsushita
    • Makoto HashimotoYoshihiro MiyazawaTakeshi Matsushita
    • H01L27/11H01L21/70
    • H01L27/1104
    • A method for manufacture of a full CMOS type SRAM, comprising the steps of forming a first mask layer on a semiconductor layer, and patterning the first mask layer by photolithography to form semiconductor island layers where a driver MOS transistor and a load MOS transistor are formable with a slight space therebetween; forming a second mask layer on the semiconductor layer, and patterning the second mask layer by photolithography in such a manner as to overlap the region with one of the driver and load MOS transistors, but not to overlap the isolating region between the transistors; masking, with a resist film, the region with the other of the driver and load MOS transistors, and etching the first mask layer while masking the same with the resist film and the second mask layer; and etching the semiconductor layer while masking the same with the first mask layer, thereby forming mutually isolated semiconductor island layers where the driver and load MOS transistors are formed respectively. According to this method, the width of each transistor and the space between the transistors can be minimized to consequently achieve an enhanced integration density.
    • 一种制造全CMOS型SRAM的方法,包括以下步骤:在半导体层上形成第一掩模层,并通过光刻法形成第一掩模层以形成半导体岛层,其中驱动MOS晶体管和负载MOS晶体管可形成 两者之间有微小的空间; 在所述半导体层上形成第二掩模层,并且通过光刻法以使所述区域与所述驱动器和负载MOS晶体管中的一个重叠的方式对所述第二掩模层进行构图,但不与所述晶体管之间的隔离区域重叠; 用抗蚀剂膜掩蔽与另一个驱动器和负载MOS晶体管的区域,并且蚀刻第一掩模层,同时用抗蚀剂膜和第二掩模层进行掩模; 并且在与第一掩模层进行掩模的同时蚀刻半导体层,从而形成分别形成驱动器和负载MOS晶体管的相互隔离的半导体岛层。 根据该方法,可以将每个晶体管的宽度和晶体管之间的空间最小化,从而实现增强的集成密度。