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1. 发明授权

US07846788B2 Semiconductor device and method of fabrication thereof 有权
公开(公告)号：US07846788B2
公开(公告)日：2010-12-07
申请号：US12643646
申请日：2009-12-21
申请人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
发明人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
IPC分类号： H01L21/8232
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.

2. 发明授权

US08039336B2 Semiconductor device and method of fabrication thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08039336B2
公开(公告)日：2011-10-18
申请号：US12915683
申请日：2010-10-29
申请人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
发明人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
IPC分类号： H01L21/8232
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译：一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或并且通过随后的热滞后热扩散到第一硅层中。

3. 发明申请

US20080290453A1 Semiconductor device and method of fabrication thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20080290453A1
公开(公告)日：2008-11-27
申请号：US12219402
申请日：2008-07-22
申请人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
发明人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
IPC分类号： H01L29/00
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译：一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或并且通过随后的热滞后热扩散到第一硅层中。

4. 发明申请

US20050287777A1 Semiconductor device and method of fabrication thereof 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050287777A1
公开(公告)日：2005-12-29
申请号：US11159389
申请日：2005-06-23
申请人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
发明人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
IPC分类号： H01L21/00 , H01L21/04 , H01L21/28 , H01L21/762 , H01L21/8247 , H01L27/115
CPC分类号： H01L27/11521 , H01L21/76232 , H01L27/115 , H01L29/40114
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译：一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或并且通过随后的热滞后热扩散到第一硅层中。

5. 发明授权

US06472324B2 Method of manufacturing trench type element isolation structure 失效
标题翻译：制造沟槽型元件隔离结构的方法
公开(公告)号：US06472324B2
公开(公告)日：2002-10-29
申请号：US09809184
申请日：2001-03-16
申请人： Yoshihiko Kusakabe , Yasuki Morino
发明人： Yoshihiko Kusakabe , Yasuki Morino
IPC分类号： H01L21302
CPC分类号： H01L21/76224 , H01L21/31053 , H01L21/31612 , H01L21/31662
摘要： The present invention is directed to a method of manufacturing a trench type semiconductor element isolation structure including the steps of: (i) forming a silicon oxide film on a silicon substrate and forming a silicon nitride film on the silicon oxide film; (ii) forming a groove penetrating the silicon nitride film and the silicon oxide film, said groove reaching an interior of the silicon substrate; (iii) forming a thermal oxide film on an inner wall of said groove; (iv) depositing an oxide in said groove; (v) subjecting said oxide to a polishing treatment with the silicon nitride film used as a stopper layer, so that a part of the insulator is removed; (vi) etching the oxide by a predetermined amount of said oxide after completing the step (v); (vii) etching the silicon nitride film after completing the step (vi); and (viii) etching the silicon oxide film after completing the step (vii).
摘要翻译：本发明涉及一种制造沟槽型半导体元件隔离结构的方法，包括以下步骤：（i）在硅衬底上形成氧化硅膜并在氧化硅膜上形成氮化硅膜; （ii）形成贯穿所述氮化硅膜和所述氧化硅膜的槽，所述槽到达所述硅衬底的内部; （iii）在所述槽的内壁上形成热氧化膜; （iv）在所述槽中沉积氧化物; （v）对所述氧化物进行抛光处理，所述氮化硅膜用作阻挡层，从而去除绝缘体的一部分; （vi）在完成步骤（v）之后，用预定量的氧化物蚀刻氧化物; （vii）在完成步骤（vi）之后蚀刻氮化硅膜; 和（viii）在完成步骤（vii）之后蚀刻氧化硅膜。

6. 发明授权

US07646055B2 Semiconductor device and method of fabrication thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07646055B2
公开(公告)日：2010-01-12
申请号：US12219402
申请日：2008-07-22
申请人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
发明人： Yasuki Morino , Yoshihiko Kusakabe , Ryuichi Wakahara
IPC分类号： H01L29/788
CPC分类号： H01L21/28273 , H01L21/76232 , H01L27/115 , H01L27/11521
摘要： A method includes the steps of: introducing insulation film into a trench to provide a trench isolation; planarizing the trench isolation to expose a passivation film; and removing the passivation film and depositing a second silicon layer on a first silicon layer and the trench isolation; and in the step of depositing the first silicon layer the first silicon layer is an undoped silicon layer and in the step of depositing the second silicon layer the second silicon layer is a doped silicon layer or an undoped silicon layer subsequently having an impurity introduced thereinto or the like and thermally diffused through subsequent thermal hysteresis into the first silicon layer.
摘要翻译：一种方法包括以下步骤：将绝缘膜引入沟槽以提供沟槽隔离; 平坦化沟槽隔离以暴露钝化膜; 以及去除所述钝化膜并在第一硅层上沉积第二硅层和所述沟槽隔离; 并且在沉积第一硅层的步骤中，第一硅层是未掺杂的硅层，并且在沉积第二硅层的步骤中，第二硅层是掺杂硅层或随后具有引入杂质的未掺杂硅层，或并且通过随后的热滞后热扩散到第一硅层中。

7. 发明授权

US06206012B1 Method of avoiding wall particle contamination in depositing films 失效
标题翻译：避免沉积膜中的壁体污染的方法
公开(公告)号：US06206012B1
公开(公告)日：2001-03-27
申请号：US09199049
申请日：1998-11-24
申请人： Daisuke Suzuki , Kenichi Ono , Yasuki Morino
发明人： Daisuke Suzuki , Kenichi Ono , Yasuki Morino
IPC分类号： C23C1600
CPC分类号： C23C16/4411 , C23C16/4401 , C23C16/46 , Y10S438/905
摘要： A method of avoiding deposition of particles from a film deposited on a wall of a film deposition apparatus, onto a film deposited in the apparatus, the method including directly heating a wall of a reaction chamber, before placing a wafer on a susceptor in the reaction chamber, to at least a wall film peeling temperature at which a wall film does not peel from the wall; placing a wafer in the reaction chamber, heating the wafer, and depositing a film on the wafer without directly heating the wall; ending heating of the wafer after deposition of the film and directly heating the reaction wall of the reaction chamber to at least the wall film peeling temperature; and removing the wafer from the reaction while the wall of the reaction chamber is maintained at a temperature at least equal to the wall film peeling temperature.
摘要翻译：一种避免颗粒从沉积在成膜装置的壁上的膜沉积到沉积在该装置中的膜上的方法，该方法包括直接加热反应室的壁，然后将晶片放置在反应器的基座上至少壁膜剥离温度至少不会从墙壁剥离; 将晶片放置在反应室中，加热晶片，并将膜沉积在晶片上而不直接加热壁; 在膜沉积后结束加热晶片，并直接将反应室的反应壁加热到至少壁膜剥离温度; 并且当反应室的壁保持在至少等于壁膜剥离温度的温度时，将晶片从反应中移出。

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