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1. 发明授权

US08653577B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08653577B2
公开(公告)日：2014-02-18
申请号：US13003644
申请日：2009-07-01
申请人： Yoshiaki Fukuzumi , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Masaru Kito , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh
发明人： Yoshiaki Fukuzumi , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Masaru Kito , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh
IPC分类号： H01L29/788 , H01L29/792
CPC分类号： H01L29/7926 , G11C16/0466 , H01L27/11565 , H01L27/11578 , H01L27/11582
摘要： A nonvolatile semiconductor memory device includes: a stacked body in which insulating films and electrode films are alternately stacked; selection gate electrodes provided on the stacked body; bit lines provided on the selection gate electrodes; semiconductor pillars; connective members separated from one another; and a charge storage layer provided between the electrode film and the semiconductor pillar. One of the connective members is connected between a lower part of one of the semiconductor pillars and a lower part of another of the semiconductor pillars. The one of the semiconductor pillars passes through one of the selection gate electrodes and is connected to one of the bit lines, and the another of the semiconductor pillars passes through another of the selection gate electrodes and is connected to another of the bit lines.
摘要翻译：非易失性半导体存储器件包括：绝缘膜和电极膜交替层叠的层叠体; 设置在层叠体上的选择栅电极; 设置在选择栅电极上的位线; 半导体柱连接成员彼此分离; 以及设置在电极膜和半导体柱之间的电荷存储层。一个连接构件连接在一个半导体柱的下部和另一个半导体柱的下部之间。半导体柱中的一个穿过选择栅极之一并连接到一个位线，并且另一个半导体柱通过另一个选择栅电极并连接到另一个位线。

2. 发明授权

US08350326B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08350326B2
公开(公告)日：2013-01-08
申请号：US12839895
申请日：2010-07-20
申请人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi
发明人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi
IPC分类号： H01L29/792
CPC分类号： H01L29/7926 , H01L21/28282 , H01L27/11578 , H01L27/11582 , H01L29/42344 , H01L29/66833
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes first and second stacked structural bodies, first and second semiconductor pillars, a memory unit connection portion, a selection unit stacked structural body, first and second selection unit semiconductor pillars, a selection unit connection portion, and first to fifth interconnections. The semiconductor pillars pierce the stacked structural bodies. The first and second interconnections are connected to the first and second semiconductor pillars, respectively. The memory unit connection portion connects the first and second semiconductor pillars. The selection unit semiconductor pillars pierce the selection unit stacked structural body. The third and fourth interconnections are connected to the first and second selection unit semiconductor pillars, respectively. The selection unit connection portion connects the first and second selection unit semiconductor pillars. The fifth interconnection is connected to the third interconnection on a side opposite to the selection unit stacked structural body.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括第一和第二堆叠结构体，第一和第二半导体柱，存储单元连接部分，选择单元堆叠结构体，第一和第二选择单元半导体柱，选择单元连接部分，以及第一至第五互连。半导体支柱刺穿堆叠的结构体。第一和第二互连分别连接到第一和第二半导体柱。存储单元连接部连接第一和第二半导体柱。选择单元半导体柱刺穿选择单元堆叠结构体。第三和第四互连分别连接到第一和第二选择单元半导体柱。选择单元连接部分连接第一和第二选择单元半导体柱。第五互连在与选择单元堆叠结构体相反的一侧连接到第三互连。

3. 发明授权

US08218358B2 Nonvolatile semiconductor memory device and method for driving same 有权
标题翻译：非易失性半导体存储器件及其驱动方法
公开(公告)号：US08218358B2
公开(公告)日：2012-07-10
申请号：US12851054
申请日：2010-08-05
申请人： Ryota Katsumata , Hideaki Aochi , Hiroyasu Tanaka , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Tomoko Fujiwara , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
发明人： Ryota Katsumata , Hideaki Aochi , Hiroyasu Tanaka , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Tomoko Fujiwara , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
IPC分类号： G11C11/14
CPC分类号： H01L27/11578 , G11C16/0466 , G11C16/06 , H01L27/11565 , H01L27/11582
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and a drive circuit. The stacked body is provided on the substrate. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. A through-hole is made in the stacked body to align in a stacking direction. The semiconductor pillar is buried in an interior of the through-hole. The charge storage film is provided between the electrode film and the semiconductor pillar. The drive circuit supplies a potential to the electrode film. The diameter of the through-hole differs by a position in the stacking direction. The drive circuit supplies a potential to reduce a potential difference with the semiconductor pillar as a diameter of the through-hole piercing the electrode film decreases.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括衬底，堆叠体，半导体柱，电荷存储膜和驱动电路。层叠体设置在基板上。层叠体包括交替层叠有多个电极膜的多个绝缘膜。在堆叠体中形成通孔，以在堆叠方向上对齐。半导体柱被埋在通孔的内部。电荷存储膜设置在电极膜和半导体柱之间。驱动电路为电极膜提供电位。通孔的直径与层叠方向的位置不同。当穿透电极膜的通孔的直径减小时，驱动电路提供降低与半导体柱的电位差的电位。

4. 发明授权

US08193571B2 Stacked type nonvolatile semiconductor memory device and method of manufacturing same 有权
标题翻译：堆叠型非易失性半导体存储器件及其制造方法
公开(公告)号：US08193571B2
公开(公告)日：2012-06-05
申请号：US12542276
申请日：2009-08-17
申请人： Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L29/10 , H01L21/336
CPC分类号： H01L27/11578 , H01L27/11565 , H01L27/11575 , H01L27/11582 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： A stacked body is formed on a silicon substrate by stacking a plurality of insulating films and a plurality of electrode films alternately and through-holes are formed to extend in the stacking direction. Next, gaps are formed between the electrode films using etching the insulating films via the through-holes. Charge storage layers are formed along side faces of the through-holes and inner faces of the gaps, and silicon pillars are filled into the through-holes. Thereby, a nonvolatile semiconductor memory device is manufactured.
摘要翻译：通过交替堆叠多个绝缘膜和多个电极膜，在硅基板上形成层叠体，并且形成贯通孔，以在层叠方向上延伸。接下来，通过通孔蚀刻绝缘膜，在电极膜之间形成间隙。电荷存储层沿着通孔的侧面和间隙的内表面形成，硅柱填充到通孔中。由此，制造非易失性半导体存储器件。

5. 发明授权

US08178919B2 Nonvolatile semiconductor memory device and method for manufacturing same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08178919B2
公开(公告)日：2012-05-15
申请号：US12727830
申请日：2010-03-19
申请人： Tomoko Fujiwara , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Hideaki Aochi , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
发明人： Tomoko Fujiwara , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Hideaki Aochi , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
IPC分类号： H01L21/00
CPC分类号： H01L27/11551 , H01L27/11524 , H01L27/11526 , H01L27/11529 , H01L27/11556
摘要： A nonvolatile semiconductor memory device, includes: a stacked structural unit including electrode films alternately stacked with inter-electrode insulating films; first and second semiconductor pillars piercing the stacked structural unit; a connection portion semiconductor layer electrically connect the first and second semiconductor pillars; a connection portion conductive layer provided to oppose the connection portion semiconductor layer; a memory layer and an inner insulating film provided between the first and semiconductor pillars and each of the electrode films, and between the connection portion conductive layer and the connection portion semiconductor layer; an outer insulating film provided between the memory layer and each of the electrode films; and a connection portion outer insulating film provided between the memory layer and the connection portion conductive layer. The connection portion outer insulating film has a film thickness thicker than a film thickness of the outer insulating film.
摘要翻译：一种非易失性半导体存储器件，包括：堆叠结构单元，其包括交替层叠有电极间绝缘膜的电极膜; 第一和第二半导体柱刺穿堆叠结构单元; 连接部分半导体层电连接第一和第二半导体柱; 连接部分导电层，设置成与连接部分半导体层相对; 设置在所述第一半导体柱和所述半导体柱之间以及所述电极膜之间并且位于所述连接部分导电层和所述连接部半导体层之间的存储层和内部绝缘膜; 设置在所述存储层和每个所述电极膜之间的外部绝缘膜; 以及设置在存储层和连接部分导电层之间的连接部分外绝缘膜。连接部外绝缘膜的膜厚比外绝缘膜的膜厚厚。

6. 发明授权

US08178917B2 Non-volatile semiconductor storage device having memory cells disposed three-dimensionally, and method of manufacturing the same 有权
标题翻译：具有三维配置存储单元的非易失性半导体存储装置及其制造方法
公开(公告)号：US08178917B2
公开(公告)日：2012-05-15
申请号：US12408249
申请日：2009-03-20
申请人： Hiroyasu Tanaka , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Yosuke Komori , Hideaki Aochi , Megumi Ishiduki , Yasuyuki Matsuoka
发明人： Hiroyasu Tanaka , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Yosuke Komori , Hideaki Aochi , Megumi Ishiduki , Yasuyuki Matsuoka
IPC分类号： H01L29/792
CPC分类号： H01L27/11578 , H01L27/105 , H01L27/115 , H01L27/11573 , H01L27/11582
摘要： A non-volatile semiconductor storage device includes a first layer and a second layer. The first layer includes: a plurality of first conductive layers extending in parallel to a substrate and laminated in a direction perpendicular to the substrate; a first insulation layer formed on an upper layer of the plurality of first conductive layers; a first semiconductor layer formed to penetrate the plurality of first conductive layers; and a charge accumulation layer formed between the first conductive layers and the first semiconductor layer. Respective ends of the first conductive layers are formed in a stepwise manner in relation to each other in a first direction. The second layer includes: a plurality of second conductive layers extending in parallel to the substrate and laminated in a direction perpendicular to the substrate, the second conductive layers being formed in the same layer as the plurality of first conductive layers; and a second insulation layer formed on an upper layer of the plurality of second conductive layers. Respective ends of the second conductive layers are formed to align along a straight line extending in a direction substantially perpendicular to the substrate at a predetermined area.
摘要翻译：非易失性半导体存储装置包括第一层和第二层。第一层包括：多个第一导电层，其平行于衬底延伸并且在垂直于衬底的方向上层压; 形成在所述多个第一导电层的上层上的第一绝缘层; 形成为穿透所述多个第一导电层的第一半导体层; 以及形成在第一导电层和第一半导体层之间的电荷累积层。第一导电层的相应端部在第一方向上相对于彼此以逐步的方式形成。第二层包括：多个第二导电层，其平行于衬底延伸并且在垂直于衬底的方向上层叠，第二导电层形成在与多个第一导电层相同的层中; 以及形成在所述多个第二导电层的上层上的第二绝缘层。形成第二导电层的相应端，沿着在预定区域上基本上垂直于衬底的方向延伸的直线对齐。

7. 发明授权

US08154103B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08154103B2
公开(公告)日：2012-04-10
申请号：US12972243
申请日：2010-12-17
申请人： Hiroyasu Tanaka , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
发明人： Hiroyasu Tanaka , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
IPC分类号： H01L29/00 , H01L21/76
CPC分类号： H01L29/792 , H01L21/28282 , H01L27/11578 , H01L27/11582 , H01L29/0649 , H01L29/7923 , H01L29/7926
摘要： A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a body section connected with the source region, penetrating through the first insulating layer, the gate electrode and the second insulating layer, and containing a void, a gate insulating film surrounding the body section, and formed between the body section and the gate electrode, and a drain region connected with the body section.
摘要翻译：半导体器件具有衬底，形成在衬底的表面部分上的源极区域，形成在衬底上的第一绝缘层，形成在第一绝缘层上的栅电极，形成在栅电极上的第二绝缘层，主体与源极区域连接，穿过第一绝缘层，栅电极和第二绝缘层，并且包含空隙，围绕主体部分的栅极绝缘膜，并且形成在主体部分和栅电极之间，并且漏极区域与主体部分连接。

8. 发明授权

US08089120B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08089120B2
公开(公告)日：2012-01-03
申请号：US12562781
申请日：2009-09-18
申请人： Hiroyasu Tanaka , Masaru Kidoh , Ryota Katsumata , Masaru Kito , Yosuke Komori , Megumi Ishiduki , Hideaki Aochi , Yoshiaki Fukuzumi
发明人： Hiroyasu Tanaka , Masaru Kidoh , Ryota Katsumata , Masaru Kito , Yosuke Komori , Megumi Ishiduki , Hideaki Aochi , Yoshiaki Fukuzumi
IPC分类号： H01L29/792 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L27/11578 , H01L27/11582
摘要： A semiconductor memory device includes: a semiconductor substrate; a stacked body with a plurality of conductive layers and a plurality of dielectric layers alternately stacked, the stacked body being provided on the semiconductor substrate; a semiconductor layer provided inside a hole formed through the stacked body, the semiconductor layer extending in stacking direction of the conductive layers and the dielectric layers; and a charge storage layer provided between the conductive layers and the semiconductor layer. The stacked body in a memory cell array region including a plurality of memory strings is divided into a plurality of blocks by slits with an interlayer dielectric film buried therein, the memory string including as many memory cells series-connected in the stacking direction as the conductive layers, the memory cell including the conductive layer, the semiconductor layer, and the charge storage layer provided between the conductive layer and the semiconductor layer, and each of the block is surrounded by the slits formed in a closed pattern.
摘要翻译：半导体存储器件包括：半导体衬底; 具有交替堆叠的多个导电层和多个电介质层的层叠体，所述层叠体设置在所述半导体基板上; 设置在通过所述层叠体形成的孔内的半导体层，所述半导体层沿所述导电层和所述电介质层的堆叠方向延伸; 以及设置在导电层和半导体层之间的电荷存储层。包含多个存储器串的存储单元阵列区域中的堆叠体被埋置在其中的层间电介质膜的狭缝分成多个块，该存储串包括在堆叠方向上串联连接的存储单元作为导电存储单元包括导电层，半导体层和设置在导电层和半导体层之间的电荷存储层，并且每个块被形成为封闭图案的狭缝包围。

9. 发明授权

US08008710B2 Non-volatile semiconductor storage device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08008710B2
公开(公告)日：2011-08-30
申请号：US12501142
申请日：2009-07-10
申请人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi
发明人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , G11C5/02 , G11C5/025 , G11C5/063 , G11C8/14 , G11C16/0483 , H01L27/11565 , H01L27/11578 , H01L27/11582 , H01L29/42348 , H01L29/7926
摘要： A memory string has a semiconductor layer with a joining portion that is formed to join a plurality of columnar portions extending in a vertical direction with respect to a substrate and lower ends of the plurality of columnar portions. First conductive layers are formed in a laminated fashion to surround side surfaces of the columnar portions and an electric charge storage layer, and function as control electrodes of memory cells. A second conductive layer is formed around the plurality of columnar portions via a gate insulation film, and functions as control electrodes of selection transistors. Bit lines are formed to be connected to the plurality of columnar portions, respectively, with a second direction orthogonal to a first direction taken as a longitudinal direction.
摘要翻译：存储器串具有半导体层，其具有接合部分，该接合部分形成为连接相对于衬底在垂直方向上延伸的多个柱状部分和多个柱状部分的下端。第一导电层以叠层的方式形成以包围柱状部分的侧表面和电荷存储层，并且用作存储单元的控制电极。通过栅极绝缘膜在多个柱状部分周围形成第二导电层，并且用作选择晶体管的控制电极。位线分别形成为与第一方向正交的第二方向作为纵向连接到多个柱状部分。

10. 发明申请

US20110111579A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20110111579A1
公开(公告)日：2011-05-12
申请号：US13010466
申请日：2011-01-20
申请人： Masaru Kito , Ryota Katsumata , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Masaru Kito , Ryota Katsumata , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L21/20
CPC分类号： H01L27/11578 , H01L21/8221 , H01L27/0688 , H01L27/11573 , H01L27/11582 , H01L29/66833 , H01L29/7923 , H01L29/7926
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a memory columnar semiconductor extending in a direction perpendicular to a substrate; a tunnel insulation layer contacting the memory columnar semiconductor; a charge accumulation layer contacting the tunnel insulation layer and accumulating charges; a block insulation layer contacting the charge accumulation layer; and a plurality of memory conductive layers contacting the block insulation layer. The lower portion of the charge accumulation layer is covered by the tunnel insulation layer and the block insulation layer.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：在垂直于衬底的方向上延伸的存储器柱状半导体; 与记录柱状半导体接触的隧道绝缘层; 与隧道绝缘层接触并积累电荷的电荷累积层; 与电荷累积层接触的块绝缘层; 以及与块绝缘层接触的多个存储器导电层。电荷累积层的下部被隧道绝缘层和块绝缘层覆盖。

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