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1. 发明授权

US07476922B2 Logic device having vertically extending metal-insulator-metal capacitor between interconnect layers and method of fabricating the same 有权
标题翻译：在互连层之间具有垂直延伸的金属 - 绝缘体 - 金属电容器的逻辑器件及其制造方法
公开(公告)号：US07476922B2
公开(公告)日：2009-01-13
申请号：US10969098
申请日：2004-10-20
申请人： Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
发明人： Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
IPC分类号： H01L27/108 , H01L29/94
CPC分类号： H01L28/91 , H01L21/76807 , H01L21/76838 , H01L27/0805
摘要： A logic device having a vertically extending MIM capacitor between interconnect layers includes a semiconductor substrate. A lower interconnect layer is located over the semiconductor substrate, and an upper interconnect layer is located over the lower interconnect layer. A U-shaped lower metal plate is interposed between the lower interconnect layer and the upper interconnect layer. The U-shaped lower metal plate directly contacts the lower interconnect layer. The capacitor dielectric layer covers the inner surface of the lower metal plate. Further, the capacitor dielectric layer has an extension portion interposed between the brim of the lower metal plate and the upper interconnect layer. An upper metal plate covers the inner surface of the capacitor dielectric layer. The upper metal plate is in contact with the upper interconnect layer and is confined by the capacitor dielectric layer.
摘要翻译：在互连层之间具有垂直延伸的MIM电容器的逻辑器件包括半导体衬底。下部互连层位于半导体衬底上方，并且上互连层位于下互连层上。 U形下金属板插入在下互连层和上互连层之间。 U形下金属板直接接触下互连层。电容器电介质层覆盖下金属板的内表面。此外，电容器介电层具有插入在下金属板的边缘和上互连层之间的延伸部分。上金属板覆盖电容器介电层的内表面。上金属板与上互连层接触并被电容器电介质层约束。

2. 发明授权

US07166541B2 Method of forming dielectric layer using plasma enhanced atomic layer deposition technique 失效
标题翻译：使用等离子体增强原子层沉积技术形成介电层的方法
公开(公告)号：US07166541B2
公开(公告)日：2007-01-23
申请号：US11149498
申请日：2005-06-09
申请人： Min-Woo Song , Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Weon-Hong Kim
发明人： Min-Woo Song , Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Weon-Hong Kim
IPC分类号： H01L21/31
CPC分类号： H01L21/02274 , C23C16/405 , C23C16/45542 , H01L21/02175 , H01L21/0228 , H01L21/3141 , H01L21/31604 , H01L21/31616 , H01L21/31637 , H01L21/31641 , H01L21/31645
摘要： A method of forming a dielectric layer using a plasma enhanced atomic layer deposition technique includes: loading a semiconductor substrate having a three-dimensional structure into a reaction chamber; and repeatedly performing the following steps until a dielectric layer with a desired thickness is formed: supplying a source gas into the reaction chamber; stopping the supply of the source gas and purging the source gas remaining inside the reaction chamber; and supplying oxygen gas into the reaction chamber after purging the source gas, and applying RF power for oxygen plasma treatment, a level of the applied RF power and a partial pressure of the oxygen gas being increased concurrently with an increased aspect ratio of the three-dimensional structure.
摘要翻译：使用等离子体增强原子层沉积技术形成电介质层的方法包括：将具有三维结构的半导体衬底加载到反应室中; 并重复执行以下步骤，直到形成具有所需厚度的电介质层：将源气体供应到反应室中; 停止源气体的供给并清除剩余在反应室内的源气体; 并且在净化源气体之后将氧气供应到反应室中，并施加用于氧等离子体处理的RF功率，所施加的RF功率的水平和氧气的分压同时增加，尺寸结构。

3. 发明申请

US20060078678A1 Method of forming a thin film by atomic layer deposition 审中-公开
标题翻译：通过原子层沉积形成薄膜的方法
公开(公告)号：US20060078678A1
公开(公告)日：2006-04-13
申请号：US11247295
申请日：2005-10-11
申请人： Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
发明人： Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
IPC分类号： C23C16/00
CPC分类号： C23C16/45529 , C23C16/405 , C23C16/45542
摘要： Methods of forming a thin film by atomic layer deposition are disclosed. These methods generally include the steps of loading a substrate into a reaction chamber, and injecting a first source gas containing a first atom into the reaction chamber to form a chemical adsorption layer containing the first atom on the substrate. In one representative embodiment, a first reaction gas is then injected into the reaction chamber while a first plasma power is applied to the reaction chamber such that the first reaction gas reacts with the chemical adsorption layer containing the first atom to form a first thin film on the substrate. A second source gas containing a second atom is then injected into the reaction chamber to form a chemical adsorption layer containing the second atom on the substrate having the first thin film. A second reaction gas is next injected into the reaction chamber while a second plasma power, which is higher than the first plasma power, is applied to the reaction chamber such that the second reaction gas reacts with the chemical adsorption layer containing the second atom to form a second thin film on the substrate. The first plasma power may be a value selected in a range equal to or greater than 0 W and less than about 500 W, and the second plasma power may be a value selected in a range greater than the first plasma power and less than about 2000 W. A thickness of the second thin film may be equal to or greater than a thickness of the first thin film.
摘要翻译：公开了通过原子层沉积形成薄膜的方法。这些方法通常包括将衬底装载到反应室中的步骤，以及将含有第一原子的第一源气体注入到反应室中以形成在衬底上含有第一原子的化学吸附层。在一个代表性的实施方案中，然后将第一反应气体注入到反应室中，同时将第一等离子体功率施加到反应室，使得第一反应气体与含有第一原子的化学吸附层反应以形成第一薄膜底物。然后将含有第二原子的第二源气体注入反应室，以形成含有第二原子的化学吸附层，该第二原子具有第一薄膜。接着将第二反应气体注入反应室，同时将高于第一等离子体功率的第二等离子体功率施加到反应室，使得第二反应气体与含有第二原子的化学吸附层反应形成在衬底上的第二薄膜。第一等离子体功率可以是在等于或大于0W且小于约500W的范围内选择的值，并且第二等离子体功率可以是在大于第一等离子体功率的范围内选择的值，并且小于约2000 第二薄膜的厚度可以等于或大于第一薄膜的厚度。

4. 发明申请

US20050087879A1 Logic device having vertically extending metal-insulator-metal capacitor between interconnect layers and method of fabricating the same 有权
标题翻译：在互连层之间具有垂直延伸的金属 - 绝缘体 - 金属电容器的逻辑器件及其制造方法
公开(公告)号：US20050087879A1
公开(公告)日：2005-04-28
申请号：US10969098
申请日：2004-10-20
申请人： Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
发明人： Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
IPC分类号： H01L27/10 , H01L21/02 , H01L21/768 , H01L23/48 , H01L27/08
CPC分类号： H01L28/91 , H01L21/76807 , H01L21/76838 , H01L27/0805
摘要： A logic device having a vertically extending MIM capacitor between interconnect layers includes a semiconductor substrate. A lower interconnect layer is located over the semiconductor substrate, and an upper interconnect layer is located over the lower interconnect layer. A U-shaped lower metal plate is interposed between the lower interconnect layer and the upper interconnect layer. The U-shaped lower metal plate directly contacts the lower interconnect layer. The capacitor dielectric layer covers the inner surface of the lower metal plate. Further, the capacitor dielectric layer has an extension portion interposed between the brim of the lower metal plate and the upper interconnect layer. An upper metal plate covers the inner surface of the capacitor dielectric layer. The upper metal plate is in contact with the upper interconnect layer and is confined by the capacitor dielectric layer.
摘要翻译：在互连层之间具有垂直延伸的MIM电容器的逻辑器件包括半导体衬底。下部互连层位于半导体衬底上方，并且上互连层位于下互连层上。 U形下金属板插入在下互连层和上互连层之间。 U形下金属板直接接触下互连层。电容器电介质层覆盖下金属板的内表面。此外，电容器介电层具有插入在下金属板的边缘和上互连层之间的延伸部分。上金属板覆盖电容器介电层的内表面。上金属板与上互连层接触并被电容器电介质层约束。

5. 发明申请

US20060014398A1 Method of forming dielectric layer using plasma enhanced atomic layer deposition technique 失效
标题翻译：使用等离子体增强原子层沉积技术形成介电层的方法
公开(公告)号：US20060014398A1
公开(公告)日：2006-01-19
申请号：US11149498
申请日：2005-06-09
申请人： Min-Woo Song , Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Weon-Hong Kim
发明人： Min-Woo Song , Seok-Jun Won , Yong-Kuk Jeong , Dae-Jin Kwon , Weon-Hong Kim
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02274 , C23C16/405 , C23C16/45542 , H01L21/02175 , H01L21/0228 , H01L21/3141 , H01L21/31604 , H01L21/31616 , H01L21/31637 , H01L21/31641 , H01L21/31645
摘要： A method of forming a dielectric layer using a plasma enhanced atomic layer deposition technique includes: loading a semiconductor substrate having a three-dimensional structure into a reaction chamber; and repeatedly performing the following steps until a dielectric layer with a desired thickness is formed: supplying a source gas into the reaction chamber; stopping the supply of the source gas and purging the source gas remaining inside the reaction chamber; and supplying oxygen gas into the reaction chamber after purging the source gas, and applying RF power for oxygen plasma treatment, a level of the applied RF power and a partial pressure of the oxygen gas being increased concurrently with an increased aspect ratio of the three-dimensional structure.
摘要翻译：使用等离子体增强原子层沉积技术形成电介质层的方法包括：将具有三维结构的半导体衬底加载到反应室中; 并重复执行以下步骤，直到形成具有所需厚度的介电层：将源气体供应到反应室中; 停止源气体的供给并清除剩余在反应室内的源气体; 并且在净化源气体之后将氧气供应到反应室中，并施加用于氧等离子体处理的RF功率，所施加的RF功率的水平和氧气的分压同时增加，尺寸结构。

6. 发明申请

US20060006449A1 Semiconductor integrated circuit devices having a hybrid dielectric layer and methods of fabricating the same 审中-公开
标题翻译：具有混合电介质层的半导体集成电路器件及其制造方法
公开(公告)号：US20060006449A1
公开(公告)日：2006-01-12
申请号：US11174954
申请日：2005-07-05
申请人： Yong-Kuk Jeong , Seok-Jun Won , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
发明人： Yong-Kuk Jeong , Seok-Jun Won , Dae-Jin Kwon , Min-Woo Song , Weon-Hong Kim
IPC分类号： H01L27/108
CPC分类号： H01L21/02181 , H01L21/02189 , H01L21/02194 , H01L21/02197 , H01L21/022 , H01L21/0228 , H01L21/31641 , H01L21/31645 , H01L21/31691 , H01L27/0805 , H01L28/56 , H01L28/65
摘要： In semiconductor integrated circuit devices having a hybrid dielectric layer and methods of fabricating the same, the hybrid dielectric layer includes a lower dielectric layer, an intermediate dielectric layer and an upper dielectric layer which are sequentially stacked. The lower dielectric layer contains hafnium (Hf) or zirconium (Zr). The upper dielectric layer also contains Hf or Zr. The intermediate dielectric layer is formed of a material layer having a voltage dependent capacitance variation lower than that of the lower dielectric layer.
摘要翻译：在具有混合电介质层的半导体集成电路器件及其制造方法中，混合电介质层包括依次层叠的下部电介质层，中间电介质层和上部电介质层。下介电层含有铪（Hf）或锆（Zr）。上部介电层也含有Hf或Zr。中间电介质层由具有相对于下电介质层的电压相关电容变化的材料层形成。

7. 发明申请

US20070026688A1 Method of forming a ZrO2 thin film using plasma enhanced atomic layer deposition and method of fabricating a capacitor of a semiconductor memory device having the thin film 失效
标题翻译：使用等离子体增强原子层沉积法形成ZrO 2薄膜的方法以及制造具有薄膜的半导体存储器件的电容器的方法
公开(公告)号：US20070026688A1
公开(公告)日：2007-02-01
申请号：US11485523
申请日：2006-07-13
申请人： Min-Woo Song , Seok-Jun Won , Weon-Hong Kim , Dae-Jin Kwon , Jung-Min Park
发明人： Min-Woo Song , Seok-Jun Won , Weon-Hong Kim , Dae-Jin Kwon , Jung-Min Park
IPC分类号： H01L21/20 , H01L21/31 , H01L21/469
CPC分类号： H01L21/02189 , C23C16/405 , C23C16/45542 , C23C16/45553 , C23C16/515 , H01L21/022 , H01L21/0228 , H01L21/3141 , H01L21/31641 , H01L27/1085 , H01L28/40
摘要： Example embodiments of the present invention relate to a method of forming a dielectric thin film and a method of fabricating a semiconductor memory device having the same. Other example embodiments of the present invention relate to a method of forming a ZrO2 thin film and a method of fabricating a capacitor of a semiconductor memory device using the ZrO2 thin film as a dielectric layer. A method of forming a ZrO2 thin film may include supplying a zirconium precursor on a substrate maintained at a desired temperature, thereby forming a chemisorption layer of the precursor on the substrate. The zirconium precursor may be a tris(N-ethyl-N-methylamino)(tert-butoxy) zirconium precursor. The substrate having the chemisorption layer of the precursor may be exposed to the plasma atmosphere of oxygen-containing gas for a desired time, thereby forming a Zr oxide layer on the substrate, and a method of fabricating a capacitor of a semiconductor memory device having the ZrO2 thin film.
摘要翻译：本发明的示例性实施例涉及一种形成电介质薄膜的方法及其制造具有该电介质薄膜的半导体存储器件的方法。本发明的其它示例性实施例涉及形成ZrO 2薄膜的方法和使用ZrO 2薄膜的半导体存储器件的电容器的制造方法作为电介质层。形成ZrO 2 H 2薄膜的方法可以包括在保持在所需温度的基板上提供锆前体，由此在基板上形成前体的化学吸附层。锆前体可以是三（N-乙基-N-甲基氨基）（叔丁氧基）锆前体。具有前体的化学吸附层的基板可以暴露于含氧气体的等离子体气氛所需的时间，从而在基板上形成Zr氧化物层，以及制造半导体存储器件的电容器的方法，其具有 ZrO 2薄膜。

8. 发明申请

US20070178249A1 METHODS OF FORMING METAL LAYERS USING METAL-ORGANIC CHEMICAL VAPOR DEPOSITION 审中-公开
标题翻译：使用金属有机化学气相沉积法形成金属层的方法
公开(公告)号：US20070178249A1
公开(公告)日：2007-08-02
申请号：US11623815
申请日：2007-01-17
申请人： Min-Woo Song , Seok-Jun Won , Dae-Jin Kwon , Weon-Hong Kim , Ju-Youn Kim , Jung-Min Park
发明人： Min-Woo Song , Seok-Jun Won , Dae-Jin Kwon , Weon-Hong Kim , Ju-Youn Kim , Jung-Min Park
IPC分类号： H05H1/24
CPC分类号： C23C16/34 , C23C16/56
摘要： Provided is a method of forming a metal layer using metal-organic chemical vapor deposition (MOCVD). The method includes using MOCVD to form on a dielectric layer a metal layer having a first thickness, performing a first plasma process on the metal layer, using the MOCVD process to form a metal layer having a second thickness on the metal layer having the first thickness and performing a second plasma process on the metal layer having the second thickness, wherein the second plasma process has an energy level greater than the energy level of the first plasma process.
摘要翻译：提供了使用金属有机化学气相沉积（MOCVD）形成金属层的方法。该方法包括使用MOCVD在电介质层上形成具有第一厚度的金属层，在金属层上执行第一等离子体处理，使用MOCVD工艺在具有第一厚度的金属层上形成具有第二厚度的金属层以及对具有所述第二厚度的所述金属层执行第二等离子体处理，其中所述第二等离子体工艺具有大于所述第一等离子体工艺的能级的能级。

9. 发明申请

US20070175495A1 Apparatus for Treating Plasma and Method for Cleaning the Same 审中-公开
标题翻译：用于处理等离子体的设备及其清洁方法
公开(公告)号：US20070175495A1
公开(公告)日：2007-08-02
申请号：US11668805
申请日：2007-01-30
申请人： Weon-Hong Kim , Seok-Jun Won , Dae-Jin Kwon , Min-Woo Song , Ju-Youn Kim , Jung-Min Park
发明人： Weon-Hong Kim , Seok-Jun Won , Dae-Jin Kwon , Min-Woo Song , Ju-Youn Kim , Jung-Min Park
IPC分类号： B08B6/00 , C23F1/00 , C23C16/00
CPC分类号： C23C16/4405 , H01J37/32009 , H01J37/32091 , H01J37/32458
摘要： An apparatus for treating plasma includes an inner chamber, an outer chamber receiving the inner chamber and including a gas supplier that supplies a gas into the inner chamber, an inner electrode disposed in the inner chamber, and a plasma generator supplying power independently to the inner electrode and the inner chamber.
摘要翻译：一种用于处理等离子体的设备包括内室，外室，其接收内室，并且包括供应气体供给到内室中的气体供给器，设置在内室中的内电极和等离子发生器独立地向内供应电力电极和内室。

10. 发明申请

US20070111506A1 Integrated circuit devices including metal-insulator-metal capacitors and methods of fabricating the same 有权
标题翻译：包括金属 - 绝缘体 - 金属电容器的集成电路器件及其制造方法
公开(公告)号：US20070111506A1
公开(公告)日：2007-05-17
申请号：US11593670
申请日：2006-11-07
申请人： Dae-Jin Kwon , Jung-Min Park , Seok-Jun Won , Min-Woo Song , Weon-hong Kim , Ju-youn Kim
发明人： Dae-Jin Kwon , Jung-Min Park , Seok-Jun Won , Min-Woo Song , Weon-hong Kim , Ju-youn Kim
IPC分类号： H01L21/4763
CPC分类号： H01L27/016 , H01L23/5223 , H01L28/75 , H01L2924/0002 , Y10S438/957 , H01L2924/00
摘要： Integrated circuit devices including metal-insulator-metal (MIM) capacitors are provided. The MIM capacitors may include an upper electrode having first and second layers. The first layer of the upper electrode includes a physical vapor deposition (PVD) upper electrode and the second layer of the upper electrode includes an ionized PVD (IPVD) upper electrode on the PVD upper electrode. Related methods are also provided.
摘要翻译：提供了包括金属 - 绝缘体 - 金属（MIM）电容器的集成电路器件。 MIM电容器可以包括具有第一层和第二层的上电极。上电极的第一层包括物理气相沉积（PVD）上电极，并且上电极的第二层在PVD上电极上包括离子化的PVD（IPVD）上电极。还提供了相关方法。

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