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1. 发明授权

US08373786B2 Solid-state imaging device, manufacturing method thereof, and electronic device 失效
标题翻译：固态成像装置及其制造方法以及电子装置
公开(公告)号：US08373786B2
公开(公告)日：2013-02-12
申请号：US12434340
申请日：2009-05-01
申请人： Yoichi Otsuka , Yoshiyuki Enomoto , Kazunori Nagahata , Tadayuki Kimura , Toshihiko Hayashi , Kenichi Aoyagi , Kiyotaka Tabuchi , Iwao Sugiura , Kensaku Maeda
发明人： Yoichi Otsuka , Yoshiyuki Enomoto , Kazunori Nagahata , Tadayuki Kimura , Toshihiko Hayashi , Kenichi Aoyagi , Kiyotaka Tabuchi , Iwao Sugiura , Kensaku Maeda
IPC分类号： H04N5/335 , H04N9/083 , H01L31/113 , H01L21/311
CPC分类号： H01L27/14625 , G02B5/201 , G02B5/223 , H01L27/14621 , H01L27/14685
摘要： A solid-state imaging device has: an imaging region in which a plurality of pixels each having a photoelectric conversion element are arranged, and a color filter. The color filter includes: filter components of a first color (2G), filter components of a second color (2R) formed by self-alignment and each being surrounded by the filter components of the first color (2G), and filter components of a third color (2B) formed by self-alignment and each being surrounded by the filter components of the first color (2G).
摘要翻译：固态成像装置具有：配置有各自具有光电转换元件的多个像素的成像区域和滤色器。滤色器包括：第一颜色（2G）的滤色镜部件，通过自对准形成的并且由第一颜色（2G）的滤光片部件包围的第二颜色（2R）的滤色镜部件，以及第三颜色（2B）通过自对准形成，并且每个由第一颜色（2G）的滤光器部件包围。

2. 发明授权

US5506435A Static ram having an active area with a tapered bottom surface 失效
标题翻译：具有具有锥形底面的活动区域的静压柱塞
公开(公告)号：US5506435A
公开(公告)日：1996-04-09
申请号：US412601
申请日：1995-03-29
申请人： Michio Negishi , Ihachi Naiki , Masayoshi Sasaki , Tadayuki Kimura
发明人： Michio Negishi , Ihachi Naiki , Masayoshi Sasaki , Tadayuki Kimura
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8244 , H01L21/84 , H01L27/11 , H01L27/12 , H01L29/49 , H01L29/786 , H01L27/01 , H01L31/0392
CPC分类号： H01L21/28008 , H01L21/28158 , H01L21/84 , H01L27/11 , H01L27/1108 , H01L27/1203 , H01L29/4908 , H01L29/66765 , H01L29/78678 , Y10S257/903 , Y10S438/91
摘要： A thin film transistor in which a device active layer is formed on an insulation film, in which an interface state density present at the interface between the active layer and the insulation film is set to less than 1.times.10.sup.11 /cm.sup.2. The characteristics of TFT can be enhanced by decreasing the leak current and SRAM memory cell can be provided with easy design for the process and the structure while avoiding increase in the resistance and additional capacitance and ensuring voltage withstand.
摘要翻译：在绝缘膜上形成器件有源层的薄膜晶体管，其中存在于有源层和绝缘膜之间的界面处的界面态密度设定为小于1×10 11 / cm 2。可以通过减少漏电流来提高TFT的特性，并且可以为SRAM存储单元提供易于设计的工艺和结构，同时避免电阻和附加电容的增加以及确保耐压。

3. 发明授权

US07977140B2 Methods for producing solid-state imaging device and electronic device 失效
标题翻译：固态成像装置和电子装置的制造方法
公开(公告)号：US07977140B2
公开(公告)日：2011-07-12
申请号：US12382713
申请日：2009-03-23
申请人： Takeshi Takeda , Yukihiro Ando , Masaki Okamoto , Masayuki Okada , Kaori Takimoto , Katsuhisa Kugimiya , Tadayuki Kimura
发明人： Takeshi Takeda , Yukihiro Ando , Masaki Okamoto , Masayuki Okada , Kaori Takimoto , Katsuhisa Kugimiya , Tadayuki Kimura
IPC分类号： H01L21/00
CPC分类号： H01L27/14812 , H01L27/14831
摘要： A method for producing a solid-state imaging device includes steps of: forming transfer electrodes on a substrate having a plurality of light-sensing portions through a gate insulating layer so that the light-sensing portions are exposed; forming a planarized insulating layer on the substrate to cover the transfer electrodes formed on the substrate; forming openings in the planarized insulating layer so that each of the transfer electrodes is partly exposed out of the planarized insulating layer at a predetermined position; forming a wiring material layer so that the openings are filled with the wiring material layer; forming a resist layer on the wiring material layer; exposing and developing the resist layer so that only the resist layer in a predetermined area covering the openings is left; and patterning the wiring material layer using the exposed and developed resist layer to form connection wirings connected to the transfer electrodes by the openings.
摘要翻译：一种制造固态成像装置的方法，包括以下步骤：通过栅极绝缘层，在具有多个光检测部分的基板上形成转印电极，使得光敏部分露出; 在所述基板上形成平坦化的绝缘层，以覆盖形成在所述基板上的转移电极; 在平坦化绝缘层中形成开口，使得每个传输电极在预定位置部分地从平坦化绝缘层露出; 形成布线材料层，使得开口被布线材料层填充; 在所述布线材料层上形成抗蚀剂层; 曝光和显影抗蚀剂层，使得仅保留覆盖开口的预定区域中的抗蚀剂层; 并使用曝光和显影的抗蚀剂层图案化布线材料层，以形成通过开口连接到转印电极的连接布线。

4. 发明授权

US5869392A Method of fabricating a semiconductor device including a plurality of contact regions disposed at different depths 失效
标题翻译：制造半导体器件的方法，该半导体器件包括设置在不同深度的多个接触区域
公开(公告)号：US5869392A
公开(公告)日：1999-02-09
申请号：US762778
申请日：1996-12-10
申请人： Tadayuki Kimura
发明人： Tadayuki Kimura
IPC分类号： H01L21/28 , H01L21/768 , H01L23/485 , H01L23/522
CPC分类号： H01L21/76816 , H01L21/76877 , H01L23/485 , H01L23/5226 , H01L2924/0002
摘要： A method of fabricating a semiconductor device, which is capable of effectively forming high reliability contacts in a plurality of regions to be contacted which are formed at different depths. The method includes the steps of: forming an etching stopper layer on an insulating layer covering a plurality of the regions to be contacted and having a stepped shape; selectively forming, in a lower height area of the insulating layer having the stepped shape, a conductive plug layer connected to a deeper region to be contacted which is formed under the lower height area of the insulating layer; forming a planarization layer on the lower height area of the insulating layer, followed by planarization over the entire surface; and selectively forming contact holes reaching the plug layer and other shallower regions to be contacted, simultaneously.
摘要翻译：一种制造半导体器件的方法，其能够在形成在不同深度的多个待接触区域中有效地形成高可靠性触点。该方法包括以下步骤：在覆盖多个待接触区域并具有台阶形状的绝缘层上形成蚀刻停止层; 在具有阶梯形状的绝缘层的较低高度区域选择性地形成连接到形成在绝缘层的较低高度区域下方的待接触的较深区域的导电插塞层; 在绝缘层的下部高度区域上形成平坦化层，然后在整个表面上进行平坦化; 并且同时选择性地形成到达接触层和接触的其它较浅区域的接触孔。

5. 发明申请

US20090263929A1 Methods for producing solid-state imaging device and electronic device 失效
标题翻译：固态成像装置和电子装置的制造方法
公开(公告)号：US20090263929A1
公开(公告)日：2009-10-22
申请号：US12382713
申请日：2009-03-23
申请人： Takeshi Takeda , Yukihiro Ando , Masaki Okamoto , Masayuki Okada , Kaori Takimoto , Katsuhisa Kugimiya , Tadayuki Kimura
发明人： Takeshi Takeda , Yukihiro Ando , Masaki Okamoto , Masayuki Okada , Kaori Takimoto , Katsuhisa Kugimiya , Tadayuki Kimura
IPC分类号： H01L31/00
CPC分类号： H01L27/14812 , H01L27/14831
摘要： A method for producing a solid-state imaging device includes steps of: forming transfer electrodes on a substrate having a plurality of light-sensing portions through a gate insulating layer so that the light-sensing portions are exposed; forming a planarized insulating layer on the substrate to cover the transfer electrodes formed on the substrate; forming openings in the planarized insulating layer so that each of the transfer electrodes is partly exposed out of the planarized insulating layer at a predetermined position; forming a wiring material layer so that the openings are filled with the wiring material layer; forming a resist layer on the wiring material layer; exposing and developing the resist layer so that only the resist layer in a predetermined area covering the openings is left; and patterning the wiring material layer using the exposed and developed resist layer to form connection wirings connected to the transfer electrodes by the openings.
摘要翻译：一种制造固态成像装置的方法，包括以下步骤：通过栅极绝缘层，在具有多个光检测部分的基板上形成转印电极，使得光敏部分露出; 在所述基板上形成平坦化的绝缘层，以覆盖形成在所述基板上的转移电极; 在平坦化绝缘层中形成开口，使得每个传输电极在预定位置部分地暴露在平坦化绝缘层之外; 形成布线材料层，使得开口被布线材料层填充; 在所述布线材料层上形成抗蚀剂层; 曝光和显影抗蚀剂层，使得仅保留覆盖开口的预定区域中的抗蚀剂层; 并使用曝光和显影的抗蚀剂层图案化布线材料层，以形成通过开口连接到转印电极的连接布线。

6. 发明授权

US5518939A Method and apparatus for static RAM 失效
标题翻译：静态RAM的方法和装置
公开(公告)号：US5518939A
公开(公告)日：1996-05-21
申请号：US389729
申请日：1995-02-15
申请人： Michio Negishi , Ihachi Naiki , Masayoshi Sasaki , Tadayuki Kimura
发明人： Michio Negishi , Ihachi Naiki , Masayoshi Sasaki , Tadayuki Kimura
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8244 , H01L21/84 , H01L27/11 , H01L27/12 , H01L29/49 , H01L29/786
CPC分类号： H01L21/28008 , H01L21/28158 , H01L21/84 , H01L27/11 , H01L27/1108 , H01L27/1203 , H01L29/4908 , H01L29/66765 , H01L29/78678 , Y10S257/903 , Y10S438/91
摘要： A thin film transistor in which a device active layer is formed on an insulation film, in which an interface state density present at the interface between the active layer and the insulation film is set to less than 1.times.10.sup.11 /cm.sup.2. The characteristics of TFT can be enhanced by decreasing the leak current and SRAM memory cell can be provided with easy design for the process and the structure while avoiding increase in the resistance and additional capacitance and ensuring voltage withstand.
摘要翻译：在绝缘膜上形成器件有源层的薄膜晶体管，其中存在于有源层和绝缘膜之间的界面处的界面态密度设定为小于1×10 11 / cm 2。可以通过减少漏电流来提高TFT的特性，并且可以为SRAM存储单元提供易于设计的工艺和结构，同时避免电阻和附加电容的增加以及确保耐压。

7. 发明授权

US5498557A Method of making SRAM to improve interface state density utilizing PMOS TFT 失效
标题翻译：利用PMOS TFT制作SRAM以提高界面态密度的方法
公开(公告)号：US5498557A
公开(公告)日：1996-03-12
申请号：US227343
申请日：1994-04-14
申请人： Michio Negishi , Ihachi Naiki , Masayoshi Sasaki , Tadayuki Kimura
发明人： Michio Negishi , Ihachi Naiki , Masayoshi Sasaki , Tadayuki Kimura
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8244 , H01L21/84 , H01L27/11 , H01L27/12 , H01L29/49 , H01L29/786
CPC分类号： H01L21/28008 , H01L21/28158 , H01L21/84 , H01L27/11 , H01L27/1108 , H01L27/1203 , H01L29/4908 , H01L29/66765 , H01L29/78678 , Y10S257/903 , Y10S438/91
摘要： A thin film transistor in which a device active layer is formed on an insulation film. In which an interface state density present at the interface between the active layer and the insulation film is set to less than 1.times.10.sup.11 /cm.sup.2. The characteristics of TFT can be enhanced by decreasing the leak current and SRAM memory cell can be provided with easy design for the process and the structure while avoiding increase in the resistance and additional capacitance and ensuring voltage withstand.
摘要翻译：在绝缘膜上形成有器件活性层的薄膜晶体管。其中存在于有源层和绝缘膜之间的界面处的界面态密度设定为小于1×10 11 / cm 2。可以通过减少漏电流来提高TFT的特性，并且可以为SRAM存储单元提供易于设计的工艺和结构，同时避免电阻和附加电容的增加以及确保耐压。

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