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    • 7. 发明申请
    • A SYSTEM FOR ACQUIRING DEVICE PARAMETERS
    • 用于获取设备参数的系统
    • US20080018356A1
    • 2008-01-24
    • US11459367
    • 2006-07-24
    • Darren L AnandNazmul HabibRobert J. McMahonTroy J. Perry
    • Darren L AnandNazmul HabibRobert J. McMahonTroy J. Perry
    • G01R31/26
    • G01R31/318511G01R31/31723G01R31/31724
    • A system for performing device-specific testing and acquiring parametric data on custom integrated circuits, for example ASICs, such that each chip is tested individually without excessive test time requirements, additional silicon, or special test equipment. The testing system includes a device test structure integrated into unused backfill space in an ASIC design which tests a set of dummy devices that are identical to some of those of the ASIC. The device test structure includes control logic for designating the type of test and which device types to activate (e.g. pFETs or nFETs), a protection circuit for protecting the SPM when the test is inactive, an isolation circuit for isolating the devices under test (DUT) from any leakage current during test, and a decode circuit for providing test input (e.g. voltages) to the DUT. By controlling which devices to test and the voltage conditions of those devices, the system calculates the relative product yield and health of the line on a die by die basis.
    • 用于执行特定于设备的测试和获取定制集成电路(例如ASIC)的参数数据的系统,使得每个芯片被单独测试而没有过多的测试时间要求,附加的硅或特殊的测试设备。 测试系统包括在ASIC设计中集成到未使用的回填空间中的器件测试结构,其测试与ASIC中的一些相同的一组虚设器件。 器件测试结构包括用于指定测试类型和要激活的器件类型(例如pFET或nFET)的控制逻辑,用于在测试无效时保护SPM的保护电路,用于隔离被测器件(DUT)的隔离电路 )和测试期间的任何漏电流的解码电路,以及用于向DUT提供测试输入(例如电压)的解码电路。 通过控制要测试的设备和这些设备的电压条件,系统通过模具计算芯片上的线路的相对产品产量和健康状况。