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1. 发明授权

US07382149B2 System for acquiring device parameters 有权
标题翻译：用于获取设备参数的系统
公开(公告)号：US07382149B2
公开(公告)日：2008-06-03
申请号：US11459367
申请日：2006-07-24
申请人： Darren L. Anand , Nazmul Habib , Robert J. McMahon , Troy J. Perry
发明人： Darren L. Anand , Nazmul Habib , Robert J. McMahon , Troy J. Perry
IPC分类号： G01R31/26
CPC分类号： G01R31/318511 , G01R31/31723 , G01R31/31724
摘要： A system for performing device-specific testing and acquiring parametric data on custom integrated circuits, for example ASICs, such that each chip is tested individually without excessive test time requirements, additional silicon, or special test equipment. The testing system includes a device test structure integrated into unused backfill space in an ASIC design which tests a set of dummy devices that are identical to some of those of the ASIC. The device test structure includes control logic for designating the type of test and which device types to activate (e.g. pFETs or nFETs), a protection circuit for protecting the SPM when the test is inactive, an isolation circuit for isolating the devices under test (DUT) from any leakage current during test, and a decode circuit for providing test input (e.g. voltages) to the DUT. By controlling which devices to test and the voltage conditions of those devices, the system calculates the relative product yield and health of the line on a die by die basis.
摘要翻译：用于执行特定于设备的测试和获取定制集成电路（例如ASIC）的参数数据的系统，使得每个芯片被单独测试而没有过多的测试时间要求，附加的硅或特殊的测试设备。测试系统包括在ASIC设计中集成到未使用的回填空间中的器件测试结构，其测试与ASIC中的一些相同的一组虚设器件。器件测试结构包括用于指定测试类型和要激活的器件类型（例如pFET或nFET）的控制逻辑，用于在测试无效时保护SPM的保护电路，用于隔离被测器件（DUT）的隔离电路）和测试期间的任何漏电流的解码电路，以及用于向DUT提供测试输入（例如电压）的解码电路。通过控制要测试的设备和这些设备的电压条件，系统通过模具计算芯片上的线路的相对产品产量和健康状况。

2. 发明申请

US20080104551A1 DESIGN STRUCTURE FOR PROVIDING OPTIMAL FIELD PROGRAMMING OF ELECTRONIC FUSES 失效
标题翻译：提供电子熔模最佳实地编程的设计结构
公开(公告)号：US20080104551A1
公开(公告)日：2008-05-01
申请号：US11850477
申请日：2007-09-05
申请人： Michael R. OUELLETTE , Troy J. PERRY
发明人： Michael R. OUELLETTE , Troy J. PERRY
IPC分类号： G06F17/50
CPC分类号： G11C17/18 , G11C17/165 , G11C29/027
摘要： A design structure for providing optimal fuse programming conditions by which an integrated circuit chip customer may program electronic fuses in the field, i.e., outside of the manufacturing test environment. An optimal fuse programming identifier, which is correlated to optimal fuse programming conditions, may be provided to the customer in readable fashion on the customer's IC chip. Accessing the optimal fuse programming identifier on the customer's IC chip, the customer may apply a fuse programming process in the field according to one or more correlated optimal fuse programming conditions.
摘要翻译：用于提供最佳熔丝编程条件的设计结构，集成电路芯片客户可以通过该条件来编程现场的电子熔丝，即在制造测试环境之外。可以以客户的IC芯片的可读方式向客户提供与最佳熔丝编程条件相关的最佳熔丝编程标识符。访问客户IC芯片上的最佳熔丝编程标识符，客户可以根据一个或多个相关的最佳熔丝编程条件在现场应用熔丝编程过程。

3. 发明授权

US07791972B2 Design structure for providing optimal field programming of electronic fuses 失效
标题翻译：提供电子保险丝最佳现场编程的设计结构
公开(公告)号：US07791972B2
公开(公告)日：2010-09-07
申请号：US11850477
申请日：2007-09-05
申请人： Michael R. Ouelette , Troy J. Perry
发明人： Michael R. Ouelette , Troy J. Perry
IPC分类号： G11C17/18
CPC分类号： G11C17/18 , G11C17/165 , G11C29/027
摘要： A design structure for providing optimal fuse programming conditions by which an integrated circuit chip customer may program electronic fuses in the field, i.e., outside of the manufacturing test environment. An optimal fuse programming identifier, which is correlated to optimal fuse programming conditions, may be provided to the customer in readable fashion on the customer's IC chip. Accessing the optimal fuse programming identifier on the customer's IC chip, the customer may apply a fuse programming process in the field according to one or more correlated optimal fuse programming conditions.
摘要翻译：用于提供最佳熔丝编程条件的设计结构，集成电路芯片客户可以通过该条件来编程现场的电子熔丝，即在制造测试环境之外。可以以客户的IC芯片的可读方式向客户提供与最佳熔丝编程条件相关的最佳熔丝编程标识符。访问客户IC芯片上的最佳熔丝编程标识符，客户可以根据一个或多个相关的最佳熔丝编程条件在现场应用熔丝编程过程。

4. 发明授权

US07170299B1 Electronic fuse blow mimic and methods for adjusting electronic fuse blow 失效
标题翻译：电子保险丝熔断模拟和电子保险丝熔断的方法
公开(公告)号：US07170299B1
公开(公告)日：2007-01-30
申请号：US11276120
申请日：2006-02-15
申请人： Darren L. Anand , Michael R. Ouellette , Troy J. Perry
发明人： Darren L. Anand , Michael R. Ouellette , Troy J. Perry
IPC分类号： H01H85/30 , H01H85/00 , G01R31/00
CPC分类号： G11C17/16 , G01R31/07 , G11C17/165 , G11C17/18 , G11C29/02 , G11C29/027 , G11C29/028 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A system, method and program product for adjusting an environmental variable of a fuse blow of an electronic fuse are disclosed. A mimic NFET is coupled to a fuse blow source voltage line, a fuse blow gate voltage line, and a chip ground in the same manner as the electronic fuse, except that the mimic NFET is not attached to a poly fuse link. The on current (ion) and off current (ioff) of the mimic NFET are measured to determine a blow current of the electronic fuse. The environmental variable is adjusted based on the determined blow current.
摘要翻译：公开了一种用于调整电子保险丝熔断器的环境变量的系统，方法和程序产品。模拟NFET以与电子熔断器相同的方式耦合到保险丝熔断器电压线，保险丝熔断栅极电压线和芯片接地，除了模拟NFET未连接到多晶硅熔丝链路。测量模拟NFET的导通电流（离子）和截止电流（ioff），以确定电子熔断器的吹扫电流。环境变量根据确定的吹扫电流进行调整。

5. 发明申请

US20080018356A1 A SYSTEM FOR ACQUIRING DEVICE PARAMETERS 有权
标题翻译：用于获取设备参数的系统
公开(公告)号：US20080018356A1
公开(公告)日：2008-01-24
申请号：US11459367
申请日：2006-07-24
申请人： Darren L Anand , Nazmul Habib , Robert J. McMahon , Troy J. Perry
发明人： Darren L Anand , Nazmul Habib , Robert J. McMahon , Troy J. Perry
IPC分类号： G01R31/26
CPC分类号： G01R31/318511 , G01R31/31723 , G01R31/31724
摘要： A system for performing device-specific testing and acquiring parametric data on custom integrated circuits, for example ASICs, such that each chip is tested individually without excessive test time requirements, additional silicon, or special test equipment. The testing system includes a device test structure integrated into unused backfill space in an ASIC design which tests a set of dummy devices that are identical to some of those of the ASIC. The device test structure includes control logic for designating the type of test and which device types to activate (e.g. pFETs or nFETs), a protection circuit for protecting the SPM when the test is inactive, an isolation circuit for isolating the devices under test (DUT) from any leakage current during test, and a decode circuit for providing test input (e.g. voltages) to the DUT. By controlling which devices to test and the voltage conditions of those devices, the system calculates the relative product yield and health of the line on a die by die basis.
摘要翻译：用于执行特定于设备的测试和获取定制集成电路（例如ASIC）的参数数据的系统，使得每个芯片被单独测试而没有过多的测试时间要求，附加的硅或特殊的测试设备。测试系统包括在ASIC设计中集成到未使用的回填空间中的器件测试结构，其测试与ASIC中的一些相同的一组虚设器件。器件测试结构包括用于指定测试类型和要激活的器件类型（例如pFET或nFET）的控制逻辑，用于在测试无效时保护SPM的保护电路，用于隔离被测器件（DUT）的隔离电路）和测试期间的任何漏电流的解码电路，以及用于向DUT提供测试输入（例如电压）的解码电路。通过控制要测试的设备和这些设备的电压条件，系统通过模具计算芯片上的线路的相对产品产量和健康状况。

6. 发明授权

US07518899B2 Method of providing optimal field programming of electronic fuses 失效
标题翻译：提供电子保险丝最佳现场编程的方法
公开(公告)号：US07518899B2
公开(公告)日：2009-04-14
申请号：US11555323
申请日：2006-11-01
申请人： Troy J. Perry , Michael J. Ouellette
发明人： Troy J. Perry , Michael J. Ouellette
IPC分类号： G11C17/00
CPC分类号： G11C17/18 , G11C17/165 , G11C29/02 , G11C29/021 , G11C29/027 , G11C29/028 , G11C2029/5006
摘要： A method of providing optimal fuse programming conditions by which an integrated circuit chip customer may program electronic fuses in the field, i.e., outside of the manufacturing test environment. An optimal fuse programming identifier, which is correlated to optimal fuse programming conditions, may be provided to the customer in readable fashion on the customer's IC chip. Accessing the optimal fuse programming identifier on the customer's IC chip, the customer may apply a fuse programming process in the field according to one or more correlated optimal fuse programming conditions.
摘要翻译：一种提供最佳熔丝编程条件的方法，集成电路芯片客户可以通过该条件来编程现场的电子熔丝，即在制造测试环境之外。可以以客户的IC芯片的可读方式向客户提供与最佳熔丝编程条件相关的最佳熔丝编程标识符。访问客户IC芯片上的最佳熔丝编程标识符，客户可以根据一个或多个相关的最佳熔丝编程条件在现场应用熔丝编程过程。

7. 发明申请

US20080101145A1 Method Of Providing Optimal Field Programming Of Electronic Fuses 失效
标题翻译：提供电子保险丝最优现场编程的方法
公开(公告)号：US20080101145A1
公开(公告)日：2008-05-01
申请号：US11555323
申请日：2006-11-01
申请人： Troy J. Perry , Michael R. Ouellette
发明人： Troy J. Perry , Michael R. Ouellette
IPC分类号： G11C17/18
CPC分类号： G11C17/18 , G11C17/165 , G11C29/02 , G11C29/021 , G11C29/027 , G11C29/028 , G11C2029/5006
摘要： A method of providing optimal fuse programming conditions by which an integrated circuit chip customer may program electronic fuses in the field, i.e., outside of the manufacturing test environment. An optimal fuse programming identifier, which is correlated to optimal fuse programming conditions, may be provided to the customer in readable fashion on the customer's IC chip. Accessing the optimal fuse programming identifier on the customer's IC chip, the customer may apply a fuse programming process in the field according to one or more correlated optimal fuse programming conditions.
摘要翻译：一种提供最佳熔丝编程条件的方法，集成电路芯片客户可以通过该条件来编程现场的电子熔丝，即在制造测试环境之外。可以以客户的IC芯片的可读方式向客户提供与最佳熔丝编程条件相关的最佳熔丝编程标识符。访问客户IC芯片上的最佳熔丝编程标识符，客户可以根据一个或多个相关的最佳熔丝编程条件在现场应用熔丝编程过程。

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