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1. 发明授权

US08163607B2 Semiconductor device and method of making the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08163607B2
公开(公告)日：2012-04-24
申请号：US12769649
申请日：2010-04-29
申请人： Yi-Wei Chen , Nien-Ting Ho , Kuo-Chih Lai , Chien-Chung Huang
发明人： Yi-Wei Chen , Nien-Ting Ho , Kuo-Chih Lai , Chien-Chung Huang
IPC分类号： H01L21/8283
CPC分类号： H01L29/665 , H01L21/26506 , H01L21/26513 , H01L21/2652 , H01L21/28518 , H01L21/823443 , H01L21/823835 , H01L29/6659 , H01L29/7833
摘要： In a method of the present invention during a salicide process, before a second thermal process, a dopant is implanted at a place located in a region ranging from a NixSi layer at meddle height down to a front thereof, or before formation of the NixSi layer, located in a region ranging from a silicon layer at a depth ranging from a half of a predetermined thickness of a NiSi layer down to a depth where is a predetermined front of the NiSi layer. The dopant is allowed to be heated with the NixSi layer together during the second thermal process to form a Si/NiSi2/NiSi interface which may reduce SBH and improve series resistance to obtain a semiconductor device having an excellent performance.
摘要翻译：在本发明的方法中，在自对准硅化物工艺中，在第二热处理之前，将掺杂剂注入位于从中间高度的NixSi层到其前面的区域中，或者在形成NixSi层之前位于从NiSi层的预定厚度的一半的深度到位于NiSi层的预定前方的深度的硅层的范围内。在第二热处理期间允许掺杂剂与NixSi层一起加热以形成Si / NiSi 2 / NiSi界面，其可以降低SBH并提高串联电阻以获得具有优异性能的半导体器件。

2. 发明申请

US20120181635A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20120181635A1
公开(公告)日：2012-07-19
申请号：US13424398
申请日：2012-03-20
申请人： Yi-Wei Chen , Nien-Ting Ho , Kuo-Chih Lai , Chien-Chung Huang
发明人： Yi-Wei Chen , Nien-Ting Ho , Kuo-Chih Lai , Chien-Chung Huang
IPC分类号： H01L29/78
CPC分类号： H01L29/665 , H01L21/26506 , H01L21/26513 , H01L21/2652 , H01L21/28518 , H01L21/823443 , H01L21/823835 , H01L29/6659 , H01L29/7833
摘要： In a method of the present invention during a salicide process, before a second thermal process, a dopant is implanted at a place located in a region ranging from a NixSi layer at meddle height down to a front thereof, or before formation of the NixSi layer, located in a region ranging from a silicon layer at a depth ranging from a half of a predetermined thickness of a NiSi layer down to a depth where is a predetermined front of the NiSi layer. The dopant is allowed to be heated with the NixSi layer together during the second thermal process to form a Si/NiSi2/NiSi interface which may reduce SBH and improve series resistance to obtain a semiconductor device having an excellent performance.
摘要翻译：在本发明的方法中，在自对准硅化物工艺中，在第二热处理之前，将掺杂剂注入位于从中间高度的NixSi层到其前面的区域中，或者在形成NixSi层之前位于从NiSi层的预定厚度的一半的深度到位于NiSi层的预定前方的深度的硅层的范围内。在第二热处理期间允许掺杂剂与NixSi层一起加热以形成Si / NiSi 2 / NiSi界面，其可以降低SBH并提高串联电阻以获得具有优异性能的半导体器件。

3. 发明授权

US08067281B1 Method of fabricating complementary metal-oxide-semiconductor (CMOS) Device 有权
标题翻译：互补金属氧化物半导体（CMOS）器件的制造方法
公开(公告)号：US08067281B1
公开(公告)日：2011-11-29
申请号：US12830371
申请日：2010-07-05
申请人： Yi-Wei Chen , Chien-Chung Huang , Nien-Ting Ho , Kuo-Chih Lai
发明人： Yi-Wei Chen , Chien-Chung Huang , Nien-Ting Ho , Kuo-Chih Lai
IPC分类号： H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/7848
摘要： A method of fabricating a CMOS device is provided. First, first and second gates, first and second offset spacers and first and second lightly-doped regions are respectively formed in first and second type metal-oxide-semiconductor regions. A mask layer is respectively formed on the first and second gates. Next, an epitaxial layer is formed in the substrate on two sides of the second gate. Next, first and second spacers, first and second doped regions are formed. Next, a portion of the first spacer is removed to expose a portion of a surface of the first lightly-doped region, thereby forming a first slimmed spacer. Next, a coating layer containing silicon is formed to cover the exposed first lightly-doped region, the first and second doped regions. Next, the mask layer is removed. Next, a metal silicide layer is formed on the first and second gates and the silicon layer.
摘要翻译：提供一种制造CMOS器件的方法。首先，第一和第二栅极分别在第一和第二类型金属氧化物半导体区域中形成第一和第二偏移间隔物以及第一和第二轻掺杂区域。掩模层分别形成在第一和第二栅极上。接下来，在第二栅极的两侧的基板中形成外延层。接下来，形成第一和第二间隔物，形成第一和第二掺杂区域。接下来，去除第一间隔物的一部分以暴露第一轻掺杂区域的表面的一部分，从而形成第一细长间隔物。接下来，形成包含硅的涂层以覆盖暴露的第一轻掺杂区域，第一和第二掺杂区域。接下来，去除掩模层。接下来，在第一和第二栅极和硅层上形成金属硅化物层。

4. 发明授权

US08344465B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08344465B2
公开(公告)日：2013-01-01
申请号：US13424398
申请日：2012-03-20
申请人： Yi-Wei Chen , Nien-Ting Ho , Kuo-Chih Lai , Chien-Chung Huang
发明人： Yi-Wei Chen , Nien-Ting Ho , Kuo-Chih Lai , Chien-Chung Huang
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L29/665 , H01L21/26506 , H01L21/26513 , H01L21/2652 , H01L21/28518 , H01L21/823443 , H01L21/823835 , H01L29/6659 , H01L29/7833
摘要： In a method of the present invention during a salicide process, before a second thermal process, a dopant is implanted at a place located in a region ranging from a NixSi layer at middle height down to a front thereof, or before formation of the NixSi layer, located in a region ranging from a silicon layer at a depth ranging from a half of a predetermined thickness of a NiSi layer down to a depth where is a predetermined front of the NiSi layer. The dopant is allowed to be heated with the NixSi layer together during the second thermal process to form a Si/NiSi2/NiSi interface which may reduce SBH and improve series resistance to obtain a semiconductor device having an excellent performance.
摘要翻译：在本发明的方法中，在自对准硅化物工艺中，在第二热处理之前，将掺杂剂注入位于从中间高度的NixSi层到其前面的区域中，或者在形成NixSi层之前位于从NiSi层的预定厚度的一半的深度到位于NiSi层的预定前方的深度的硅层的范围内。在第二热处理期间允许掺杂剂与NixSi层一起加热以形成Si / NiSi 2 / NiSi界面，其可以降低SBH并提高串联电阻以获得具有优异性能的半导体器件。

5. 发明申请

US20120088345A1 METHOD OF FORMING SILICIDE FOR CONTACT PLUGS 审中-公开
标题翻译：形成接触片硅氧烷的方法
公开(公告)号：US20120088345A1
公开(公告)日：2012-04-12
申请号：US12902149
申请日：2010-10-12
申请人： Yi-Wei Chen , Kuo-Chih Lai , Nien-Ting Ho , Chien-Chung Huang
发明人： Yi-Wei Chen , Kuo-Chih Lai , Nien-Ting Ho , Chien-Chung Huang
IPC分类号： H01L21/336
CPC分类号： H01L29/6659 , H01L21/28518 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/7833 , H01L29/7843 , H01L29/7848
摘要： A method for forming silicide is provided. First, a substrate is provided. Second, a gate structure is formed on the substrate which includes a silicon layer, a gate dielectric layer and at least one spacer. Then, a pair of source and drain is formed in the substrate and adjacent to the gate structure. Later, an interlayer dielectric layer is formed to cover the gate structure, the source and the drain. Afterwards, the interlayer dielectric layer is selectively removed to expose the gate structure. Next, multiple contact holes are formed in the interlayer dielectric layer to expose part of the substrate. Afterwards, the exposed substrate is converted to form silicide.
摘要翻译：提供了一种形成硅化物的方法。首先，提供基板。其次，在包括硅层，栅极电介质层和至少一个间隔物的基板上形成栅极结构。然后，在衬底中形成一对源极和漏极，并且与栅极结构相邻。然后，形成层间电介质层以覆盖栅极结构，源极和漏极。然后，选择性地去除层间绝缘层以露出栅极结构。接下来，在层间电介质层中形成多个接触孔，露出基板的一部分。之后，将曝光的基底转变成硅化物。

6. 发明申请

US20110266596A1 Semiconductor device and method of making the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110266596A1
公开(公告)日：2011-11-03
申请号：US12769649
申请日：2010-04-29
申请人： Yi-Wei Chen , Nien-Ting Ho , Kuo-Chih Lai , Chien-Chung Huang
发明人： Yi-Wei Chen , Nien-Ting Ho , Kuo-Chih Lai , Chien-Chung Huang
IPC分类号： H01L29/78 , H01L21/8234 , H01L21/336
CPC分类号： H01L29/665 , H01L21/26506 , H01L21/26513 , H01L21/2652 , H01L21/28518 , H01L21/823443 , H01L21/823835 , H01L29/6659 , H01L29/7833
摘要： In a method of the present invention during a salicide process, before a second thermal process, a dopant is implanted at a place located in a region ranging from a NixSi layer at meddle height down to a front thereof, or before formation of the NixSi layer, located in a region ranging from a silicon layer at a depth ranging from a half of a predetermined thickness of a NiSi layer down to a depth where is a predetermined front of the NiSi layer. The dopant is allowed to be heated with the NixSi layer together during the second thermal process to form a Si/NiSi2/NiSi interface which may reduce SBH and improve series resistance to obtain a semiconductor device having an excellent performance.
摘要翻译：在本发明的方法中，在自对准硅化物工艺中，在第二热处理之前，将掺杂剂注入位于从中间高度的NixSi层到其前面的区域中，或者在形成NixSi层之前位于从NiSi层的预定厚度的一半的深度到位于NiSi层的预定前方的深度的硅层的范围内。在第二热处理期间允许掺杂剂与NixSi层一起加热以形成Si / NiSi 2 / NiSi界面，其可以降低SBH并提高串联电阻以获得具有优异性能的半导体器件。

7. 发明申请

US20090090395A1 METHOD OF REMOVING PARTICLES FROM WAFER 有权
标题翻译：从颗粒中去除颗粒的方法
公开(公告)号：US20090090395A1
公开(公告)日：2009-04-09
申请号：US11866746
申请日：2007-10-03
申请人： Yi-Wei Chen , Bao-Tzeng Huang , An-Chi Liu , Chao-Ching Hsieh , Nien-Ting Ho , Kuo-Chih Lai
发明人： Yi-Wei Chen , Bao-Tzeng Huang , An-Chi Liu , Chao-Ching Hsieh , Nien-Ting Ho , Kuo-Chih Lai
IPC分类号： B08B3/04
CPC分类号： B08B3/08 , H01L21/02068 , H01L21/67051
摘要： A method of removing particles from a wafer is provided. The method is adopted after a process for removing unreactive metal of a salicide process or after a salicide process and having oxide residue remaining on a wafer or after a chemical vapor deposition (CVD) process that resulted with particles on a wafer. The method includes performing at least two cycles (stages) of intermediate rinse process. Each cycle of the intermediate rinse process includes conducting a procedure of rotating the wafer at a high speed first, and then conducting a procedure of rotating the wafer at a low speed.
摘要翻译：提供了从晶片去除颗粒的方法。在除去自对准硅化物工艺的非反应性金属或自对准硅化物工艺之后并且在晶片上残留氧化物残余物或在晶片上产生颗粒的化学气相沉积（CVD）工艺之后，采用该方法。该方法包括进行中间漂洗过程的至少两个循环（阶段）。中间漂洗过程的每个循环包括首先进行高速旋转晶片的步骤，然后进行以低速旋转晶片的步骤。

8. 发明授权

US07943512B2 Method for fabricating metal silicide 有权
标题翻译：金属硅化物的制造方法
公开(公告)号：US07943512B2
公开(公告)日：2011-05-17
申请号：US11955698
申请日：2007-12-13
申请人： Yi-Wei Chen , Kuo-Chih Lai , Nien-Ting Ho
发明人： Yi-Wei Chen , Kuo-Chih Lai , Nien-Ting Ho
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/02068 , H01L21/32134
摘要： A method for fabricating a metal silicide film is described. After providing a silicon material layer, a metal alloy layer is formed to cover the silicon material layer. A thermal process is performed to form a metal alloy silicide layer in a self-aligned way. A wet etching process is performed by using a cleaning solution including sulfuric acid and hydrogen peroxide to remove the residual metals and unreacted metal alloy.
摘要翻译：描述了制造金属硅化物膜的方法。在提供硅材料层之后，形成覆盖硅材料层的金属合金层。进行热处理以自对准的方式形成金属合金硅化物层。通过使用包含硫酸和过氧化氢的清洗溶液来除去残留的金属和未反应的金属合金，进行湿蚀刻工艺。

9. 发明授权

US07803702B2 Method for fabricating MOS transistors 有权
标题翻译：制造MOS晶体管的方法
公开(公告)号：US07803702B2
公开(公告)日：2010-09-28
申请号：US12189203
申请日：2008-08-11
申请人： Kuo-Chih Lai , Yi-Wei Chen , Nien-Ting Ho , Teng-Chun Tsai
发明人： Kuo-Chih Lai , Yi-Wei Chen , Nien-Ting Ho , Teng-Chun Tsai
IPC分类号： H01L21/28
CPC分类号： H01L21/28518 , H01L29/165 , H01L29/6659 , H01L29/66636
摘要： A method for fabricating metal-oxide transistors is disclosed. First, a semiconductor substrate having a gate structure is provided, in which the gate structure includes a gate dielectric layer and a gate. A source/drain region is formed in the semiconductor substrate, and a cleaning step is performed to fully remove native oxides from the surface of the semiconductor substrate. An oxidation process is conducted to form an oxide layer on the semiconductor substrate and the oxide layer is then treated with fluorine-containing plasma to form a fluorine-containing layer on the surface of the semiconductor substrate. A metal layer is deposited on the semiconductor substrate thereafter and a thermal treatment is performed to transform the metal layer into a silicide layer.
摘要翻译：公开了一种用于制造金属氧化物晶体管的方法。首先，提供具有栅极结构的半导体衬底，其中栅极结构包括栅极介电层和栅极。在半导体衬底中形成源极/漏极区域，并且执行清洁步骤以从半导体衬底的表面中完全去除天然氧化物。进行氧化处理以在半导体衬底上形成氧化物层，然后用含氟等离子体处理氧化物层，以在半导体衬底的表面上形成含氟层。此后，在半导体衬底上沉积金属层，并进行热处理以将金属层转变成硅化物层。

10. 发明授权

US07670438B2 Method of removing particles from wafer 有权
标题翻译：从晶片去除颗粒的方法
公开(公告)号：US07670438B2
公开(公告)日：2010-03-02
申请号：US11866746
申请日：2007-10-03
申请人： Yi-Wei Chen , Bao-Tzeng Huang , An-Chi Liu , Chao-Ching Hsieh , Nien-Ting Ho , Kuo-Chih Lai
发明人： Yi-Wei Chen , Bao-Tzeng Huang , An-Chi Liu , Chao-Ching Hsieh , Nien-Ting Ho , Kuo-Chih Lai
IPC分类号： B08B3/04
CPC分类号： B08B3/08 , H01L21/02068 , H01L21/67051
摘要： A method of removing particles from a wafer is provided. The method is adopted after a process for removing unreactive metal of a salicide process or after a salicide process and having oxide residue remaining on a wafer or after a chemical vapor deposition (CVD) process that resulted with particles on a wafer. The method includes performing at least two cycles (stages) of intermediate rinse process. Each cycle of the intermediate rinse process includes conducting a procedure of rotating the wafer at a high speed first, and then conducting a procedure of rotating the wafer at a low speed.
摘要翻译：提供了从晶片去除颗粒的方法。在除去自对准硅化物工艺的非反应性金属或自对准硅化物工艺之后并且在晶片上残留氧化物残余物或在晶片上产生颗粒的化学气相沉积（CVD）工艺之后，采用该方法。该方法包括进行中间漂洗过程的至少两个循环（阶段）。中间漂洗过程的每个循环包括首先进行高速旋转晶片的步骤，然后进行以低速旋转晶片的步骤。

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