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1. 发明授权

US07778379B2 Shift register apparatus 有权
标题翻译：移位寄存器
公开(公告)号：US07778379B2
公开(公告)日：2010-08-17
申请号：US12342042
申请日：2008-12-22
申请人： Yi-Suei Liao , Chien-Liang Chen , Chen-Lun Chiu , Hao-Chieh Lee , Kuan-Yu Chen
发明人： Yi-Suei Liao , Chien-Liang Chen , Chen-Lun Chiu , Hao-Chieh Lee , Kuan-Yu Chen
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A shift register apparatus is provided. The pull-down unit of each of the shift registers in the shift register apparatus is controlled by itself, previous, and next two shift registers to enhance the ability of pull-down and voltage regulating. Therefore, the circuit structure of each of the shift registers does not need to be designed a large compensation capacitor therein to substantially restrain the coupling noise effect caused by the clock signal, and thus permitting that each of the shift registers can be collocated with a small compensation capacitor to enhance the output capability thereof.
摘要翻译：提供一种移位寄存器装置。移位寄存器装置中每个移位寄存器的下拉单元由本身，前一个和下一个两个移位寄存器控制，以增强下拉和电压调节的能力。因此，每个移位寄存器的电路结构不需要在其中设计大的补偿电容器，以基本上抑制由时钟信号引起的耦合噪声效应，并且因此允许每个移位寄存器可以以小的补偿电容器，以提高其输出能力。

2. 发明申请

US20100134234A1 SHIFT REGISTER APPARATUS 有权
标题翻译：移位寄存器
公开(公告)号：US20100134234A1
公开(公告)日：2010-06-03
申请号：US12342042
申请日：2008-12-22
申请人： Yi-Suei Liao , Chien-Liang Chen , Chen-Lun Chiu , Hao-Chieh Lee , Kuan-Yu Chen
发明人： Yi-Suei Liao , Chien-Liang Chen , Chen-Lun Chiu , Hao-Chieh Lee , Kuan-Yu Chen
IPC分类号： G11C19/28
CPC分类号： G11C19/28
摘要： A shift register apparatus is provided. The pull-down unit of each of the shift registers in the shift register apparatus is controlled by itself, previous, and next two shift registers to enhance the ability of pull-down and voltage regulating. Therefore, the circuit structure of each of the shift registers does not need to be designed a large compensation capacitor therein to substantially restrain the coupling noise effect caused by the clock signal, and thus permitting that each of the shift registers can be collocated with a small compensation capacitor to enhance the output capability thereof.
摘要翻译：提供一种移位寄存器装置。移位寄存器装置中每个移位寄存器的下拉单元由本身，前一个和下一个两个移位寄存器控制，以增强下拉和电压调节的能力。因此，每个移位寄存器的电路结构不需要在其中设计大的补偿电容器，以基本上抑制由时钟信号引起的耦合噪声效应，并且因此允许每个移位寄存器可以以小的补偿电容器，以提高其输出能力。

3. 发明申请

US20110317803A1 SHIFT REGISTER CIRCUIT AND SHIFT REGISTER 审中-公开
标题翻译：移位寄存器电路和移位寄存器
公开(公告)号：US20110317803A1
公开(公告)日：2011-12-29
申请号：US13042702
申请日：2011-03-08
申请人： Chen-Lun CHIU , Yi-Suei Liao , Ping-Lin Chen , Kuan-Yu Chen
发明人： Chen-Lun CHIU , Yi-Suei Liao , Ping-Lin Chen , Kuan-Yu Chen
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G3/20 , G09G2310/0286
摘要： An exemplary shift register circuit includes a plurality of shift registers for sequentially outputting a plurality of driving pulse signals. Among each M number of the shift registers for sequentially outputting M number of the driving pulse signals, the shift register for lastly outputting one of the M number of driving pulse signals is enabled, by (M−1) number of start pulse signals sequentially outputted from the remained (M−1) number of the shift registers, to generate the driving pulse signal. Herein, M is a positive integer greater than 2. Moreover, a circuit structure of a shift register also is provided.
摘要翻译：示例性移位寄存器电路包括用于顺序地输出多个驱动脉冲信号的多个移位寄存器。在每个M个用于顺序地输出M个驱动脉冲信号的移位寄存器中，最后输出M个驱动脉冲信号中的一个的移位寄存器被使能，通过（M-1）个顺序输出的起始脉冲信号从剩余（M-1）个移位寄存器的数量，产生驱动脉冲信号。这里，M是大于2的正整数。此外，还提供了移位寄存器的电路结构。

4. 发明申请

US20120113068A1 LCD DRIVING CIRCUIT AND RELATED DRIVING METHOD 有权
标题翻译： LCD驱动电路及相关驱动方法
公开(公告)号：US20120113068A1
公开(公告)日：2012-05-10
申请号：US13080617
申请日：2011-04-05
申请人： Kuan-Yu Chen , Yi-Suei Liao
发明人： Kuan-Yu Chen , Yi-Suei Liao
IPC分类号： G06F3/038 , G11C19/00 , G09G3/36
CPC分类号： G09G3/3677 , G09G2230/00 , G09G2310/0286 , G11C19/28
摘要： An LCD device is configured to drive a plurality of shift register units using two clock signals having different driving abilities. Each shift register unit may thus generate a stronger signal for triggering a next-stage shift register unit, thereby improving cold-start. When the LCD device has been activated over a predetermined period of time, the driving ability of the clock signal having higher driving ability is gradually lowered, thereby reducing power consumption.
摘要翻译： LCD装置被配置为使用具有不同驱动能力的两个时钟信号来驱动多个移位寄存器单元。因此，每个移位寄存器单元可以产生用于触发下一级移位寄存器单元的更强信号，从而改善冷启动。当LCD装置在预定时间段内被激活时，具有较高驱动能力的时钟信号的驱动能力逐渐降低，从而降低功耗。

5. 发明授权

US08711077B2 LCD driving circuit in which shift register units are driven by a first clock signal of fixed duty/amplitude and a second clock signal of variable duty/amplitude 有权
标题翻译： LCD驱动电路，其中移位寄存器单元由固定占空比/幅度的第一时钟信号和可变占空比/幅度的第二时钟信号驱动
公开(公告)号：US08711077B2
公开(公告)日：2014-04-29
申请号：US13080617
申请日：2011-04-05
申请人： Kuan-Yu Chen , Yi-Suei Liao
发明人： Kuan-Yu Chen , Yi-Suei Liao
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2230/00 , G09G2310/0286 , G11C19/28
摘要： An LCD device is configured to drive a plurality of shift register units using two clock signals having different driving abilities. Each shift register unit may thus generate a stronger signal for triggering a next-stage shift register unit, thereby improving cold-start. When the LCD device has been activated over a predetermined period of time, the driving ability of the clock signal having higher driving ability is gradually lowered, thereby reducing power consumption.
摘要翻译： LCD装置被配置为使用具有不同驱动能力的两个时钟信号来驱动多个移位寄存器单元。因此，每个移位寄存器单元可以产生用于触发下一级移位寄存器单元的更强信号，从而改善冷启动。当LCD装置在预定时间段内被激活时，具有较高驱动能力的时钟信号的驱动能力逐渐降低，从而降低功耗。

6. 发明授权

US11670668B2 Light-emitting device 有权
公开(公告)号：US11670668B2
公开(公告)日：2023-06-06
申请号：US17199445
申请日：2021-03-12
申请人： Kuan-Yu Chen , Hsiao-Lung Lin , Hao-Hsiang Huang
发明人： Kuan-Yu Chen , Hsiao-Lung Lin , Hao-Hsiang Huang
IPC分类号： H01L27/15 , H01L33/56 , H01L33/54
CPC分类号： H01L27/156 , H01L33/54 , H01L33/56
摘要： A light-emitting device including a substrate, an insulating layer, an inner circuit structure, a plurality of light-emitting elements, an insulating encapsulation layer, and a transparent conductive layer is provided. The insulating layer is disposed on the substrate. The inner circuit structure is disposed on the insulating layer. The light-emitting elements are correspondingly disposed on the inner circuit structure. The insulating encapsulation layer is disposed on the inner circuit structure. The insulating encapsulating layer covers a portion of the inner circuit structure and encapsulates the light-emitting elements. The transparent conductive layer is disposed on the insulating encapsulating layer. The transparent conductive layer electrically connects the light-emitting elements, and serially connects the light-emitting elements.

7. 发明申请

US20230054463A1 Cutting Method by Using Particle Beam of Metallic Glass 有权
公开(公告)号：US20230054463A1
公开(公告)日：2023-02-23
申请号：US17405043
申请日：2021-08-18
申请人： Kuan-Wei Chen , Kuan-Yu Chen
发明人： Kuan-Wei Chen , Kuan-Yu Chen
IPC分类号： B24C11/00 , B24C1/04 , B24C3/32 , B24C5/06 , B24C5/08
摘要： A cutting method by applying a particle beam of metallic glass onto a substrate to cut or partially cut the substrate with high production efficiency, low production cost and better environmental protection.

8. 发明申请

US20200266377A1 ORGANIC LIGHT EMITTING DISPLAY DEVICE 审中-公开
公开(公告)号：US20200266377A1
公开(公告)日：2020-08-20
申请号：US16794255
申请日：2020-02-19
申请人： Kuan-Yu Chen , Hsiao-Lung Lin
发明人： Kuan-Yu Chen , Hsiao-Lung Lin
IPC分类号： H01L51/50 , H01L51/52
摘要： An organic light emitting display device including a substrate, an anode, a hole transport layer, a cathode, an electron transport layer and an organic light emitting layer is provided. The anode is located on the substrate. The hole transport layer is located on the anode. The cathode is located on the substrate. The electron transport layer is located on the cathode. The organic light emitting layer is located between the hole transport layer and the electron transport layer. A vertical projection of the anode on the substrate is not overlapped with a vertical projection of the cathode on the substrate.

9. 发明申请

US20150131766A1 APPARATUS AND METHOD FOR FREQUENCY LOCKING 有权
标题翻译：用于频率锁定的装置和方法
公开(公告)号：US20150131766A1
公开(公告)日：2015-05-14
申请号：US14135593
申请日：2013-12-20
申请人： Kuan-Yu Chen , Yuan-Min Hu
发明人： Kuan-Yu Chen , Yuan-Min Hu
IPC分类号： H04J3/06 , H04L7/033
CPC分类号： H04L7/033 , H03L7/087 , H04L7/005
摘要： An apparatus and a method for frequency locking are provided. The apparatus includes a phase-locked loop (PLL), a local clock generator, a data buffer unit and a control unit. The PLL locks the phase and the frequency of a radio frequency signal to generate a recovery clock signal and received data. The data buffer unit writes the received data into an elastic buffer of the data buffer unit according to the frequency of the recovery clock signal, and reads the received data from the elastic buffer according to the frequency of a local clock signal generated by the local clock generator. The control unit obtains a write-in address and a read-out address in the elastic buffer, and sends a control signal to the local clock generator for adjusting the frequency of the local clock signal according to relationship between the write-in address and the read-out address.
摘要翻译：提供一种用于频率锁定的装置和方法。该装置包括锁相环（PLL），本地时钟发生器，数据缓冲器单元和控制单元。 PLL锁定射频信号的相位和频率以产生恢复时钟信号和接收的数据。数据缓冲器单元根据恢复时钟信号的频率将接收到的数据写入数据缓冲器单元的弹性缓冲器，并根据由本地时钟产生的本地时钟信号的频率从弹性缓冲器读取接收的数据发电机。控制单元在弹性缓冲器中获得写入地址和读出地址，并且根据写入地址和写入地址之间的关系向本地时钟发生器发送控制信号以调整本地时钟信号的频率读出地址。

10. 发明授权

US08796788B2 Semiconductor devices with strained source/drain structures 有权
标题翻译：具有应变源/漏结构的半导体器件
公开(公告)号：US08796788B2
公开(公告)日：2014-08-05
申请号：US13009322
申请日：2011-01-19
申请人： Tsz-Mei Kwok , Hsueh-Chang Sung , Kuan-Yu Chen , Hsien-Hsin Lin
发明人： Tsz-Mei Kwok , Hsueh-Chang Sung , Kuan-Yu Chen , Hsien-Hsin Lin
IPC分类号： H01L29/772
CPC分类号： H01L29/6659 , H01L29/165 , H01L29/665 , H01L29/66628 , H01L29/66636 , H01L29/7834 , H01L29/7848
摘要： An integrated circuit device and method for manufacturing the integrated circuit device is disclosed. The disclosed method provides a processing for forming improved source/drain features in the semiconductor device. Semiconductor devices with the improved source/drain features may prevent or reduce defects and achieve high strain effect resulting from epi layers. In an embodiment, the source/drain features comprises a second portion surrounding a first portion, and a third portion between the second portion and the semiconductor substrate, wherein the second portion has a composition different from the first and third portions.
摘要翻译：公开了一种用于制造集成电路器件的集成电路器件和方法。所公开的方法提供了用于在半导体器件中形成改进的源极/漏极特征的处理。具有改善的源极/漏极特征的半导体器件可以防止或减少缺陷并实现由epi层产生的高应变效应。在一个实施例中，源极/漏极特征包括围绕第一部分的第二部分和在第二部分和半导体衬底之间的第三部分，其中第二部分具有不同于第一和第三部分的组成。

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