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    • 7. 发明授权
    • Method of manufacturing a semiconductor device
    • 制造半导体器件的方法
    • US07151043B2
    • 2006-12-19
    • US11082616
    • 2005-03-17
    • Tae-hyun KimByoung-moon YoonWon-jun LeeYong-sun KoKyung-hyun Kim
    • Tae-hyun KimByoung-moon YoonWon-jun LeeYong-sun KoKyung-hyun Kim
    • H01L21/76
    • H01L27/11521H01L21/76224H01L27/115
    • Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.
    • 提供制造半导体器件的方法。 在半导体衬底中形成沟槽。 形成部分填充沟槽的第一场氧化物层。 第一场氧化物层限定与沟槽相邻的衬底的有源区。 沟槽的侧壁的上部向上延伸超过第一场氧化物层的表面。 第一衬垫形成在第一场氧化物层上并且在沟槽的侧壁的部分上方向上延伸超过第一场氧化物层。 在第一衬垫上形成第二场氧化物层并填充沟槽。 每个部分去除第二场氧化物层和第一衬里以沿着衬底的有源区域暴露沟槽的顶部相邻表面和上侧壁。 介电层形成在沟槽的暴露的顶部相邻表面和上侧壁上。 在电介质层上形成栅电极。
    • 8. 发明申请
    • METHOD OF MANUFACTURING CMOS TRANSISTOR
    • 制造CMOS晶体管的方法
    • US20100178754A1
    • 2010-07-15
    • US12479112
    • 2009-06-05
    • Jun-youl YangByoung-moon YoonCheol-woo ParkWon-jun LeeKi-hyung Ko
    • Jun-youl YangByoung-moon YoonCheol-woo ParkWon-jun LeeKi-hyung Ko
    • H01L21/8238H01L21/20
    • H01L21/823828H01L21/32155H01L21/823842H01L29/66545
    • A method of manufacturing a complementary metal-oxide semiconductor (CMOS) transistor includes: forming a semiconductor layer in which an n-MOS transistor region and a p-MOS transistor region are defined; forming an insulation layer on the semiconductor layer; forming a conductive layer on the insulation layer; forming a mask pattern exposing the n-MOS transistor region, on the conductive layer; generating a damage region in an upper portion of the conductive layer by implanting impurities in the conductive layer of the n-MOS transistor region using the mask pattern as a mask; removing the mask pattern; removing the damage region; and patterning the conductive layer to form an n-MOS transistor gate and a p-MOS transistor gate. Accordingly, gate thinning and formation of a step between the n-MOS transistor region gate and the p-MOS transistor region gate can be prevented.
    • 制造互补金属氧化物半导体(CMOS)晶体管的方法包括:形成其中限定了n-MOS晶体管区域和p-MOS晶体管区域的半导体层; 在所述半导体层上形成绝缘层; 在绝缘层上形成导电层; 在所述导电层上形成暴露所述n-MOS晶体管区域的掩模图案; 通过使用掩模图案作为掩模在n-MOS晶体管区域的导电层中注入杂质,在导电层的上部产生损伤区域; 去除掩模图案; 去除损伤区域; 以及图案化导电层以形成n-MOS晶体管栅极和p-MOS晶体管栅极。 因此,可以防止栅极间化和在n-MOS晶体管区域栅极和p-MOS晶体管区域栅极之间形成台阶。
    • 9. 发明申请
    • Method of manufacturing a semiconductor device
    • 制造半导体器件的方法
    • US20050266647A1
    • 2005-12-01
    • US11082616
    • 2005-03-17
    • Tae-hyun KimByoung-moon YoonWon-jun LeeYong-sun KoKyung-hyun Kim
    • Tae-hyun KimByoung-moon YoonWon-jun LeeYong-sun KoKyung-hyun Kim
    • H01L21/76H01L21/762H01L21/8247H01L27/115
    • H01L27/11521H01L21/76224H01L27/115
    • Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.
    • 提供制造半导体器件的方法。 在半导体衬底中形成沟槽。 形成部分填充沟槽的第一场氧化物层。 第一场氧化物层限定与沟槽相邻的衬底的有源区。 沟槽的侧壁的上部向上延伸超过第一场氧化物层的表面。 第一衬垫形成在第一场氧化物层上并且在沟槽的侧壁的部分上方向上延伸超过第一场氧化物层。 在第一衬垫上形成第二场氧化物层并填充沟槽。 每个部分去除第二场氧化物层和第一衬里以沿着衬底的有源区域暴露沟槽的顶部相邻表面和上侧壁。 介电层形成在沟槽的暴露的顶部相邻表面和上侧壁上。 在电介质层上形成栅电极。