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    • 1. 发明授权
    • Active-load dominant circuit for common-mode glitch interference cancellation
    • 用于共模干扰消除的有源负载主导电路
    • US07719325B1
    • 2010-05-18
    • US12273011
    • 2008-11-18
    • Yen-Ping WangYen-Hui WangPei-Yuan Chen
    • Yen-Ping WangYen-Hui WangPei-Yuan Chen
    • H03B1/00
    • H03K5/1252H03K17/162
    • An active-load dominant circuit for common-mode glitch interference cancellation, biased between a first voltage potential and a second voltage potential with an accompanying common-mode glitch interferer. The active-load dominant circuit includes a pair of pull-up networks and a pair of active-load networks. The common-mode glitch interferer is cancelled out due to a symmetric structure of the pair of pull-up networks. At least one set signal and at least one reset signal are provided to a latch in response to a clock signal or a complemented clock signal. At least one of the set signal and the reset signal can be pulled up to the first voltage potential or pulled down to the second voltage potential. The voltage difference of the set signal and the reset signal is large enough for a latch.
    • 用于共模干扰消除的有源负载主导电路,其在第一电压电势和第二电压电位之间被偏置,并具有伴随的共模故障干扰源。 有源负载主导电路包括一对上拉网络和一对有源负载网络。 由于一对上拉网络的对称结构,共模干扰信号被抵消。 至少一个设置信号和至少一个复位信号响应于时钟信号或补码时钟信号提供给锁存器。 设定信号和复位信号中的至少一个可以被上拉至第一电压电位或下拉至第二电压电位。 设定信号和复位信号的电压差对于锁存器来说足够大。
    • 2. 发明申请
    • ACTIVE-LOAD DOMINANT CIRCUIT FOR COMMON-MODE GLITCH INTERFERENCE CANCELLATION
    • 用于通用模式干扰消除的主动负载电路
    • US20100123501A1
    • 2010-05-20
    • US12273011
    • 2008-11-18
    • Yen-Ping WangYen-Hui WangPei-Yuan Chen
    • Yen-Ping WangYen-Hui WangPei-Yuan Chen
    • H03K3/35H03K3/289
    • H03K5/1252H03K17/162
    • “An active-load dominant circuit for common-mode glitch interference cancellation, biased between a first voltage potential and a second voltage potential with an accompanying common-mode glitch interferer. The active-load dominant circuit includes a pair of pull-up networks and a pair of active-load networks. The common-mode glitch interferer is cancelled out due to a symmetric structure of the pair of pull-up networks. At least one set signal and at least one reset signal are provided to a latch in response to a clock signal or a complemented clock signal. At least one of the set signal and the reset signal can be pulled up to the first voltage potential or pulled down to the second voltage potential. The voltage difference of the set signal and the reset signal is large enough for a latch.”
    • “用于共模故障干扰消除的有源负载主导电路,其在第一电压电位和第二电压电位之间被偏置,并具有伴随的共模故障干扰源。 有源负载主导电路包括一对上拉网络和一对有源负载网络。 由于一对上拉网络的对称结构,共模干扰信号被抵消。 至少一个设置信号和至少一个复位信号响应于时钟信号或补码时钟信号提供给锁存器。 设定信号和复位信号中的至少一个可以被上拉至第一电压电位或下拉至第二电压电位。 设定信号和复位信号的电压差对于锁存器来说足够大。
    • 3. 发明申请
    • DIFFERENTIAL TYPE LEVEL SHIFTER
    • 差分式水平变换器
    • US20110006828A1
    • 2011-01-13
    • US12500874
    • 2009-07-10
    • Pei-Yuan ChenChu-Chiao YuYen-Ping Wang
    • Pei-Yuan ChenChu-Chiao YuYen-Ping Wang
    • H03L5/00
    • H03K19/018528
    • This patent discloses a differential type level shifter, comprising: a differential pair of transistors, having a pair of gate terminals, a pair of drain terminals and a common source terminal, with the pair of gate terminals coupled to a first clock signal and a second clock signal; a current source, coupled between the common source terminal and a reference ground, used to provide a bias current; and a pair of loading resistors, having a common end and a pair of output ends, with the common end coupled to a power line, the pair of output ends coupled to the pair of drain terminals; wherein the pair of drain terminals are used to generate a set signal and a reset signal in response to the first clock signal and the second clock signal.
    • 该专利公开了一种差分电平移位器,包括:具有一对栅极端子,一对漏极端子和公共源极端子的差分对晶体管,其中该对栅极端子耦合到第一时钟信号和第二时钟信号 时钟信号; 耦合在公共源极端子和参考地之间的电流源,用于提供偏置电流; 以及一对负载电阻器,具有公共端和一对输出端,其共同端耦合到电力线,所述一对输出端耦合到所述一对漏极端子; 其中所述一对漏极端子用于响应于所述第一时钟信号和所述第二时钟信号而产生置位信号和复位信号。
    • 4. 发明授权
    • Gas-discharge lamp controller utilizing a novel preheating phase control mechanism
    • 采用新型预热相位控制机构的气体放电灯控制器
    • US08450940B2
    • 2013-05-28
    • US12784039
    • 2010-05-20
    • Yen-Ping WangPei-Yuan ChenKo-Ming Lin
    • Yen-Ping WangPei-Yuan ChenKo-Ming Lin
    • H05B37/02
    • H05B41/298
    • A gas-discharge lamp controller utilizing a novel preheating phase control mechanism, having: a supply voltage tracking reference voltages generator, biased between a supply voltage and a reference ground, for generating a first reference voltage which is proportional to the supply voltage; and a control unit, for generating a high threshold signal according to the first reference voltage and a saw-tooth signal, the peak value of the saw-tooth signal being proportional to the supply voltage, wherein the control unit has a preheating phase, the high threshold signal is coupled with the first reference voltage during the preheating phase, and the time duration of the preheating phase is set by a predetermined number of periods of the saw-tooth signal.
    • 一种利用新型预热相位控制机构的气体放电灯控制器,具有:供电电压跟踪参考电压发生器,其偏置在电源电压和参考地之间,用于产生与电源电压成比例的第一参考电压; 以及控制单元,用于根据第一参考电压和锯齿信号产生高阈值信号,锯齿信号的峰值与电源电压成比例,其中控制单元具有预热阶段, 高阈值信号在预热阶段与第一参考电压耦合,并且预热阶段的持续时间被设定为预定数量的锯齿信号周期。