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1. 发明申请

US20110006828A1 DIFFERENTIAL TYPE LEVEL SHIFTER 审中-公开
标题翻译：差分式水平变换器
公开(公告)号：US20110006828A1
公开(公告)日：2011-01-13
申请号：US12500874
申请日：2009-07-10
申请人： Pei-Yuan Chen , Chu-Chiao Yu , Yen-Ping Wang
发明人： Pei-Yuan Chen , Chu-Chiao Yu , Yen-Ping Wang
IPC分类号： H03L5/00
CPC分类号： H03K19/018528
摘要： This patent discloses a differential type level shifter, comprising: a differential pair of transistors, having a pair of gate terminals, a pair of drain terminals and a common source terminal, with the pair of gate terminals coupled to a first clock signal and a second clock signal; a current source, coupled between the common source terminal and a reference ground, used to provide a bias current; and a pair of loading resistors, having a common end and a pair of output ends, with the common end coupled to a power line, the pair of output ends coupled to the pair of drain terminals; wherein the pair of drain terminals are used to generate a set signal and a reset signal in response to the first clock signal and the second clock signal.
摘要翻译：该专利公开了一种差分电平移位器，包括：具有一对栅极端子，一对漏极端子和公共源极端子的差分对晶体管，其中该对栅极端子耦合到第一时钟信号和第二时钟信号时钟信号; 耦合在公共源极端子和参考地之间的电流源，用于提供偏置电流; 以及一对负载电阻器，具有公共端和一对输出端，其共同端耦合到电力线，所述一对输出端耦合到所述一对漏极端子; 其中所述一对漏极端子用于响应于所述第一时钟信号和所述第二时钟信号而产生置位信号和复位信号。

2. 发明授权

US06294963B1 Voltage-controlled oscillator 有权
标题翻译：压控振荡器
公开(公告)号：US06294963B1
公开(公告)日：2001-09-25
申请号：US09660937
申请日：2000-09-13
申请人： Her-Y Shih , Jean-Ming Lee , Chu-Chiao Yu
发明人： Her-Y Shih , Jean-Ming Lee , Chu-Chiao Yu
IPC分类号： H03B524
CPC分类号： H03K3/03 , H03B5/04 , H03K3/0231 , H03K3/0322
摘要： A voltage-controlled oscillator comprising a voltage compensation transistor is disclosed. The voltage compensation transistor is able to provide an equivalent resistance to the bias voltage supplied to the oscillator. When a sudden raise in the voltage of the power supply takes place, the equivalent resistance of the compensation transistor will drop, such that the bias voltage supplied to the oscillator may be pulled down, whereby the oscillation frequency of the ring oscillator may be adjusted.
摘要翻译：公开了一种包括电压补偿晶体管的压控振荡器。电压补偿晶体管能够提供与提供给振荡器的偏置电压的等效电阻。当电源的电压突然升高时，补偿晶体管的等效电阻将下降，使得提供给振荡器的偏置电压可能被下拉，从而可以调节环形振荡器的振荡频率。

3. 发明授权

US06278750B1 Fully integrated architecture for improved sigma-delta modulator with automatic gain controller 失效
标题翻译：具有自动增益控制器的改进型Σ-Δ调制器的完全集成架构
公开(公告)号：US06278750B1
公开(公告)日：2001-08-21
申请号：US08920313
申请日：1997-08-30
申请人： Chu-Chiao Yu
发明人： Chu-Chiao Yu
IPC分类号： H03M302
CPC分类号： H03M3/484 , H03M3/492
摘要： The present invention discloses an automatic gain control (AGC) feedback-referenced sigma-delta modulating device provided for processing an analog signal received therein. This device includes an automatic gain controller (AGC) for receiving processing the analog input signal for generating an AGC feedback including a set of positive and negative AGC reference voltages. This device further include a sigma-delta modulator for receiving the analog input signal and the AGC feedback of the set of the positive and negative AGC reference voltages for generating a one binary bit output therefrom. In a preferred embodiment, the automatic gain controller (AGC) includes a peak detector for receiving and detecting a peak input voltage of the analog input signal. The automatic gain controller (AGC) further includes a maximum gain control block for receiving the peak input voltage from the peak value detector for generating a maximum gain controlled peak value Vp. And, the automatic gain controller (AGC) further includes a positive-and-negative AGC reference voltage (Vref+_AGC, Vref−_AGC) generation block for receiving and applying the maximum gain controlled peak value Vp to generate a positive AGC reference voltage Vref+_AGC and a negative AGC reference voltage Vref−_AGC.
摘要翻译：本发明公开了一种用于处理其中接收的模拟信号的自动增益控制（AGC）反馈参考的Σ-Δ调制装置。该装置包括一个自动增益控制器（AGC），用于接收处理该模拟输入信号以产生包括一组正和负AGC参考电压的AGC反馈。该装置还包括一个Σ-Δ调制器，用于接收模拟输入信号和正和负AGC参考电压组的AGC反馈，用于从中产生一个二进制位输出。在优选实施例中，自动增益控制器（AGC）包括用于接收和检测模拟输入信号的峰值输入电压的峰值检测器。自动增益控制器（AGC）还包括最大增益控制块，用于从峰值检测器接收峰值输入电压，以产生最大增益受控峰值Vp。而且，自动增益控制器（AGC）还包括正和负AGC参考电压（Vref + _AGC，Vref-_AGC）产生模块，用于接收和施加最大增益控制峰值Vp以产生正的AGC参考电压Vref + _AGC和负AGC参考电压Vref-_AGC。

4. 发明授权

US5736895A Biquadratic switched-capacitor filter using single operational amplifier 失效
标题翻译：使用单个运算放大器的双向开关电容滤波器
公开(公告)号：US5736895A
公开(公告)日：1998-04-07
申请号：US585469
申请日：1996-01-16
申请人： Chu-Chiao Yu , Shaw-Jia Hor , Jean-Ming Lee
发明人： Chu-Chiao Yu , Shaw-Jia Hor , Jean-Ming Lee
IPC分类号： H03H19/00 , H03M3/02 , H03K5/00 , H03M3/00
CPC分类号： H03H19/004
摘要： The present invention discloses a biquadratic switched-capacitor filter, which merely utilizes one operational amplifier to implement a biquadratic transfer function. The biquadratic switched-capacitor filter further comprises ten switched-capacitor circuits, two feedback capacitors, and two individual switching devices. The switching devices in this switched-capacitor filter can be controlled by six different clock signals. The first and second clock signals are two-phase, complementary but non-overlapping pulse trains with a reference period. The third clock signal is a pulse train with double the reference period and coincident with the first clock signal. The fourth, the fifth, and the sixth clock signals are pulse trains that result from delaying the third, the fourth, and the fifth clock signals by half the reference period. The obtained switched-capacitor filter can be used to simplify some applications, such as sigma-delta modulators.
摘要翻译：本发明公开了一种双向开关电容滤波器，其仅使用一个运算放大器来实现双向传递函数。二次开关电容滤波器还包括十个开关电容器电路，两个反馈电容器和两个单独的开关器件。该开关电容滤波器中的开关器件可以由六个不同的时钟信号控制。第一和第二时钟信号是具有参考周期的两相，互补但不重叠的脉冲串。第三时钟信号是具有两倍于参考周期并与第一时钟信号一致的脉冲串。第四，第五和第六时钟信号是由第三，第四和第五时钟信号延迟参考周期的一半而产生的脉冲串。所获得的开关电容滤波器可用于简化一些应用，例如Σ-Δ调制器。

5. 发明授权

US06404373B1 Comparator circuit for analog-to-digital converter 有权
标题翻译：模拟 - 数字转换器的比较器电路
公开(公告)号：US06404373B1
公开(公告)日：2002-06-11
申请号：US09689673
申请日：2000-10-13
申请人： Chu-Chiao Yu , Her-Y Shih , Jinn-Ann Kuo
发明人： Chu-Chiao Yu , Her-Y Shih , Jinn-Ann Kuo
IPC分类号： H03M136
CPC分类号： H03M1/0646 , H03M1/36
摘要： A comparator circuit used in an analog-to-digital converter includes an input voltage signal line; a reference voltage signal line; a plurality of comparators connected to said input voltage signal line and said reference voltage signal line; a plurality of amplifiers corresponding separately to each of said plurality of comparators and connected respectively between said input voltage signal lines, said reference voltage signal lines, and their corresponding comparators; and a thermocode channel connected to outputs of said plurality of comparators. A plurality of resistors with resistances in a constant ratio are provided in said reference voltage signal line and each is connected between the inputs of two adjacent amplifiers. A plurality of averaging resistors are provided and each is connected between the drains of the input transistor of two adjacent comparators; wherein said plurality of averaging resistors have the same resistance.
摘要翻译：在模数转换器中使用的比较器电路包括输入电压信号线; 参考电压信号线; 连接到所述输入电压信号线和所述参考电压信号线的多个比较器; 多个放大器分别对应于所述多个比较器中的每一个并分别连接在所述输入电压信号线，所述参考电压信号线及其对应的比较器之间; 以及连接到所述多个比较器的输出端的热电极通道。在所述参考电压信号线中提供具有恒定比例的电阻的多个电阻器，并且每个电阻器连接在两个相邻放大器的输入端之间。提供多个平均电阻器并且各自连接在两个相邻比较器的输入晶体管的漏极之间; 其中所述多个平均电阻具有相同的电阻。

6. 发明授权

US06404374B1 Comparator circuit for analog-to-digital converter 有权
标题翻译：模拟 - 数字转换器的比较器电路
公开(公告)号：US06404374B1
公开(公告)日：2002-06-11
申请号：US09689674
申请日：2000-10-13
申请人： Chu-Chiao Yu , Her-Y Shih , Yen-Hui Wang
发明人： Chu-Chiao Yu , Her-Y Shih , Yen-Hui Wang
IPC分类号： H03M136
CPC分类号： H03M1/0646 , H03M1/36
摘要： A comparator circuit used in an analog-to-digital converter includes an input voltage signal line; a reference voltage signal line; a plurality of comparators connected to said input voltage signal line and said reference voltage signal line; a plurality of amplifiers corresponding separately to each of said plurality of comparators and connected respectively between said input voltage signal lines, said reference voltage signal lines, and their corresponding comparators; and a thermocode channel connected to outputs of said plurality of comparators. A plurality of resistors with resistances in a constant ratio are provided in said reference voltage signal line and each is connected between the inputs of two adjacent amplifiers. A plurality of averaging capacitors are provided and each is connected between the outputs of two adjacent comparators; wherein said plurality of averaging capacitors may have the same capacitance.
摘要翻译：在模数转换器中使用的比较器电路包括输入电压信号线; 参考电压信号线; 连接到所述输入电压信号线和所述参考电压信号线的多个比较器; 多个放大器分别对应于所述多个比较器中的每一个并分别连接在所述输入电压信号线，所述参考电压信号线及其对应的比较器之间; 以及连接到所述多个比较器的输出端的热电极通道。在所述参考电压信号线中提供具有恒定比例的电阻的多个电阻器，并且每个电阻器连接在两个相邻放大器的输入端之间。提供多个平均电容器并且各自连接在两个相邻比较器的输出之间; 其中所述多个平均电容器可以具有相同的电容。

7. 发明授权

US5793811A Stabilization scheme of delta-sigma modulator 失效
标题翻译： Δ-Σ调制器的稳定方案
公开(公告)号：US5793811A
公开(公告)日：1998-08-11
申请号：US629971
申请日：1996-04-09
申请人： Chu-Chiao Yu
发明人： Chu-Chiao Yu
IPC分类号： H03M3/02 , H04B14/06
CPC分类号： H03M3/362 , H03M3/43 , H03M3/454
摘要： An analog modulator employing .DELTA.-.SIGMA. transformation and comprising timings generator, at least a single operational-amplifier (OP-amplifier) filter of Biquadratic transfer function and saturation detection circuit, is provided. This novel approach solves the stability issue by controlling the switching timings of the single operation-amplifier biquadratic filter in the .DELTA.-.SIGMA. modulator. During normal operation, this high-order .DELTA.-.SIGMA. modulator constructed by the single OP-amplifier biquadratic filter functions a third-order or fourth-order modulator. As unstable condition occurs, via the saturation detection circuit and timings generator, the third-order or the fourth-order modulator functionally converts into and performs as a stable .DELTA.-.SIGMA. modulator of second-order. As a stable condition is restored after a recovery time, via controlling the timing signals, the modulator functionally resumes its normal function of third-order or fourth-order operation which has a high resolution.
摘要翻译：提供采用DELTA-SIGMA变换的模拟调制器，其中包括定时发生器，至少一个运算放大器（OP放大器）的Biquadratic传递函数和饱和检测电路。这种新颖的方法通过控制DELTA-SIGMA调制器中的单个运算放大器双二次滤波器的开关定时来解决稳定性问题。在正常操作期间，由单个OP放大器双二阶滤波器构成的高阶DELTA-SIGMA调制器起三阶或四阶调制器的作用。当发生不稳定状态时，通过饱和检测电路和定时发生器，三阶或四阶调制器功能转换成二阶稳定的DELTA-SIGMA调制器。由于稳定状态在恢复时间后恢复，通过控制定时信号，调制器功能恢复其具有高分辨率的三阶或四阶运算的正常功能。

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