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    • 1. 发明申请
    • SOLAR CELL
    • 太阳能电池
    • US20120097236A1
    • 2012-04-26
    • US13100310
    • 2011-05-04
    • Yen-Cheng HuPeng ChenTsung-Pao ChenShuo-Wei LiangZhen-Cheng WuChien-Jen Chen
    • Yen-Cheng HuPeng ChenTsung-Pao ChenShuo-Wei LiangZhen-Cheng WuChien-Jen Chen
    • H01L31/0216
    • H01L31/0264H01L31/02167H01L31/02168H01L31/18Y02E10/50
    • A solar cell includes a semi-conductive substrate, a doping layer, an anti-reflection layer, an electrode, a passivation stacked layer and a contact layer. The semi-conductive substrate has a front and a back surface. The doping layer is disposed on the front surface. The anti-reflection layer is disposed on the doping layer. The electrode is disposed on the anti-reflection layer and electrically connected to the doping layer. The passivation stacked layer is disposed on the back surface and has a first dielectric layer, a second dielectric layer and a middle dielectric layer sandwiched between the first and the second dielectric layer. The dielectric constant of the middle dielectric layer is substantially lower than the dielectric constant of the first dielectric layer and the dielectric constant of the second dielectric layer. The contact layer covers the passivation stacked layer and electrically contacts with the back surface of the semi-conductive substrate.
    • 太阳能电池包括半导体基板,掺杂层,抗反射层,电极,钝化堆叠层和接触层。 半导体基板具有前表面和后表面。 掺杂层设置在前表面上。 抗反射层设置在掺杂层上。 电极设置在抗反射层上并与掺杂层电连接。 钝化堆叠层设置在背面上,并且具有夹在第一和第二电介质层之间的第一电介质层,第二电介质层和中间电介质层。 中间介电层的介电常数基本上低于第一介电层的介电常数和第二介质层的介电常数。 接触层覆盖钝化堆叠层并与半导体基板的背面电接触。
    • 2. 发明授权
    • Solar cell
    • 太阳能电池
    • US08779281B2
    • 2014-07-15
    • US13100310
    • 2011-05-04
    • Yen-Cheng HuPeng ChenTsung-Pao ChenShuo-Wei LiangZhen-Cheng WuChien-Jen Chen
    • Yen-Cheng HuPeng ChenTsung-Pao ChenShuo-Wei LiangZhen-Cheng WuChien-Jen Chen
    • H01L31/00H01L31/0216H01L31/18
    • H01L31/0264H01L31/02167H01L31/02168H01L31/18Y02E10/50
    • A solar cell includes a semi-conductive substrate, a doping layer, an anti-reflection layer, an electrode, a passivation stacked layer and a contact layer. The semi-conductive substrate has a front and a back surface. The doping layer is disposed on the front surface. The anti-reflection layer is disposed on the doping layer. The electrode is disposed on the anti-reflection layer and electrically connected to the doping layer. The passivation stacked layer is disposed on the back surface and has a first dielectric layer, a second dielectric layer and a middle dielectric layer sandwiched between the first and the second dielectric layer. The dielectric constant of the middle dielectric layer is substantially lower than the dielectric constant of the first dielectric layer and the dielectric constant of the second dielectric layer. The contact layer covers the passivation stacked layer and electrically contacts with the back surface of the semi-conductive substrate.
    • 太阳能电池包括半导体基板,掺杂层,抗反射层,电极,钝化堆叠层和接触层。 半导体基板具有前表面和后表面。 掺杂层设置在前表面上。 抗反射层设置在掺杂层上。 电极设置在抗反射层上并与掺杂层电连接。 钝化堆叠层设置在背面上,并且具有夹在第一和第二电介质层之间的第一电介质层,第二电介质层和中间电介质层。 中间介电层的介电常数基本上低于第一介电层的介电常数和第二介质层的介电常数。 接触层覆盖钝化堆叠层并与半导体基板的背面电接触。
    • 3. 发明授权
    • Solar cell
    • 太阳能电池
    • US08952244B2
    • 2015-02-10
    • US13089321
    • 2011-04-19
    • Yen-Cheng HuPeng ChenShuo-Wei LiangZhen-Cheng Wu
    • Yen-Cheng HuPeng ChenShuo-Wei LiangZhen-Cheng Wu
    • H01L31/00H01L31/0216H01L31/0224H01L31/0352H01L31/068
    • H01L31/02168H01L31/022441H01L31/035209H01L31/035227H01L31/0682Y02E10/547
    • A solar cell includes a semiconductor substrate, a doping layer, a quantum well layer, a first passivation layer, a second passivation layer, a first electrode and a second electrode. The semiconductor substrate has a front surface and a back surface, and the front surface of the semiconductor substrate includes nano-rods. The doping layer covers the surface of the nano-rods. The electrode layers cover the doping layer. The quantum well layer having at least one first doping region and at least one second doping region is disposed on the semiconductor substrate. The quantum well layer includes polycrystalline silicon germanium (Si1-xGex). The first passivation layer and the second passivation layer cover the first and the second doping regions of the quantum well layer, respectively. The first electrode and the second electrode are electrically connected to the first doping region and the second doping region of the quantum well layer, respectively.
    • 太阳能电池包括半导体衬底,掺杂层,量子阱层,第一钝化层,第二钝化层,第一电极和第二电极。 半导体衬底具有前表面和后表面,并且半导体衬底的前表面包括纳米棒。 掺杂层覆盖纳米棒的表面。 电极层覆盖掺杂层。 具有至少一个第一掺杂区域和至少一个第二掺杂区域的量子阱层设置在半导体衬底上。 量子阱层包括多晶硅锗(Si1-xGex)。 第一钝化层和第二钝化层分别覆盖量子阱层的第一和第二掺杂区域。 第一电极和第二电极分别电连接到量子阱层的第一掺杂区域和第二掺杂区域。
    • 4. 发明申请
    • SOLAR CELL
    • 太阳能电池
    • US20120167973A1
    • 2012-07-05
    • US13089321
    • 2011-04-19
    • Yen-Cheng HuPeng ChenShuo-Wei LiangZhen-Cheng Wu
    • Yen-Cheng HuPeng ChenShuo-Wei LiangZhen-Cheng Wu
    • H01L31/0216H01L31/0232B82Y99/00
    • H01L31/02168H01L31/022441H01L31/035209H01L31/035227H01L31/0682Y02E10/547
    • A solar cell includes a semiconductor substrate, a doping layer, a quantum well layer, a first passivation layer, a second passivation layer, a first electrode and a second electrode. The semiconductor substrate has a front surface and a back surface, and the front surface of the semiconductor substrate includes nano-rods. The doping layer covers the surface of the nano-rods. The electrode layers cover the doping layer. The quantum well layer having at least one first doping region and at least one second doping region is disposed on the semiconductor substrate. The quantum well layer includes polycrystalline silicon germanium (Si1-xGex). The first passivation layer and the second passivation layer cover the first and the second doping regions of the quantum well layer, respectively. The first electrode and the second electrode are electrically connected to the first doping region and the second doping region of the quantum well layer, respectively.
    • 太阳能电池包括半导体衬底,掺杂层,量子阱层,第一钝化层,第二钝化层,第一电极和第二电极。 半导体衬底具有前表面和后表面,并且半导体衬底的前表面包括纳米棒。 掺杂层覆盖纳米棒的表面。 电极层覆盖掺杂层。 具有至少一个第一掺杂区域和至少一个第二掺杂区域的量子阱层设置在半导体衬底上。 量子阱层包括多晶硅锗(Si1-xGex)。 第一钝化层和第二钝化层分别覆盖量子阱层的第一和第二掺杂区域。 第一电极和第二电极分别电连接到量子阱层的第一掺杂区域和第二掺杂区域。
    • 9. 发明授权
    • Electrical parameter detection device for peripheral component interconnect devices
    • 用于外围组件互连设备的电气参数检测装置
    • US08872521B2
    • 2014-10-28
    • US13424394
    • 2012-03-20
    • Ya-Jun PanQi-Yan LuoPeng ChenSong-Lin Tong
    • Ya-Jun PanQi-Yan LuoPeng ChenSong-Lin Tong
    • G06F11/22
    • G06F11/221
    • An electrical parameter detection device is configured for detecting electrical parameters of a peripheral component interconnect (PCI) connector including a plurality of power pins. The electrical parameter detection device includes a processor module, a first detection module, and a second detection module. The processor module continuously detects voltage values of electric potentials provided by each of the power pins of the PCI connector using the first detection module, and determines time sequences of the electric potentials according to the voltage values of the electric potentials. Furthermore, the processor module detects the amount of power provided by each of the power pins of the PCI connector using the second detection module.
    • 电参数检测装置被配置为检测包括多个电源引脚的外围组件互连(PCI)连接器的电参数。 电参数检测装置包括处理器模块,第一检测模块和第二检测模块。 处理器模块使用第一检测模块连续地检测由PCI连接器的每个电源引脚提供的电位的电压值,并且根据电位的电压值确定电位的时间序列。 此外,处理器模块使用第二检测模块检测由PCI连接器的每个电源引脚提供的电力量。
    • 10. 发明授权
    • Overcurrent protection device
    • 过电流保护装置
    • US08854782B2
    • 2014-10-07
    • US13086405
    • 2011-04-14
    • Qi-Yan LuoSong-Lin TongPeng Chen
    • Qi-Yan LuoSong-Lin TongPeng Chen
    • H02H9/02H02H3/087G06F1/28
    • H02H3/087G06F1/28
    • An overcurrent protection device includes a power input terminal, a power output terminal, a first signal terminal, a second signal terminal, a testing circuit, and a switch element. The power input terminal and the first signal terminal are connected to a power supply. The power output terminal and the second signal terminal are connected to a computer motherboard. If the first and second terminals are disconnected from each other when the computer motherboard works, the power supply stops working. The testing circuit includes a fixed resistor and a control chip parallel connected between the power input and output terminal. The control chip stores a predetermined voltage threshold, and detects voltage between the two terminals of the fixed resistor, and compares the measured voltage with the predetermined voltage threshold. The switch element disconnects the first and second signal terminals when the measured voltage is greater than the predetermined voltage threshold.
    • 过电流保护装置包括电源输入端子,电力输出端子,第一信号端子,第二信号端子,测试电路和开关元件。 电源输入端子和第一信号端子连接到电源。 电源输出端子和第二信号端子连接到计算机主板。 当计算机主板工作时,如果第一和第二端子彼此断开,则电源停止工作。 测试电路包括一个固定电阻和一个并联在电源输入和输出端之间的控制芯片。 控制芯片存储预定电压阈值,并且检测固定电阻器的两个端子之间的电压,并将测量的电压与预定电压阈值进行比较。 当测量的电压大于预定电压阈值时,开关元件断开第一和第二信号端子。