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1. 发明授权

US06406982B2 Method of improving epitaxially-filled trench by smoothing trench prior to filling 有权
标题翻译：通过在填充之前平滑沟槽来改善外延填充沟槽的方法
公开(公告)号：US06406982B2
公开(公告)日：2002-06-18
申请号：US09870705
申请日：2001-06-01
申请人： Yasushi Urakami , Shoichi Yamauchi , Toshio Sakakibara , Hitoshi Yamaguchi , Nobuhiro Tsuji
发明人： Yasushi Urakami , Shoichi Yamauchi , Toshio Sakakibara , Hitoshi Yamaguchi , Nobuhiro Tsuji
IPC分类号： H01L2120
CPC分类号： H01L21/763 , H01L21/30608 , H01L21/761
摘要： A trench is formed in a semiconductor substrate through a mask composed of a silicon oxide film formed on the semiconductor substrate. Then, an edge portion at an opening portion of the mask is etched so that an opening width thereof is wider than that of the trench. After that, an inner surface of the trench is smoothed by thermal treatment around at 1000° C. in non-oxidizing or non-nitriding atmosphere under low pressure. Then, the trench is filled with an epitaxial film. After that, the epitaxial film is polished, whereby a semiconductor substrate for forming a semiconductor device is obtained.
摘要翻译：通过由形成在半导体衬底上的氧化硅膜构成的掩模，在半导体衬底中形成沟槽。然后，蚀刻掩模的开口部分的边缘部分，使得其开口宽度比沟槽的宽度宽。之后，通过在低压下在非氧化或非氮化气氛中在1000℃左右的热处理使沟槽的内表面平滑化。然后，沟槽填充有外延膜。之后，对该外延膜进行研磨，得到半导体装置的半导体基板。

2. 发明授权

US06495294B1 Method for manufacturing semiconductor substrate having an epitaxial film in the trench 有权
标题翻译：在沟槽中制造具有外延膜的半导体衬底的方法
公开(公告)号：US06495294B1
公开(公告)日：2002-12-17
申请号：US09696951
申请日：2000-10-27
申请人： Shoichi Yamauchi , Yasushi Urakami , Kunihiro Onoda , Toshio Sakakibara , Yoshinori Otsuka
发明人： Shoichi Yamauchi , Yasushi Urakami , Kunihiro Onoda , Toshio Sakakibara , Yoshinori Otsuka
IPC分类号： H01L2176
CPC分类号： H01L29/0634 , H01L21/02381 , H01L21/0243 , H01L21/0245 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L21/02658 , H01L21/02661 , H01L21/743 , H01L21/761 , H01L29/045
摘要： A trench is formed in a silicon substrate, and an epitaxial film is formed on the substrate and in the trench. After a part of the epitaxial film formed around an opening portion of the trench is etched, another epitaxial film is formed on the substrate and in the trench. Accordingly, the trench can be filled with the epitaxial films completely. Then, the surface of the substrate is flattened.
摘要翻译：在硅衬底中形成沟槽，并且在衬底和沟槽中形成外延膜。在蚀刻形成在沟槽的开口部分周围的外延膜的一部分之后，在衬底和沟槽中形成另外的外延膜。因此，沟槽可以完全被外延膜填充。然后，使基板的表面变平。

3. 发明授权

US06696323B2 Method of manufacturing semiconductor device having trench filled up with gate electrode 有权
标题翻译：制造具有填充有栅电极的沟槽的半导体器件的方法
公开(公告)号：US06696323B2
公开(公告)日：2004-02-24
申请号：US10340746
申请日：2003-01-13
申请人： Hitoshi Yamaguchi , Toshio Sakakibara , Jun Sakakibara , Takumi Shibata , Toshiyuki Morishita
发明人： Hitoshi Yamaguchi , Toshio Sakakibara , Jun Sakakibara , Takumi Shibata , Toshiyuki Morishita
IPC分类号： H01L21332
CPC分类号： H01L29/7813 , H01L29/04 , H01L29/045 , H01L29/0696 , H01L29/41741 , H01L29/41766 , H01L29/4236 , H01L29/4238 , H01L29/66348 , H01L29/66378 , H01L29/66659 , H01L29/66704 , H01L29/66734 , H01L29/66787 , H01L29/7393 , H01L29/7397 , H01L29/749 , H01L29/78 , H01L29/7803 , H01L29/7809 , H01L29/7816 , H01L29/7817 , H01L29/7824 , H01L29/7825 , H01L29/7828 , H01L29/7835
摘要： In a semiconductor device, a p-type base region is provided in an n−-type substrate to extend from a principal surface of the substrate in a perpendicular direction to the principal surface. An n+-type source region extends in the p-type base region from the principal surface in the perpendicular direction, and an n+-type drain region extends in the substrate separately from the p-type base region with a drift region interposed therebetween. A trench is formed to penetrate the p-type base region from the n+-type source region in a direction parallel to the principal surface. A gate electrode is formed in the trench through a gate insulating film. Accordingly, a channel region can be formed with a channel width in a depth direction of the trench when a voltage is applied to the gate electrode.
摘要翻译：在半导体器件中，p型基极区域设置在n型衬底中，从衬底的主表面沿垂直于主表面的方向延伸。 n +型源极区域在垂直方向上从主表面在p型基极区域中延伸，并且n +型漏极区域在p型基极区域中与p型基极区域分开延伸，漂移区域。形成沟槽，以在平行于主表面的方向上从n +型源极区域穿透p型基极区域。栅电极通过栅极绝缘膜形成在沟槽中。因此，当向栅电极施加电压时，可以在沟槽的深度方向上形成沟道区域。

4. 发明授权

US06525375B1 Semiconductor device having trench filled up with gate electrode 有权
标题翻译：具有填充有栅电极的沟槽的半导体器件
公开(公告)号：US06525375B1
公开(公告)日：2003-02-25
申请号：US09688154
申请日：2000-10-16
申请人： Hitoshi Yamaguchi , Toshio Sakakibara , Jun Sakakibara , Takumi Shibata , Toshiyuki Morishita
发明人： Hitoshi Yamaguchi , Toshio Sakakibara , Jun Sakakibara , Takumi Shibata , Toshiyuki Morishita
IPC分类号： H01L2976
CPC分类号： H01L29/7813 , H01L29/04 , H01L29/045 , H01L29/0696 , H01L29/41741 , H01L29/41766 , H01L29/4236 , H01L29/4238 , H01L29/66348 , H01L29/66378 , H01L29/66659 , H01L29/66704 , H01L29/66734 , H01L29/66787 , H01L29/7393 , H01L29/7397 , H01L29/749 , H01L29/78 , H01L29/7803 , H01L29/7809 , H01L29/7816 , H01L29/7817 , H01L29/7824 , H01L29/7825 , H01L29/7828 , H01L29/7835
摘要： In a semiconductor device, a p-type base region is provided in an n−-type substrate to extend from a principal surface of the substrate in a perpendicular direction to the principal surface. An n+-type source region extends in the p-type base region from the principal surface in the perpendicular direction, and an n+-type drain region extends in the substrate separately from the p-type base region with a drift region interposed therebetween. A trench is formed to penetrate the p-type base region from the n+-type source region in a direction parallel to the principal surface. A gate electrode is formed in the trench through a gate insulating film. Accordingly, a channel region can be formed with a channel width in a depth direction of the trench when a voltage is applied to the gate electrode.
摘要翻译：在半导体器件中，p型基极区域设置在n型衬底中，以从垂直于主表面的方向从衬底的主表面延伸。 n +型源极区域在垂直方向上从主表面延伸到p型基极区域中，并且n +型漏极区域在p型基极区域中与P型基极区域分开延伸，并且其间插入漂移区域。形成沟槽，以在平行于主表面的方向上从n +型源极区域穿透p型基极区域。栅电极通过栅极绝缘膜形成在沟槽中。因此，当向栅电极施加电压时，可以在沟槽的深度方向上形成沟道区域。

5. 发明授权

US07855384B2 SIC semiconductor device and method for manufacturing the same 有权
标题翻译： SIC半导体器件及其制造方法
公开(公告)号：US07855384B2
公开(公告)日：2010-12-21
申请号：US11783611
申请日：2007-04-10
申请人： Tsuyoshi Yamamoto , Toshio Sakakibara , Hiroki Nakamura , Toshiyuki Morishita , Takasumi Ooyanagi , Atsuo Watanabe
发明人： Tsuyoshi Yamamoto , Toshio Sakakibara , Hiroki Nakamura , Toshiyuki Morishita , Takasumi Ooyanagi , Atsuo Watanabe
IPC分类号： H01L29/04 , H01L29/94
CPC分类号： H01L29/1608 , H01L29/0843 , H01L29/1066 , H01L29/8083 , H01L29/872
摘要： A SiC semiconductor device includes: a SiC substrate having a drain layer, a drift layer and a source layer stacked in this order; multiple trenches penetrating the source layer and reaching the drift layer; a gate layer on a sidewall of each trench; an insulation film on the sidewall of each trench covering the gate layer; a source electrode on the source layer; and a diode portion in or under the trench contacting the drift layer to provide a diode. The drift layer between the gate layer on the sidewalls of adjacent two trenches provides a channel region. The diode portion is coupled with the source electrode, and insulated from the gate layer with the insulation film.
摘要翻译： SiC半导体器件包括：具有漏极层，漂移层和源极层的SiC衬底; 多个沟槽穿透源层并到达漂移层; 每个沟槽的侧壁上的栅极层; 覆盖所述栅极层的每个沟槽的侧壁上的绝缘膜; 源极上的源电极; 以及与沟槽接触的沟槽中或下方的二极管部分，以提供二极管。相邻两个沟槽的侧壁上的栅极层之间的漂移层提供沟道区域。二极管部分与源电极耦合，并与绝缘膜与栅极层绝缘。

6. 发明申请

US20060261503A1 Process for producing dental prosthesis and kit for use for therein 审中-公开
标题翻译：用于生产牙科假体的工艺和用于其中的试剂盒
公开(公告)号：US20060261503A1
公开(公告)日：2006-11-23
申请号：US10563987
申请日：2004-07-13
申请人： Sumihito Sago , Toshio Sakakibara , Tatsuhiko Hirata , Atsushi Matsumoto
发明人： Sumihito Sago , Toshio Sakakibara , Tatsuhiko Hirata , Atsushi Matsumoto
IPC分类号： A61C13/00 , B05D3/00 , A61L33/00
CPC分类号： A61C13/081 , A61C5/70 , A61C5/77 , A61C13/0003 , A61C13/09 , A61C13/20
摘要： A method of manufacturing a dental prosthesis, including: (a) a step of preparing a substrate of the dental prosthesis that is constituted by a dental molding material; (b) a step of forming a back coating layer on at least a part of a surface of the substrate, by using a first porcelain that is constituted principally by ceramic; (c) a step of forming a casting mold such that the substrate is disposed in the casting mold and such that a void is provided on a surface of the back coating layer; and (d) a step of forming a cast coating layer on at least a part of a surface of the back coating layer, by pouring a second porcelain into the void at a casting temperature. The second porcelain is constituted principally by ceramic whose composition is different from that of the ceramic of the first porcelain that viscosity of the second porcelain at the casting temperature is lower than that of the first porcelain. Also disclosed are a kit and a dental porcelain set that are used for manufacturing the dental prosthesis.
摘要翻译：一种制造牙科假体的方法，包括：（a）制备由牙科模制材料构成的牙科假体的基底的步骤; （b）通过使用主要由陶瓷构成的第一瓷，在所述基材的表面的至少一部分上形成背涂层的步骤; （c）形成铸模，使得基板设置在铸模中，并且在背涂层的表面上设置空隙的步骤; 和（d）通过在铸造温度下将第二种陶瓷浇注到空隙中，在背涂层的表面的至少一部分上形成流延涂层的步骤。第二瓷主要由陶瓷构成，其组成与第一瓷的陶瓷不同，铸造温度下第二瓷的粘度低于第一瓷的粘度。还公开了用于制造牙科假体的试剂盒和牙科瓷器组。

7. 发明授权

US06770564B1 Method of etching metallic thin film on thin film resistor 失效
标题翻译：在薄膜电阻上蚀刻金属薄膜的方法
公开(公告)号：US06770564B1
公开(公告)日：2004-08-03
申请号：US09361980
申请日：1999-07-28
申请人： Ichiro Ito , Satoshi Shiraki , Tomio Yamamoto , Makoto Ohkawa , Atsumi Takahashi , Yasuaki Tsuzuki , Akito Fukui , Toshio Sakakibara , Takayuki Sugisaka
发明人： Ichiro Ito , Satoshi Shiraki , Tomio Yamamoto , Makoto Ohkawa , Atsumi Takahashi , Yasuaki Tsuzuki , Akito Fukui , Toshio Sakakibara , Takayuki Sugisaka
IPC分类号： H01L21302
CPC分类号： H01L28/24 , H01L21/32139
摘要： An Al film is formed on a barrier metal covering a thin film resistor to have a first opening. A photo-resist is formed on the Al film and in the opening, and is patterned to have a second opening having an opening area smaller than that of the first opening and open in the first opening to expose the barrier metal therefrom. Then, the barrier metal is etched through the second opening. Because the barrier metal is etched from an inner portion more than the opening end of the first opening, under-cut of the barrier metal is prevented.
摘要翻译：在覆盖薄膜电阻器的阻挡金属上形成具有第一开口的Al膜。在Al膜和开口中形成光致抗蚀剂，并且被图案化以具有开口面积小于第一开口的开口面积并在第一开口中开口的第二开口，以暴露出阻挡金属。然后，通过第二开口蚀刻阻挡金属。由于阻挡金属从第一开口的开口端的内部蚀刻，因此防止了阻挡金属的切割。

8. 发明授权

US5480832A Method for fabrication of semiconductor device 失效
标题翻译：半导体器件制造方法
公开(公告)号：US5480832A
公开(公告)日：1996-01-02
申请号：US75514
申请日：1993-10-21
申请人： Shoji Miura , Takayuki Sugisaka , Atsushi Komura , Toshio Sakakibara
发明人： Shoji Miura , Takayuki Sugisaka , Atsushi Komura , Toshio Sakakibara
IPC分类号： H01L21/762 , H01L21/763 , H01L21/768 , H01L21/76
CPC分类号： H01L21/763 , H01L21/76264 , H01L21/76802 , H01L21/76275 , H01L21/76281 , H01L21/76286 , Y10S148/05 , Y10S148/135 , Y10S438/977
摘要： An object of the invention is to prevent the occurrence of breaking or short-circuiting of a wiring caused by a difference in level in an isolation trench area formed in an SOI substrate. An oxide film is formed for a pad on the main surface of an SOI layer formed on an insulating substrate, a silicon nitride film are formed and an SiO.sub.2 film in order, then an isolation trench reaching to the insulating substrate is by means of an R.I.E process using the SiO.sub.2 film as a mask. Thereafter an insulating film is formed on an inside wall of the isolation trench by means of thermal oxidation, the isolation trench is filled with polysilicon, the polysilicon is etched back while controlling the etching so that the top of the polysilicon in the isolation trench remains higher than the top of the silicon nitride film, an extra part of the polysilicon deposited on the surface of the substrate, is removed and then the SiO.sub.2 film used as a mask when forming the isolation trench is etched off using the polysilicon in the isolation trench and the silicon nitride film as an etching stopper. In this manner, since the SiO.sub.2 film used as a mask is etched off after filling the isolation trench with polysilicon, the oxide film for isolating between the substrates is not etched when removing the mask film. Moreover since the polysilicon is the isolation trench and the silicon nitride film act as an etching stopper when etching off the SiO.sub.2 film used as a mask, the oxide film for a pad existing thereunder and the insulating film formed on an inside wall of the trench can also be prevented from being etched and a flatness at an isolation trench area is not deteriorated.
摘要翻译： PCT No.PCT / JP92 / 01326 Sec。 371日期：1993年10月21日 102（e）日期1993年10月21日PCT提交1992年10月12日PCT公布。公开号WO93 / 08596 日期：1993年04月29日。本发明的目的在于防止在SOI衬底中形成的隔离沟槽区域中的电平差引起的布线断裂或短路。在绝缘基板上形成的SOI层的主表面上形成氧化膜，依次形成氮化硅膜和SiO 2膜，然后通过RIE到达绝缘基板的隔离沟槽使用SiO 2膜作为掩模。此后，通过热氧化在隔离沟槽的内壁上形成绝缘膜，隔离沟槽填充有多晶硅，在控制蚀刻的同时蚀刻多晶硅，使得隔离沟槽中的多晶硅的顶部保持较高除去氮化硅膜的顶部，去除沉积在衬底表面上的多晶硅的额外部分，然后使用隔离沟槽中的多晶硅蚀刻掉形成隔离沟槽时用作掩模的SiO 2膜，作为蚀刻停止层的氮化硅膜。以这种方式，由于在用多晶硅填充隔离沟槽之后蚀刻用作掩模的SiO 2膜，因此在去除掩模膜时不会蚀刻用于隔离的氧化膜。此外，由于多晶硅是隔离沟槽，并且氮化硅膜在蚀刻掉用作掩模的SiO 2膜时用作蚀刻阻挡层，所以存在于其上的垫的氧化膜和形成在沟槽的内壁上的绝缘膜也防止蚀刻，并且隔离沟槽区域的平坦度不会劣化。

9. 发明授权

US07470930B2 Silicon carbide semiconductor device 失效
公开(公告)号：US07470930B2
公开(公告)日：2008-12-30
申请号：US11396715
申请日：2006-04-04
申请人： Eiichi Okuno , Toshio Sakakibara
发明人： Eiichi Okuno , Toshio Sakakibara
IPC分类号： H01L29/10 , H01L29/76 , H01L31/036 , H01L31/112 , H01L29/15 , H01L31/0312
CPC分类号： H01L27/088 , H01L21/823487 , H01L29/66068
摘要： A silicon carbide semiconductor device includes a semiconductor element disposed in a semiconductor substrate having a first conductive type silicon carbide layer and a silicon substrate. The device includes: a trench on the silicon carbide layer to reach the silicon substrate; and a conductive layer in the trench between the silicon carbide layer and the silicon substrate to connect to both of them. The semiconductor element is a vertical type semiconductor element so that current flows on both of a top surface portion and a backside surface portion of the semiconductor substrate. The current flows through the conductive layer.

10. 发明申请

US20070241338A1 SIC semiconductor device and method for manufacturing the same 有权
标题翻译： SIC半导体器件及其制造方法
公开(公告)号：US20070241338A1
公开(公告)日：2007-10-18
申请号：US11783611
申请日：2007-04-10
申请人： Tsuyoshi Yamamoto , Toshio Sakakibara , Hiroki Nakamura , Toshiyuki Morishita , Takasumi Ooyanagi , Atsuo Watanabe
发明人： Tsuyoshi Yamamoto , Toshio Sakakibara , Hiroki Nakamura , Toshiyuki Morishita , Takasumi Ooyanagi , Atsuo Watanabe
IPC分类号： H01L31/0312
CPC分类号： H01L29/1608 , H01L29/0843 , H01L29/1066 , H01L29/8083 , H01L29/872
摘要： A SiC semiconductor device includes: a SiC substrate having a drain layer, a drift layer and a source layer stacked in this order; multiple trenches penetrating the source layer and reaching the drift layer; a gate layer on a sidewall of each trench; an insulation film on the sidewall of each trench covering the gate layer; a source electrode on the source layer; and a diode portion in or under the trench contacting the drift layer to provide a diode. The drift layer between the gate layer on the sidewalls of adjacent two trenches provides a channel region. The diode portion is coupled with the source electrode, and insulated from the gate layer with the insulation film.
摘要翻译： SiC半导体器件包括：具有漏极层，漂移层和源极层的SiC衬底; 多个沟槽穿透源层并到达漂移层; 每个沟槽的侧壁上的栅极层; 覆盖所述栅极层的每个沟槽的侧壁上的绝缘膜; 源极上的源电极; 以及与沟槽接触的沟槽中或下方的二极管部分，以提供二极管。相邻两个沟槽的侧壁上的栅极层之间的漂移层提供沟道区域。二极管部分与源电极耦合，并与绝缘膜与栅极层绝缘。

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