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1. 发明授权

US6067066A Voltage output circuit and image display device 失效
标题翻译：电压输出电路和图像显示装置
公开(公告)号：US6067066A
公开(公告)日：2000-05-23
申请号：US712644
申请日：1996-09-11
申请人： Yasushi Kubota , Osamu Sasaki , Hiroshi Yoneda
发明人： Yasushi Kubota , Osamu Sasaki , Hiroshi Yoneda
IPC分类号： G09G3/20 , G09G3/36
CPC分类号： G09G3/3688 , G09G3/2011 , G09G3/3655 , G09G2310/0259 , G09G2310/027 , G09G2310/0297
摘要： A voltage output circuit has decoders, a selecting circuit, a logical circuit and an output circuit in order to select one of plural gradation power source lines for a prescribed period based upon k bits and m bits of an n-bit digital signal. The k bits of the digital signal are converting into 2.sup.k decoded signals by one decoder, and another m bits are converted into 2.sup.m decoded signals by the other decoder. The selecting circuit generates a signal for selecting one of periods which were obtained by dividing one horizontal scanning period into 2.sup.k based upon k-numbered timing signals by using the 2.sup.k decoded signals. The logical circuit generates 2.sup.n signals composed of combinations of the signals from the selecting circuit and the 2.sup.m decoded signals. Moreover, one of the 2.sup.m gradation power source lines is selected by an output switch by using the signal from the logical circuit. As a result, in an image display device using a digital signal as an input video signal, a number of gradation power source lines is reduced and the arrangement of driving circuits is simplified without deteriorating display quality. As a result, a cost of the image display device can be lowered.
摘要翻译：电压输出电路具有解码器，选择电路，逻辑电路和输出电路，以便基于n比特数字信号的k比特和m比特来选择多个灰度级电源线中的一个规定时段。数字信号的k位由一个解码器转换成2k个解码信号，另一个m位由另一个解码器转换成2m个解码信号。选择电路通过使用2k个解码信号，生成用于选择通过基于k个编号的定时信号将一个水平扫描周期分成2k而获得的周期之一的信号。逻辑电路产生由来自选择电路的信号和2m个解码信号的组合组成的2n个信号。此外，通过使用来自逻辑电路的信号，由输出开关选择2m级的电源线之一。结果，在使用数字信号作为输入视频信号的图像显示装置中，减少了多个灰度电源线，并且简化了驱动电路的布置，而不会降低显示质量。结果，可以降低图像显示装置的成本。

2. 发明授权

US5926156A Matrix type image display using backup circuitry 失效
标题翻译：使用备用电路的矩阵型图像显示
公开(公告)号：US5926156A
公开(公告)日：1999-07-20
申请号：US556140
申请日：1995-11-09
申请人： Kenichi Katoh , Yasushi Kubota , Hiroshi Yoneda , Osamu Sasaki , Ichiro Shiraki
发明人： Kenichi Katoh , Yasushi Kubota , Hiroshi Yoneda , Osamu Sasaki , Ichiro Shiraki
IPC分类号： G09G3/36 , G02F1/136
CPC分类号： G09G3/3688 , G09G3/3677 , G09G2330/08
摘要： A driving circuit in a matrix type image display apparatus including a plurality of groups each including four standard unit circuits and one backup unit circuit. Each standard unit circuit includes disconnecting means for isolating the standard unit circuit from the driving circuit, and the backup unit circuit includes connecting means for connecting the backup unit circuit to an input signal line and an output signal line of any of the standard unit circuits within a group. The number of the backup unit circuits can be changed in accordance with a conforming ratio of each unit circuit, which makes it possible to eliminate idle backup unit circuits while maintaining a high overall conforming ratio of the driving circuit, thereby enhancing manufacturing efficiencies and reducing manufacturing costs.
摘要翻译：一种矩阵型图像显示装置中的驱动电路，包括多个组，每组包括四个标准单元电路和一个备用单元电路。每个标准单元电路包括用于将标准单元电路与驱动电路隔离的断开装置，并且备用单元电路包括用于将备用单元电路连接到任何标准单元电路的输入信号线和输出信号线的连接装置一个小组。备用单元电路的数量可以根据每个单元电路的一致比例而改变，这使得可以在保持驱动电路的高整体比例的同时消除空闲备用单元电路，从而提高制造效率并减少制造费用

3. 发明授权

US06879313B1 Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices 有权
标题翻译：移位寄存器电路，具有电路的图像显示装置以及LCD装置的驱动方法
公开(公告)号：US06879313B1
公开(公告)日：2005-04-12
申请号：US09523511
申请日：2000-03-10
申请人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
发明人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
IPC分类号： G09G3/36 , G11C19/28 , G11C19/00
CPC分类号： G09G3/3688 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2320/0233 , G11C19/28
摘要： A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.
摘要翻译：移位寄存器电路包括串联连接的多个锁存电路，以顺序地将脉冲信号ST从一个传送到另一个，一个发送时钟信号CLK的时钟信号线以及执行时钟信号之间的电连接和断开的多个开关电路线和多个锁存电路。在接通移位寄存器时，至少一个开关电路将至少一个锁存电路与时钟信号线电断开。在电源接通之后的初始化期间，时钟信号CLK的频率比正常运行期间低，并且在正常运行期间逐渐增大。

4. 发明授权

US5926234A Liquid crystal display device 失效
标题翻译：液晶显示装置
公开(公告)号：US5926234A
公开(公告)日：1999-07-20
申请号：US877567
申请日：1997-06-17
申请人： Ichiro Shiraki , Yasushi Kubota , Hiroshi Yoneda
发明人： Ichiro Shiraki , Yasushi Kubota , Hiroshi Yoneda
IPC分类号： G02F1/136 , G02F1/133 , G02F1/1362 , G02F1/1368 , G09G3/36 , H01L29/78 , H01L29/786 , G02F1/1333 , G02F1/1345 , H01L23/62
CPC分类号： G02F1/13454 , G02F1/136204 , G02F2001/136254 , G09G3/3611 , H01L2924/0002
摘要： Picture elements and driving circuits for driving respective picture elements are monolithically formed on an insulating substrate. A protective circuit is provided for allowing input-output terminals of a driving circuit to conduct when a potential difference of not less than a predetermined value is generated. The protective circuit includes an MOS transistor, and a turn-on voltage thereof is set according to a thickness of a gate insulating layer. The protective circuit is formed on the insulating substrate simultaneously when forming the driving circuits. In this arrangement, because the turn-on voltage is set according to the thickness of the gate insulating layer and the thickness can be easily adjusted, an accurate turn-on voltage can be achieved. Since the arrangement prevents an increase in manufacturing cost, the driving circuits, etc., can be surely protected against static electricity generated in the manufacturing process and the input surge in the normal operation.
摘要翻译：用于驱动各个像素的图像元件和驱动电路单片地形成在绝缘基板上。提供保护电路，用于当产生不小于预定值的电位差时允许驱动电路的输入输出端子导通。保护电路包括MOS晶体管，并且其导通电压根据栅绝缘层的厚度设定。当形成驱动电路时，保护电路同时形成在绝缘基板上。在这种布置中，由于根据栅极绝缘层的厚度设定导通电压并且可以容易地调节厚度，所以可以实现准确的导通电压。由于该装置防止制造成本的增加，因此可以可靠地保护驱动电路等，以免在制造过程中产生的静电和正常操作中的输入浪涌。

5. 发明授权

US5926158A Image display apparatus 失效
标题翻译：图像显示装置
公开(公告)号：US5926158A
公开(公告)日：1999-07-20
申请号：US610128
申请日：1996-02-29
申请人： Hiroshi Yoneda , Kenichi Katoh , Yutaka Ishii , Yasushi Kubota
发明人： Hiroshi Yoneda , Kenichi Katoh , Yutaka Ishii , Yasushi Kubota
IPC分类号： G02F1/133 , G02F1/136 , G02F1/1368 , G09G3/20 , G09G3/36
CPC分类号： G09G3/3688 , G09G3/3648 , G09G3/3659 , G09G2300/0809 , G09G2300/0842 , G09G2310/0251 , G09G2330/023 , G09G3/2011
摘要： An active matrix type image display apparatus which includes: a plurality of data signal lines; a plurality of scanning signal lines crossing the plurality of data signal lines; and a plurality of pixel portions disposed in a matrix in areas enclosed by the plurality of data signal lines and the plurality of scanning signal lines, wherein each of the plurality of pixel portions includes: a pixel capacitor for storing electric charge supplied from at least one of the plurality of data signal lines, to display an image; storage unit connected to the pixel capacitor; and switching unit which alternately selects one of an operation for electrically connecting the pixel capacitor to the storage unit and an operation for electrically disconnecting the pixel capacitor from the storage unit.
摘要翻译：一种有源矩阵型图像显示装置，包括：多条数据信号线; 与所述多条数据信号线交叉的多条扫描信号线; 以及由多个数据信号线和多条扫描信号线包围的区域中矩阵地配置的多个像素部，其中，所述多个像素部分中的每一个包括：像素电容器，用于存储从至少一个的多个数据信号线，以显示图像; 存储单元连接到像素电容器; 以及切换单元，其交替地选择用于将像素电容器电连接到存储单元的操作中的一个以及用于将像素电容器与存储单元电气断开的操作。

6. 发明授权

US5712653A Image display scanning circuit with outputs from sequentially switched pulse signals 失效
公开(公告)号：US5712653A
公开(公告)日：1998-01-27
申请号：US363217
申请日：1994-12-23
申请人： Kenichi Katoh , Yasushi Kubota , Hiroshi Yoneda , Tamotsu Sakai
发明人： Kenichi Katoh , Yasushi Kubota , Hiroshi Yoneda , Tamotsu Sakai
IPC分类号： G09G3/20 , G09G3/36
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2310/0297 , G09G2330/08 , G09G3/2011
摘要： An active-matrix image display device which includes n shift registers, analog switches for sampling video input signals and a data-signal-line driving circuit to which n series of clock signals and n.times.m series of video input signals are input, and controls the analog switches according to the result of a logic operation of output pulses from successive l stages in the shift registers. A scanning circuit without using shift registers. Here, n is an integer not smaller than one, m and l are integers not smaller than two. With the image display device, sampling of video signals is surely executed without increasing the number of shift registers. It is thus possible to reduce the size and weight of the image display device and to decrease the defect rate thereof. Moreover, the scanning circuit achieves a higher yield compared with a conventional scanning circuit using a shift register.

7. 发明申请

US20050168252A1 Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices 失效
公开(公告)号：US20050168252A1
公开(公告)日：2005-08-04
申请号：US11063718
申请日：2005-02-23
申请人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
发明人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
IPC分类号： G09G3/36 , G11C19/28 , H03L7/00
CPC分类号： G09G3/3688 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2320/0233 , G11C19/28
摘要： A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.

8. 发明授权

US5898322A Logic circuit for liquid crystal display having pass-transistor logic circuitry and thin film transistors 失效
标题翻译：具有传输晶体管逻辑电路和薄膜晶体管的液晶显示器的逻辑电路
公开(公告)号：US5898322A
公开(公告)日：1999-04-27
申请号：US524503
申请日：1995-09-07
申请人： Yasushi Kubota , Hiroshi Yoneda
发明人： Yasushi Kubota , Hiroshi Yoneda
IPC分类号： G02F1/133 , G11C19/00 , H01L27/12 , H03K19/0175 , H03K19/173 , H03K19/21 , H03K19/094 , H01L27/00
CPC分类号： H03K19/215 , H03K19/1737
摘要： A logic circuit performs a logic operation on a plurality of input logic signals and outputting a resultant logic signal. The logic circuit comprises a pass-transistor logic circuit including: a plurality of field effect transistors, at least two of the plurality of field effect transistors being coupled in series, a gate electrode of each of the at least two field effect transistors receiving a corresponding first logic signal, and one of drain and source electrodes ditto receiving a corresponding second logic signal; and a node for coupling the other of the drain and source electrodes of the at least two field effect transistors, and for outputting the resultant logic signal. The plurality of field effect transistors are thin film transistors (TFTs).
摘要翻译：逻辑电路对多个输入逻辑信号执行逻辑运算并输出合成的逻辑信号。逻辑电路包括一个通过晶体管逻辑电路，包括：多个场效应晶体管，多个场效应晶体管中的至少两个串联耦合，所述至少两个场效应晶体管中的每一个的栅电极接收相应的第一逻辑信号，以及漏极和源极之一，同时接收对应的第二逻辑信号; 以及用于耦合所述至少两个场效应晶体管的所述漏极和源极中的另一个的节点，并用于输出所得到的逻辑信号。多个场效应晶体管是薄膜晶体管（TFT）。

9. 发明授权

US5734366A Signal amplifier, signal amplifier circuit, signal line drive circuit and image display device 失效
公开(公告)号：US5734366A
公开(公告)日：1998-03-31
申请号：US554286
申请日：1995-11-06
申请人： Yasushi Kubota , Kenichi Katoh , Hiroshi Yoneda
发明人： Yasushi Kubota , Kenichi Katoh , Hiroshi Yoneda
IPC分类号： G09G3/20 , G09G3/36 , G11C19/00 , H03F1/30 , H03G1/00 , H04N5/14 , H04N5/16 , H04N5/66 , H04N5/68 , H04N5/70
CPC分类号： G09G3/2011 , G09G3/3688 , G11C19/00 , H03F1/303 , H03G1/00 , H04N5/68 , H04N5/148 , H04N5/16 , H04N5/66 , H04N5/70
摘要： An image display device includes an operational amplifier, a signal amplifier provided with a condenser for setting a gain of the operational amplifier, a signal amplifier circuit having such signal amplifier or a buffer amplifier, the signal amplifier circuit being provided with an offset adjusting function, and a data signal line drive circuit having a signal amplifier or a signal line drive circuit. The described arrangement enables the gain of the signal amplifier to be set by a capacitance of the condenser, thereby providing a signal amplifier circuit which permits the gain to be set much more precisely as compared to the conventional signal amplifier circuits even when adopting a signal amplifier formed on a semiconductor thin film such as a polycrystalline silicone thin film. The arrangement also provides a signal amplifier circuit which permits a voltage in the same level as a voltage of the input signal to be outputted. Furthermore, the arrangement provides high quality data signal line drive circuit and the image display device.

10. 发明授权

US6054976A Signal amplifier, signal amplifier circuit, signal line drive circuit and image display device 失效
标题翻译：信号放大器，信号放大电路，信号线驱动电路和图像显示装置
公开(公告)号：US6054976A
公开(公告)日：2000-04-25
申请号：US4327
申请日：1998-01-08
申请人： Yasushi Kubota , Kenichi Katoh , Hiroshi Yoneda
发明人： Yasushi Kubota , Kenichi Katoh , Hiroshi Yoneda
IPC分类号： G09G3/20 , G09G3/36 , G11C19/00 , H03F1/30 , H03G1/00 , H04N5/14 , H04N5/16 , H04N5/66 , H04N5/68 , H04N5/70
CPC分类号： G09G3/2011 , G09G3/3688 , G11C19/00 , H03F1/303 , H03G1/00 , H04N5/68 , H04N5/148 , H04N5/16 , H04N5/66 , H04N5/70
摘要： An image display device includes an operational amplifier, a signal amplifier provided with a condenser for setting a gain of the operational amplifier, a signal amplifier circuit having such signal amplifier or a buffer amplifier, the signal amplifier circuit being provided with an offset adjusting function, and a data signal line drive circuit having a signal amplifier or a signal line drive circuit. The described arrangement enables the gain of the signal amplifier to be set by a capacitance of the condenser, thereby providing a signal amplifier circuit which permits the gain to be set much more precisely as compared to the conventional signal amplifier circuits even when adopting a signal amplifier formed on a semiconductor thin film such as a polycrystalline silicone thin film. The arrangement also provides a signal amplifier circuit which permits a voltage in the same level as a voltage of the input signal to be outputted. Furthermore, the arrangement provides high quality data signal line drive circuit and the image display device.
摘要翻译：图像显示装置包括运算放大器，设置有用于设置运算放大器的增益的电容器的信号放大器，具有这种信号放大器的信号放大器电路或缓冲放大器，信号放大器电路具有偏移调整功能，以及具有信号放大器或信号线驱动电路的数据信号线驱动电路。所描述的布置使得信号放大器的增益可以由电容器的电容设置，从而提供信号放大器电路，其允许与传统的信号放大器电路相比更加精确地设置增益，即使采用信号放大器形成在诸如多晶硅薄膜的半导体薄膜上。该装置还提供一种信号放大器电路，其允许输出与输入信号的电压相同电平的电压。此外，该装置提供高质量的数据信号线驱动电路和图像显示装置。

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