专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06662132B2 Noise analyzing method and apparatus and storage medium 有权
公开(公告)号：US06662132B2
公开(公告)日：2003-12-09
申请号：US09733076
申请日：2000-12-11
申请人： Yasuhiro Yamashita , Shogo Fujimori , Ryoji Yamada , Kazuhiko Tokuda , Makoto Suwada , Masaki Tosaka , Jiro Yoneda , Yoshiyuki Iwakura , Kazunari Gotou
发明人： Yasuhiro Yamashita , Shogo Fujimori , Ryoji Yamada , Kazuhiko Tokuda , Makoto Suwada , Masaki Tosaka , Jiro Yoneda , Yoshiyuki Iwakura , Kazunari Gotou
IPC分类号： G06F1750
CPC分类号： G01R31/30
摘要： A noise analyzing method analyzes a crosstalk noise based on circuit data in which buses having the same signal transmitting direction and buses having opposite signal transmitting directions are distinguished from each other, by analyzing the crosstalk noise only for the same signal transmitting direction with respect to the buses having the same signal transmitting direction.

2. 发明授权

US07280953B2 Noise countermeasure determination method and apparatus and storage medium 失效
标题翻译：噪声对策确定方法及装置及存储介质
公开(公告)号：US07280953B2
公开(公告)日：2007-10-09
申请号：US09881732
申请日：2001-06-18
申请人： Shogo Fujimori , Yasuhiro Yamashita , Ryoji Yamada , Masaki Tosaka , Kazuhiko Tokuda , Jiro Yoneda , Makoto Suwada , Tatsuo Koizumi
发明人： Shogo Fujimori , Yasuhiro Yamashita , Ryoji Yamada , Masaki Tosaka , Kazuhiko Tokuda , Jiro Yoneda , Makoto Suwada , Tatsuo Koizumi
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A noise countermeasure determination method includes the step of obtaining an analyzing circuit judgement result by judging acceptability of the analyzing circuit based on a comparison of features of the analyzing circuit and transmission circuit topologies, and outputting an improvement proposal for making the analyzing circuit closer to one of basic types of the transmission circuit topologies depending on the analyzing circuit judgement result.
摘要翻译：噪声对策确定方法包括以下步骤：通过基于分析电路的特征和传输电路拓扑结构的比较来判断分析电路的可接受性来获得分析电路判断结果，并输出使分析电路更接近于一个的改进方案基于分析电路判断结果的传输电路拓扑的基本类型。

3. 发明授权

US07065480B2 Noise countermeasure determination method and apparatus and storage medium 失效
标题翻译：噪声对策确定方法及装置及存储介质
公开(公告)号：US07065480B2
公开(公告)日：2006-06-20
申请号：US09750051
申请日：2000-12-29
申请人： Shogo Fujimori , Yasuhiro Yamashita , Ryoji Yamada , Masaki Tosaka , Kazuhiko Tokuda , Jiro Yoneda , Makoto Suwada , Tatsuo Koizumi
发明人： Shogo Fujimori , Yasuhiro Yamashita , Ryoji Yamada , Masaki Tosaka , Kazuhiko Tokuda , Jiro Yoneda , Makoto Suwada , Tatsuo Koizumi
IPC分类号： G06F17/50
CPC分类号： G06F17/10
摘要： A noise countermeasure determination method includes the steps of calculating recommended circuit information considered to minimize a noise by use of at least one formula, based on input circuit information amounting to at least one net of a target circuit which is to be subjected to a noise analysis, and comparing the input circuit information and the recommended circuit information, and determining a differing portion of the recommended circuit information differing from the input circuit information, as noise countermeasures.
摘要翻译：噪声对策确定方法包括以下步骤：基于输入电路信息计算所考虑的使噪声最小化的推荐电路信息，所述输入电路信息等于要进行噪声分析的目标电路的至少一个网络比较输入电路信息和推荐电路信息，并将不同于输入电路信息的推荐电路信息的不同部分确定为噪声对策。

4. 发明申请

US20080163138A1 POWER SUPPLY NOISE ANALYSIS MODEL GENERATING METHOD AND POWER SUPPLY NOISE ANALYSIS MODEL GENERATING APPARATUS 有权
标题翻译：电源噪声分析模型生成方法和电源噪声分析模型生成装置
公开(公告)号：US20080163138A1
公开(公告)日：2008-07-03
申请号：US11864122
申请日：2007-09-28
申请人： Yoshiyuki Iwakura , Shogo Fujimori , Tendou Hirai , Hitoshi Chida , Kazuyoshi Kanei , Koutarou Nimura
发明人： Yoshiyuki Iwakura , Shogo Fujimori , Tendou Hirai , Hitoshi Chida , Kazuyoshi Kanei , Koutarou Nimura
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F2217/78 , H05K1/0216 , H05K3/0005
摘要： An object is to simplify a power supply noise analysis model of a circuit board. CAD data of the circuit board is obtained from a CAD apparatus, and overlapping power supply islands among power supply islands existing in different layers of the circuit board are extracted as a power supply pair. Nodes are arranged in the extracted power supply pair, and the nodes of the power supply pair are projected on the power supply islands to which the power supply pair belongs. A mesh region which encloses each node is determined for each power supply island, and impedance (L, R, C) between nodes is calculated. Then, a power supply noise analysis model is created based on the impedance between nodes in each layer, and a capacitance between layers.
摘要翻译：目的是简化电路板的电源噪声分析模型。从CAD装置获得电路板的CAD数据，并且提取存在于电路板的不同层中的电源岛之间的重叠电源岛作为电源对。节点布置在提取的电源对中，并且电源对的节点投影在电源对所属的电源岛上。为每个电源岛确定封闭每个节点的网格区域，并计算节点之间的阻抗（L，R，C）。然后，基于每层中的节点之间的阻抗以及层之间的电容来创建电源噪声分析模型。

5. 发明授权

US08243995B2 Apparatus and method for eye margin calculating, and computer-readable recording medium recording program therefof 有权
标题翻译：记录介质记录程序的装置和方法
公开(公告)号：US08243995B2
公开(公告)日：2012-08-14
申请号：US12591843
申请日：2009-12-02
申请人： Daita Tsubamoto , Masaki Tosaka , Shogo Fujimori
发明人： Daita Tsubamoto , Masaki Tosaka , Shogo Fujimori
IPC分类号： G06K9/00
CPC分类号： G01R31/31711 , G01R31/31708
摘要： A center location of an eye pattern generated by superimposing waveform signal pieces cut out from a waveform signal generated by a simulator is calculated, and an arrangement of a mask as a quality evaluation criterion of the eye pattern on the center location is envisaged to calculate time coordinate values and voltage coordinate values of feature points included in the mask. First feature points not on a time axis is set as processing objects, and a margin in the voltage axis direction is calculated based on the voltage coordinate values of the first feature points and the voltage coordinate values of waveform signal piece parts associated with the first feature points. Second feature points on the time axis is set as processing objects, and a margin in the time axis direction is calculated based on the time coordinate values of the second feature points and the time coordinate values of waveform signal piece parts associated with the second feature points.
摘要翻译：计算通过叠加由模拟器产生的波形信号切出的波形信号片而生成的眼图的中心位置，并且设想将作为眼图的质量评估准则的掩模作为中心位置的布置来计算时间掩模中包含的特征点的坐标值和电压坐标值。将不在时间轴上的第一特征点设置为处理对象，并且基于第一特征点的电压坐标值和与第一特征相关联的波形信号片部分的电压坐标值计算电压轴方向上的余量积分将时间轴上的第二特征点设置为处理对象，并且基于第二特征点的时间坐标值和与第二特征点相关联的波形信号片段的时间坐标值来计算时间轴方向上的余量。

6. 发明申请

US20100080421A1 Apparatus and method for eye margin calculating, and computer-readable recording medium recording program therefof 有权
标题翻译：记录介质记录程序的装置和方法
公开(公告)号：US20100080421A1
公开(公告)日：2010-04-01
申请号：US12591843
申请日：2009-12-02
申请人： Daita Tsubamoto , Masaki Tosaka , Shogo Fujimori
发明人： Daita Tsubamoto , Masaki Tosaka , Shogo Fujimori
IPC分类号： G06K9/00
CPC分类号： G01R31/31711 , G01R31/31708
摘要： A center location of an eye pattern generated by superimposing waveform signal pieces cut out from a waveform signal generated by a simulator is calculated, and an arrangement of a mask as a quality evaluation criterion of the eye pattern on the center location is envisaged to calculate time coordinate values and voltage coordinate values of feature points included in the mask. First feature points not on a time axis is set as processing objects, and a margin in the voltage axis direction is calculated based on the voltage coordinate values of the first feature points and the voltage coordinate values of waveform signal piece parts associated with the first feature points. Second feature points on the time axis is set as processing objects, and a margin in the time axis direction is calculated based on the time coordinate values of the second feature points and the time coordinate values of waveform signal piece parts associated with the second feature points.
摘要翻译：计算通过叠加由模拟器产生的波形信号切出的波形信号片而生成的眼图的中心位置，并且设想将作为眼图的质量评估准则的掩模作为中心位置的布置来计算时间掩模中包含的特征点的坐标值和电压坐标值。将不在时间轴上的第一特征点设置为处理对象，并且基于第一特征点的电压坐标值和与第一特征相关联的波形信号片部分的电压坐标值计算电压轴方向上的余量积分将时间轴上的第二特征点设置为处理对象，并且基于第二特征点的时间坐标值和与第二特征点相关联的波形信号片段的时间坐标值来计算时间轴方向上的余量。

7. 发明授权

US07975253B2 Power supply noise analysis model generating method and power supply noise analysis model generating apparatus 有权
标题翻译：电源噪声分析模型生成方法和电源噪声分析模型生成装置
公开(公告)号：US07975253B2
公开(公告)日：2011-07-05
申请号：US11864122
申请日：2007-09-28
申请人： Yoshiyuki Iwakura , Shogo Fujimori , Tendou Hirai , Hitoshi Chida , Kazuyoshi Kanei , Koutarou Nimura
发明人： Yoshiyuki Iwakura , Shogo Fujimori , Tendou Hirai , Hitoshi Chida , Kazuyoshi Kanei , Koutarou Nimura
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F2217/78 , H05K1/0216 , H05K3/0005
摘要： An object is to simplify a power supply noise analysis model of a circuit board. CAD data of the circuit board is obtained from a CAD apparatus, and overlapping power supply islands among power supply islands existing in different layers of the circuit board are extracted as a power supply pair. Nodes are arranged in the extracted power supply pair, and the nodes of the power supply pair are projected on the power supply islands to which the power supply pair belongs. A mesh region which encloses each node is determined for each power supply island, and impedance (L, R, C) between nodes is calculated. Then, a power supply noise analysis model is created based on the impedance between nodes in each layer, and a capacitance between layers.
摘要翻译：目的是简化电路板的电源噪声分析模型。从CAD装置获得电路板的CAD数据，并且提取存在于电路板的不同层中的电源岛之间的重叠电源岛作为电源对。节点布置在提取的电源对中，并且电源对的节点投影在电源对所属的电源岛上。为每个电源岛确定封闭每个节点的网格区域，并计算节点之间的阻抗（L，R，C）。然后，基于每层中的节点之间的阻抗以及层之间的电容来创建电源噪声分析模型。

8. 发明申请

US20100082304A1 POWER SUPPLY NOISE ANALYSIS MODEL CREATION METHOD AND APPARATUS, AND RECORDING MEDIUM STORING PROGRAM FOR POWER SUPPLY NOISE ANALYSIS MODEL CREATION 有权
标题翻译：电源噪声分析模型创建方法和装置，以及记录电源噪声分析模型创建中的存储程序
公开(公告)号：US20100082304A1
公开(公告)日：2010-04-01
申请号：US12567923
申请日：2009-09-28
申请人： Shogo Fujimori , Koutarou Nimura , Tendou Hirai
发明人： Shogo Fujimori , Koutarou Nimura , Tendou Hirai
IPC分类号： G06G7/62 , G06F17/50
CPC分类号： G06F17/5036 , H05K3/0005 , H05K2201/09663
摘要： A power supply noise analysis model creation method comprising; obtaining a distance which appears most frequently, from among the distances from a vias judged to be the nearest to the vias, respectively, as a reference via pitch, generates four nodes for the via of target wherein the four nodes generates the middle point with the other four via that are near the via of the target, obtaining meshes which include the nodes, respectively, by dividing the power island structure and the power supply pair by dividing lines which pass between the generated nodes, and converting each of the meshes obtained to a circuit element equivalent to the mesh.
摘要翻译：一种电源噪声分析模型创建方法，包括：获得最频繁出现的距离，从被判断为最接近通孔的通孔的距离分别作为通过间距的参考，生成用于目标通道的四个节点，其中四个节点产生具有其他四个通孔分别通过目标的通孔分别获得包括节点的网格，通过在生成的节点之间划分通过划分线的功率岛结构和电源对，并将获得的每个网格转换为相当于网格的电路元件。

9. 发明授权

US07398497B2 Electronic circuit designing method apparatus for designing an electronic circuit, and storage medium for storing an electronic circuit designing method 有权
标题翻译：电子电路设计方法，电子电路设计装置和用于存储电子电路设计方法的存储介质
公开(公告)号：US07398497B2
公开(公告)日：2008-07-08
申请号：US10992755
申请日：2004-11-22
申请人： Toshiro Sato , Kazumasa Kobayashi , Shogo Fujimori
发明人： Toshiro Sato , Kazumasa Kobayashi , Shogo Fujimori
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/5036
摘要： An electronic circuit designing method and apparatus designs an electronic circuit by CAD, by generating design constraints with respect to the electronic circuit based on at least one of general layout and wiring information related to devices and wirings included in the electronic circuit, user requirements defined by a user, and user resources defined by the user, and urging an input to the user by displaying the design constraints.
摘要翻译：电子电路设计方法和装置通过CAD设计电子电路，基于与电子电路中包括的设备和布线相关的一般布局和布线信息中的至少一个，相对于电子电路产生设计约束，由用户和由用户定义的用户资源，并且通过显示设计约束来敦促对用户的输入。

10. 发明授权

US08392156B2 Power supply noise analysis model creation method and apparatus, and recording medium storing program for power supply noise analysis model creation 有权
标题翻译：电源噪声分析模型创建方法和装置，以及用于电源噪声分析模型创建的记录介质存储程序
公开(公告)号：US08392156B2
公开(公告)日：2013-03-05
申请号：US12567923
申请日：2009-09-28
申请人： Shogo Fujimori , Koutarou Nimura , Tendou Hirai
发明人： Shogo Fujimori , Koutarou Nimura , Tendou Hirai
IPC分类号： G06F7/60 , G06F17/50
CPC分类号： G06F17/5036 , H05K3/0005 , H05K2201/09663
摘要： A power supply noise analysis model creation method comprising; obtaining a distance which appears most frequently, from among the distances from a vias judged to be the nearest to the vias, respectively, as a reference via pitch, generates four nodes for the via of target wherein the four nodes generates the middle point with the other four via that are near the via of the target, obtaining meshes which include the nodes, respectively, by dividing the power island structure and the power supply pair by dividing lines which pass between the generated nodes, and converting each of the meshes obtained to a circuit element equivalent to the mesh.
摘要翻译：一种电源噪声分析模型创建方法，包括：获得最频繁出现的距离，从被判断为最接近通孔的通孔的距离分别作为通过间距的参考，生成用于目标通道的四个节点，其中四个节点产生具有其他四个通孔分别通过目标的通孔分别获得包括节点的网格，通过在生成的节点之间划分通过划分线的功率岛结构和电源对，并将获得的每个网格转换为相当于网格的电路元件。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式