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1. 发明授权

US5920574A Method for accelerated test of semiconductor devices 失效
标题翻译：半导体器件加速测试方法
公开(公告)号：US5920574A
公开(公告)日：1999-07-06
申请号：US932894
申请日：1997-09-18
申请人： Yasuhiro Shimada , Keisaku Nakao , Atsuo Inoue , Masamichi Azuma , Eiji Fujii
发明人： Yasuhiro Shimada , Keisaku Nakao , Atsuo Inoue , Masamichi Azuma , Eiji Fujii
IPC分类号： G01R31/26 , G01R31/28 , G01R31/30 , G11C11/22 , G11C29/50 , G11C29/56 , H01L21/66 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , G11C29/00 , G01R1/04
CPC分类号： G11C29/50016 , G11C29/50 , G11C11/22 , G11C2029/5002
摘要： A method for an accelerated test of semiconductor devices comprises the steps of determining a relational expression t.sub.1 =t.sub.2.sup.m between an information holding lifetime t.sub.1 at a temperature T.sub.1 and another lifetime t.sub.2 at another temperature T.sub.2, expressing the exponent m as a function of the temperature that is proportional to the Boltzmann's factor, and calculating the information holding lifetime t.sub.2 at the temperature T.sub.2 on the basis of the information holding lifetime t.sub.1 at the temperature T.sub.1 using the relational expression.
摘要翻译：一种用于半导体器件的加速测试的方法包括以下步骤：确定在温度T1下的信息保持寿命t1和在另一温度T2的另一寿命t2之间的关系表达式t1 = t2m，其表示作为温度的函数的指数m 与玻耳兹曼因子成正比，并且使用关系式，基于温度T1下的信息保持寿命t1计算温度T2下的信息保持期限t2。

2. 发明授权

US06204111B1 Fabrication method of capacitor for integrated circuit 失效
标题翻译：集成电路电容器的制作方法
公开(公告)号：US06204111B1
公开(公告)日：2001-03-20
申请号：US09238157
申请日：1999-01-28
申请人： Yasuhiro Uemoto , Eiji Fujii , Koji Arita , Yoshihisa Nagano , Yasuhiro Shimada , Masamichi Azuma , Atsuo Inoue , Yasufumi Izutsu
发明人： Yasuhiro Uemoto , Eiji Fujii , Koji Arita , Yoshihisa Nagano , Yasuhiro Shimada , Masamichi Azuma , Atsuo Inoue , Yasufumi Izutsu
IPC分类号： H01L218242
CPC分类号： H01L27/11502 , H01L28/40 , H01L28/56
摘要： A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.
摘要翻译：一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

3. 发明授权

US06468875B2 Fabrication method of capacitor for integrated circuit 失效
标题翻译：集成电路电容器的制作方法
公开(公告)号：US06468875B2
公开(公告)日：2002-10-22
申请号：US09768170
申请日：2001-01-24
申请人： Yasuhiro Uemoto , Eiji Fujii , Koji Arita , Yoshihisa Nagano , Yasuhiro Shimada , Masamichi Azuma , Atsuo Inoue , Yasufumi Izutsu
发明人： Yasuhiro Uemoto , Eiji Fujii , Koji Arita , Yoshihisa Nagano , Yasuhiro Shimada , Masamichi Azuma , Atsuo Inoue , Yasufumi Izutsu
IPC分类号： H01L2120
CPC分类号： H01L27/11502 , H01L28/40 , H01L28/56
摘要： A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.
摘要翻译：一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

4. 发明授权

US06214660B1 Capacitor for integrated circuit and its fabrication method 失效
标题翻译：集成电路电容及其制造方法
公开(公告)号：US06214660B1
公开(公告)日：2001-04-10
申请号：US09177620
申请日：1998-10-23
申请人： Yasuhiro Uemoto , Eigi Fujii , Koji Arita , Yoshihisa Nagano , Yasuhiro Shimada , Masamichi Azuma , Atsuo Inoue , Yasufumi Izutsu
发明人： Yasuhiro Uemoto , Eigi Fujii , Koji Arita , Yoshihisa Nagano , Yasuhiro Shimada , Masamichi Azuma , Atsuo Inoue , Yasufumi Izutsu
IPC分类号： H01L213205
CPC分类号： H01L27/11502 , H01L28/40 , H01L28/56
摘要： A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.
摘要翻译：一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

5. 发明授权

US6033920A Method of manufacturing a high dielectric constant capacitor 失效
标题翻译：制造高介电常数电容器的方法
公开(公告)号：US6033920A
公开(公告)日：2000-03-07
申请号：US122492
申请日：1998-07-24
申请人： Yasuhiro Shimada , Yasuhiro Uemoto , Atsuo Inoue , Taketoshi Matsuura , Masamichi Azuma
发明人： Yasuhiro Shimada , Yasuhiro Uemoto , Atsuo Inoue , Taketoshi Matsuura , Masamichi Azuma
IPC分类号： H01L27/04 , H01L21/02 , H01L21/314 , H01L21/316 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/105 , H01L27/108 , H01L29/92 , H01L21/00
CPC分类号： H01L28/60 , H01L21/31691 , H01L29/92 , H01L28/55
摘要： This invention relates to a semiconductor device with embedded capacitor elements of which capacitor insulation layer is made of ferroelectric layer or dielectric layer of high dielectric constant, and its manufacturing method. This invention is made in order to solve the problems of rapid increase of leak current of capacitor element and the poor reliability caused by the large deviation of crystal sizes of conventional capacitor insulation layer of capacitor element incorporated in the semiconductor device.This is accomplished by the invention of a capacitor element consisting of a substrate of semiconductor integrated circuit, a first electrode selectively deposited on the surface of said substrate, a capacitor insulation layer having a high dielectric constant deposited selectively on the surface of said first electrode, and a second electrode deposited on the surface of said capacitor insulation layer avoiding the contact with the first electrode, of which average grain diameters of crystal grains constituting the capacitor insulation layer are within a range of 5 to 20 nm, and the standard deviation of the sizes of crystal grains constituting said capacitor insulation layer is within 3 nm.
摘要翻译：本发明涉及一种具有埋入式电容器元件的半导体器件及其制造方法，电容器绝缘层由铁电层或高介电常数介电层制成。本发明是为了解决电容器元件的漏电流急剧增加的问题，以及由半导体器件中的电容器元件的常规电容绝缘层的晶体尺寸的大偏差导致的可靠性差。这是通过由半导体集成电路的衬底，选择性地沉积在所述衬底的表面上的第一电极，选择性沉积在所述第一电极的表面上的具有高介电常数的电容器绝缘层的电容器元件的发明来实现的，以及沉积在所述电容器绝缘层的表面上的第二电极，避免与构成电容器绝缘层的晶粒的平均晶粒直径的第一电极的接触在5nm至20nm的范围内，并且构成所述电容器绝缘层的晶粒尺寸在3nm以内。

6. 发明授权

US5828098A Semiconductor capacitor dielectric having various grain sizes 失效
标题翻译：具有各种粒径的半导体电容器电介质
公开(公告)号：US5828098A
公开(公告)日：1998-10-27
申请号：US667913
申请日：1996-06-20
申请人： Yasuhiro Shimada , Yasuhiro Uemoto , Atsuo Inoue , Taketoshi Matsuura , Masamichi Azuma
发明人： Yasuhiro Shimada , Yasuhiro Uemoto , Atsuo Inoue , Taketoshi Matsuura , Masamichi Azuma
IPC分类号： H01L27/04 , H01L21/02 , H01L21/314 , H01L21/316 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/105 , H01L27/108 , H01L29/92 , H01L29/43
CPC分类号： H01L28/60 , H01L21/31691 , H01L29/92 , H01L28/55
摘要： This invention relates to a semiconductor device with embedded capacitor elements of which capacitor insulation layer is made of ferroelectric layer or dielectric layer of high dielectric constant, and its manufacturing method. This invention is made in order to solve the problems of rapid increase of leak current of capacitor element and the poor reliability caused by the large deviation of crystal sizes of conventional capacitor insulation layer of capacitor element incorporated in the semiconductor device. This is accomplished by the invention of a capacitor element consisting of a substrate of semiconductor integrated circuit, a first electrode selectively deposited on the surface of said substrate, a capacitor insulation layer having a high dielectric constant deposited selectively on the surface of said first electrode, and a second electrode deposited on the surface of said capacitor insulation layer avoiding the contact with the first electrode, of which average grain diameters of crystal grains constituting the capacitor insulation layer are within a range of 5 to 20 nm, and the standard deviation of the sizes of crystal grains constituting said capacitor insulation layer is within 3 nm.
摘要翻译：本发明涉及一种具有埋入式电容器元件的半导体器件及其制造方法，电容器绝缘层由铁电层或高介电常数介电层制成。本发明是为了解决电容器元件的漏电流急剧增加的问题，以及由半导体器件中的电容器元件的常规电容绝缘层的晶体尺寸的大偏差导致的可靠性差。这是通过由半导体集成电路的衬底，选择性地沉积在所述衬底的表面上的第一电极，选择性沉积在所述第一电极的表面上的具有高介电常数的电容器绝缘层的电容器元件的发明来实现的，以及沉积在所述电容器绝缘层的表面上的第二电极，避免与构成电容器绝缘层的晶粒的平均晶粒直径的第一电极的接触在5nm至20nm的范围内，并且构成所述电容器绝缘层的晶粒尺寸在3nm以内。

7. 发明授权

US5929475A Capacitor for integrated circuit and its fabrication method 失效
标题翻译：集成电路电容及其制造方法
公开(公告)号：US5929475A
公开(公告)日：1999-07-27
申请号：US573134
申请日：1995-12-15
申请人： Yasuhiro Uemoto , Eigi Fujii , Koji Arita , Yoshihisa Nagano , Yasuhiro Shimada , Masamichi Azuma , Atsuo Inoue , Yasufumi Izutsu
发明人： Yasuhiro Uemoto , Eigi Fujii , Koji Arita , Yoshihisa Nagano , Yasuhiro Shimada , Masamichi Azuma , Atsuo Inoue , Yasufumi Izutsu
IPC分类号： H01L21/02 , H01L21/314 , H01L27/115 , H01L29/76 , H01L27/108 , H01L31/062
CPC分类号： H01L27/11502 , H01L28/40 , H01L28/56
摘要： A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.
摘要翻译：一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

8. 发明授权

US06169304A Semiconductor device having a passivation layer which minimizes diffusion of hydrogen into a dielectric layer 失效
标题翻译：具有钝化层的半导体器件使氢扩散到电介质层中最小化
公开(公告)号：US06169304A
公开(公告)日：2001-01-02
申请号：US09071534
申请日：1998-05-04
申请人： Koji Arita , Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Toru Nasu , Akihiro Matsuda , Yoshihisa Nagano , Atsuo Inoue , Taketoshi Matsuura , Tatsuo Otsuki
发明人： Koji Arita , Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Toru Nasu , Akihiro Matsuda , Yoshihisa Nagano , Atsuo Inoue , Taketoshi Matsuura , Tatsuo Otsuki
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , H01L27/10852 , H01L27/11585 , H01L27/1159 , H01L28/40 , H01L28/55 , H01L28/60 , H01L28/75 , Y10S438/958
摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.
摘要翻译：一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连在其他方面。通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

9. 发明授权

US5780351A Semiconductor device having capacitor and manufacturing method thereof 失效
标题翻译：具有电容器的半导体器件及其制造方法
公开(公告)号：US5780351A
公开(公告)日：1998-07-14
申请号：US844108
申请日：1997-04-28
申请人： Koji Arita , Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Toru Nasu , Akihiro Matsuda , Yoshihisa Nagano , Atsuo Inoue , Taketoshi Matsuura , Tatsuo Otsuki
发明人： Koji Arita , Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Toru Nasu , Akihiro Matsuda , Yoshihisa Nagano , Atsuo Inoue , Taketoshi Matsuura , Tatsuo Otsuki
IPC分类号： H01L21/02 , H01L21/8242 , H01L21/8246 , H01L27/115 , H01L21/20 , H01L21/00
CPC分类号： H01L27/11502 , H01L27/10852 , H01L27/11585 , H01L27/1159 , H01L28/40 , H01L28/55 , H01L28/60 , H01L28/75 , Y10S438/958
摘要： A semi conductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.
摘要翻译：一种半导体器件，其在形成集成电路的半导体衬底上通过层间绝缘层形成电容器。该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连在其他方面。通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

10. 发明授权

US6080617A Semiconductor device having capacitor and manufacturing method thereof 失效
标题翻译：具有电容器的半导体器件及其制造方法
公开(公告)号：US6080617A
公开(公告)日：2000-06-27
申请号：US950920
申请日：1997-10-15
申请人： Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Shinitirou Hayashi , Tooru Nasu , Koichi Arita , Atsuo Inoue , Akihiro Matsuda , Masaki Kibe , Tatsuo Ootsuki
发明人： Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Shinitirou Hayashi , Tooru Nasu , Koichi Arita , Atsuo Inoue , Akihiro Matsuda , Masaki Kibe , Tatsuo Ootsuki
IPC分类号： H01L21/02 , H01L21/8242 , H01L21/8246 , H01L27/06 , H01L27/115 , H01L29/92
CPC分类号： H01L27/11502 , H01L27/0629 , H01L27/0688 , H01L27/1085 , H01L27/11507 , H01L28/40 , H01L28/55
摘要： A semiconductor device comprising an integrated circuit and a capacitor. In this capacitor, a bottom electrode, a dielectric film and a top electrode are formed, independently of the integrated circuit, on the interlayer insulating film, and the top electrode and bottom electrode are connected with metal interconnections through contact holes opened in the protective film for protecting the surface of the capacitor. In this constitution, either the top electrode or the bottom electrode is connected the bias line of the integrated circuit, and the other is connected to the ground line, so that extraneous emission may be reduced without having to connect the capacitor outside.
摘要翻译：一种包括集成电路和电容器的半导体器件。在该电容器中，在层间绝缘膜上形成独立于集成电路的底电极，电介质膜和顶电极，并且顶电极和底电极通过在保护膜中开口的接触孔与金属互连连接用于保护电容器的表面。在这种结构中，顶部电极或底部电极与集成电路的偏置线连接，另一个连接到接地线，使得可以减少外部发射而不必将电容器连接到外部。

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