会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Semiconductor test data analysis system
    • 半导体测试数据分析系统
    • US06898545B2
    • 2005-05-24
    • US10186171
    • 2002-06-28
    • Yasuhiko IguchiHiroshi TamuraMitsuhiro EnokidaEarl Louis DombroskiThomas Robert Claus
    • Yasuhiko IguchiHiroshi TamuraMitsuhiro EnokidaEarl Louis DombroskiThomas Robert Claus
    • G01R31/28H01L21/02H01L21/66
    • G01R31/2846H01L22/20H01L2924/0002H01L2924/00
    • A semiconductor test data analysis system (1) automatically recording, during an analysis operation, operation information of the analysis operation, including analysis conditions or an analysis procedure for input test data, or analysis information obtained by the analysis operation. The analysis system includes a processing means (101), an analysis target data storage means (109), which stores the test data as analysis target data, a historical data storage means (107), which stores as historical data either operation information of the analysis operation or analysis information obtained by the analysis operation, and a display data storage means (112), which stores analysis information obtained by the analysis operation, which stores analysis display data generated by the processing means for the purpose of displaying the analysis information obtained by the analysis operation. In this system, when a new analysis operation is specified, the processing means (101) processes the input test data in accordance with the analysis operation, and processes at least one of the analysis target data, historical data, and display data by the new analysis operation.
    • 半导体测试数据分析系统(1)在分析操作期间自动记录分析操作的操作信息,包括分析条件或输入测试数据的分析程序或通过分析操作获得的分析信息。 分析系统包括处理装置(101),存储测试数据作为分析目标数据的分析对象数据存储装置(109),历史数据存储装置(107),其存储作为历史数据的操作信息 分析操作或通过分析操作获得的分析操作或分析信息;以及显示数据存储装置,其存储通过分析操作获得的分析信息,其存储由处理装置生成的用于显示所获得的分析信息的分析显示数据 通过分析操作。 在该系统中,当指定新的分析操作时,处理装置(101)根据分析操作处理输入的测试数据,并且通过新的处理处理分析目标数据,历史数据和显示数据中的至少一个 分析操作。
    • 2. 发明授权
    • Semiconductor test data analysis system
    • 半导体测试数据分析系统
    • US07035752B2
    • 2006-04-25
    • US11028823
    • 2005-01-04
    • Yasuhiko IguchiHiroshi TamuraMitsuhiro EnokidaEarl Louis DombroskiThomas Robert Claus
    • Yasuhiko IguchiHiroshi TamuraMitsuhiro EnokidaEarl Louis DombroskiThomas Robert Claus
    • H01L21/66
    • G01R31/2846H01L22/20H01L2924/0002H01L2924/00
    • A semiconductor test data analysis system (1) automatically recording, during an analysis operation, operation information of the analysis operation, including analysis conditions or an analysis procedure for input test data, or analysis information obtained by the analysis operation. The analysis system includes a processing means (101), an analysis target data storage means (109), which stores the test data as analysis target data, a historical data storage means (107), which stores as historical data either operation information of the analysis operation or analysis information obtained by the analysis operation, and a display data storage means (112), which stores analysis information obtained by the analysis operation, which stores analysis display data generated by the processing means for the purpose of displaying the analysis information obtained by the analysis operation. In this system, when a new analysis operation is specified, the processing means (101) processes the input test data in accordance with the analysis operation, and processes at least one of the analysis target data, historical data, and display data by the new analysis operation.
    • 半导体测试数据分析系统(1)在分析操作期间自动记录分析操作的操作信息,包括分析条件或输入测试数据的分析程序或通过分析操作获得的分析信息。 分析系统包括处理装置(101),存储测试数据作为分析目标数据的分析对象数据存储装置(109),历史数据存储装置(107),其存储作为历史数据的操作信息 分析操作或通过分析操作获得的分析操作或分析信息;以及显示数据存储装置,其存储通过分析操作获得的分析信息,其存储由处理装置生成的用于显示所获得的分析信息的分析显示数据 通过分析操作。 在该系统中,当指定新的分析操作时,处理装置(101)根据分析操作处理输入的测试数据,并且通过新的处理处理分析目标数据,历史数据和显示数据中的至少一个 分析操作。
    • 4. 发明授权
    • Data analysis method and apparatus therefor
    • 数据分析方法及其设备
    • US07053897B2
    • 2006-05-30
    • US10464624
    • 2003-06-18
    • Yasuhiko Iguchi
    • Yasuhiko Iguchi
    • G06T11/00
    • G06F17/246
    • A data analysis method, apparatus, and storage medium having computer readable program instructions embodied therein for use on a spreadsheet software having a plurality of cells displayed as a two-dimensional table on a computer including assigning to a first cell a definition of array representation data including a single array or multiple arrays of data, displaying to the first cell a first array display button, and selectively displaying the array representation data in a graphical or table format using an array data display device when the array display button is selected.
    • 一种数据分析方法,装置和存储介质,其具有体现在其中的计算机可读程序指令,用于具有在计算机上显示为二维表的多个单元的电子表格软件,包括向第一单元分配阵列表示数据的定义 包括单个阵列或多个数据阵列,向第一单元显示第一阵列显示按钮,并且当选择阵列显示按钮时,使用阵列数据显示装置选择性地以图形或表格格式显示阵列表示数据。
    • 5. 发明申请
    • Apparatus of measuring characteristics of semiconductor devices
    • 测量半导体器件特性的装置
    • US20070216435A1
    • 2007-09-20
    • US11717961
    • 2007-03-14
    • Yasuhiko Iguchi
    • Yasuhiko Iguchi
    • G01R31/02
    • G01R31/3004G01R31/31924
    • An apparatus of measuring characteristics of a plurality of semiconductor devices with a plurality of measurement units is disclosed. The apparatus includes a parallel measurement executability determination section and a plurality of measurement function sections. The parallel measurement executability determination section identifies sets of a semiconductor device and a measurement function, which are able to be measured in parallel based on connection information of the semiconductor devices. The plurality of measurement function sections use a first abstractive name which abstractively identifies the plurality of measurement units for the sets of the measurement functions and the semiconductor device which are able to be measured in parallel by the parallel measurement executability determination section.
    • 公开了一种用多个测量单元测量多个半导体器件的特性的装置。 该装置包括并行测量可执行性确定部分和多个测量功能部分。 并行测量可执行性确定部分基于半导体器件的连接信息来识别能够并行测量的半导体器件和测量功能的集合。 多个测量功能部分使用第一抽象名称,其抽象地识别能够由并行测量可执行性确定部分并行测量的测量功能组和半导体器件的多个测量单元。