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1. 发明申请

US20110153660A1 METHOD OF SEARCHING FOR KEY SEMICONDUCTOR OPERATION WITH RANDOMIZATION FOR WAFER POSITION 审中-公开
标题翻译：搜索用于主要半导体操作的方法用于放置位置的随机化
公开(公告)号：US20110153660A1
公开(公告)日：2011-06-23
申请号：US13040633
申请日：2011-03-04
申请人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
发明人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
IPC分类号： G06F17/30
CPC分类号： G05B19/41875 , G05B2219/32221 , G05B2219/45031 , H01L22/20 , Y02P90/22
摘要： A method of searching for the key semiconductor operation with randomization for wafer position, comprising: recording the wafer position and the wafer yields of a plurality of wafer ID respectively corresponding to a plurality of semiconductor operations; establishing a matrix model which describes the matrix set for wafer yields of the plurality of wafer ID; analyzing the matrix model, further computing the matrix set for wafer yields of the wafer ID, thereby acquiring the weightings of the randomized wafer positions in such semiconductor operations; and searching for a key semiconductor operation among the plurality of semiconductor operations; herein, by using a local regression model to estimate the wafer position effect, computing the weighting of the position effect in each semiconductor operation based on the estimated position effect and the randomized wafer yield, higher weighting thereof indicates the key semiconductor operation having greater position effect in the aforementioned semiconductor process.
摘要翻译：一种用于晶片位置的随机化搜索密钥半导体操作的方法，包括：分别记录分别对应于多个半导体操作的多个晶片ID的晶片位置和晶片产量; 建立描述多个晶片ID的晶片产量的矩阵集合的矩阵模型; 分析矩阵模型，进一步计算晶片ID的晶片产量的矩阵集，从而在这种半导体操作中获得随机晶片位置的权重; 以及在所述多个半导体操作中搜索密钥半导体操作; 在本文中，通过使用局部回归模型来估计晶片位置效应，基于估计的位置效应和随机晶片产量计算每个半导体操作中的位置效应的加权，其较高的加权指示具有较大位置效应的关键半导体操作在上述半导体工艺中。

2. 发明申请

US20100223027A1 MONITORING METHOD FOR MULTI TOOLS 审中-公开
标题翻译：多工具监控方法
公开(公告)号：US20100223027A1
公开(公告)日：2010-09-02
申请号：US12471722
申请日：2009-05-26
申请人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , SHIH CHANG KAO , CHENG-HAO CHEN
发明人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , SHIH CHANG KAO , CHENG-HAO CHEN
IPC分类号： G21C17/00
CPC分类号： G05B19/4183 , G05B2219/31294 , G05B2219/45031 , Y02P90/10
摘要： A monitoring method for multi tools is disclosed. The method includes the steps of providing a plurality of measurement tools for measuring the testing points of standard wafers, calculating a vector for representing a measurement tool, calculating the angle between every two of the vectors and determining the measurement tools having the same performance or not. Thereby, the measurement tools can be efficiently grouped and the measuring stability of the measurement tool is analyzed.
摘要翻译：公开了一种多工具的监控方法。该方法包括以下步骤：提供用于测量标准晶片的测试点的多个测量工具，计算用于表示测量工具的矢量，计算每两个向量之间的角度，并确定具有相同性能的测量工具。因此，可以有效地对测量工具进行分组，并且分析测量工具的测量稳定性。

3. 发明申请

US20100004882A1 FAULT DETECTION AND CLASSIFICATION METHOD FOR WAFER ACCEPTANCE TEST PARAMETERS 审中-公开
标题翻译：用于波形接收测试参数的故障检测和分类方法
公开(公告)号：US20100004882A1
公开(公告)日：2010-01-07
申请号：US12200958
申请日：2008-08-29
申请人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
发明人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
IPC分类号： G06F17/18 , G01R31/00
CPC分类号： G05B19/41875 , G05B2219/45031 , H01L21/67271 , H01L21/67276 , H01L22/14 , H01L22/20 , Y02P90/22
摘要： A fault detection and classification (FDC) method for wafer acceptance test (WAT) parameters includes the following steps. A plurality of fault detection and classification parameters is collected. A plurality of wafer acceptance test parameters that are corresponded by the fault detection and classification parameters is collected. The fault detection and classification parameters are grouped. A contingency table of the wafer acceptance test parameters corresponding to the fault detection and classification parameters is built. A probability model of the contingency table is built. Finally, a safety range of the probability model is determined.
摘要翻译：用于晶片验收测试（WAT）参数的故障检测和分类（FDC）方法包括以下步骤。收集多个故障检测和分类参数。收集由故障检测和分类参数对应的多个晶片验收测试参数。故障检测和分类参数分组。构建了与故障检测和分类参数对应的晶圆验收测试参数的应变表。构建应急表的概率模型。最后，确定概率模型的安全范围。

4. 发明申请

US20100093114A1 METHOD OF SEARCHING FOR KEY SEMICONDUCTOR OPERATION WITH RANDOMIZATION FOR WAFER POSITION 审中-公开
标题翻译：搜索用于主要半导体操作的方法用于放置位置的随机化
公开(公告)号：US20100093114A1
公开(公告)日：2010-04-15
申请号：US12330846
申请日：2008-12-09
申请人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
发明人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
IPC分类号： H01L21/02
CPC分类号： G05B19/41875 , G05B2219/32221 , G05B2219/45031 , Y02P90/22
摘要： A method of searching for the key semiconductor operation with randomization for wafer position, comprising: recording the wafer position and the wafer yields of a plurality of wafer ID respectively corresponding to a plurality of semiconductor operations; establishing a matrix model which describes the matrix set for wafer yields of the plurality of wafer ID; analyzing the matrix model, further computing the matrix set for wafer yields of the wafer ID, thereby acquiring the weightings of the randomized wafer positions in such semiconductor operations; and searching for a key semiconductor operation among the plurality of semiconductor operations; herein, by using a local regression model to estimate the wafer position effect, computing the weighting of the position effect in each semiconductor operation based on the estimated position effect and the randomized wafer yield, higher weighting thereof indicates the key semiconductor operation having greater position effect in the aforementioned semiconductor process.
摘要翻译：一种用于晶片位置的随机化搜索密钥半导体操作的方法，包括：分别记录分别对应于多个半导体操作的多个晶片ID的晶片位置和晶片产量; 建立描述多个晶片ID的晶片产量的矩阵集合的矩阵模型; 分析矩阵模型，进一步计算晶片ID的晶片产量的矩阵集，从而在这种半导体操作中获得随机晶片位置的权重; 以及在所述多个半导体操作中搜索密钥半导体操作; 在本文中，通过使用局部回归模型来估计晶片位置效应，基于估计的位置效应和随机晶片产量计算每个半导体操作中的位置效应的加权，其较高的加权指示具有较大位置效应的关键半导体操作在上述半导体工艺中。

5. 发明申请

US20110093226A1 FAULT DETECTION AND CLASSIFICATION METHOD FOR WAFER ACCEPTANCE TEST PARAMETERS 审中-公开
标题翻译：用于波形接收测试参数的故障检测和分类方法
公开(公告)号：US20110093226A1
公开(公告)日：2011-04-21
申请号：US12978879
申请日：2010-12-27
申请人： YIJ CHIEH-CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
发明人： YIJ CHIEH-CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
IPC分类号： G06F17/18 , G06F19/00
CPC分类号： G05B19/41875 , G05B2219/45031 , H01L21/67271 , H01L21/67276 , H01L22/14 , H01L22/20 , Y02P90/22
摘要： A fault detection and classification (FDC) method for wafer acceptance test (WAT) parameters includes the following steps. A plurality of fault detection and classification parameters is collected. A plurality of wafer acceptance test parameters that are corresponded by the fault detection and classification parameters is collected. The fault detection and classification parameters are grouped. A contingency table of the wafer acceptance test parameters corresponding to the fault detection and classification parameters is built. A probability model of the contingency table is built. Finally, a safety range of the probability model is determined.
摘要翻译：用于晶片验收测试（WAT）参数的故障检测和分类（FDC）方法包括以下步骤。收集多个故障检测和分类参数。收集由故障检测和分类参数对应的多个晶片验收测试参数。故障检测和分类参数分组。构建了与故障检测和分类参数对应的晶圆验收测试参数的应变表。构建应急表的概率模型。最后，确定概率模型的安全范围。

6. 发明申请

US20100049355A1 METHOD FOR DETERMINING TOOL'S PRODUCTION QUALITY 审中-公开
标题翻译：确定工具生产质量的方法
公开(公告)号：US20100049355A1
公开(公告)日：2010-02-25
申请号：US12276805
申请日：2008-11-24
申请人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
发明人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , CHENG-HAO CHEN
IPC分类号： G06F19/00
CPC分类号： G05B23/0281 , G05B19/41875 , G05B2219/1112 , G05B2219/32179 , G05B2223/02 , Y02P90/22
摘要： A method for determining manufacturing tool production quality includes providing a table with manufacturing process data. The table is analyzed and a contingency table is established. The contingency table comprises several manufacturing tools, manufacturing processes, and the number of occurrences of bad lots. Split the contingency table up into a plurality of sub-tables. Use Cochran-Mantel-Haenszel test for determining the number of bad lots produced by the manufacturing tools and getting a plurality of statistics. Translate the statistics into a plurality of P-values. Sort the P-values for examining data automatically. Draw a line chart for detecting substandard manufacturing tools. As a result, users can diagnose the quality of the manufacturing tools.
摘要翻译：用于确定制造工具生产质量的方法包括提供具有制造过程数据的工作台。分析表格并建立应变表。应变表包括几个制造工具，制造过程和不良批次的发生次数。将应急表分解成多个子表。使用Cochran-Mantel-Haenszel测试来确定制造工具生产的不良批次数量并获得多个统计数据。将统计数据翻译成多个P值。对P值进行排序以自动检查数据。绘制一条用于检测不合标准制造工具的折线图。因此，用户可以诊断制造工具的质量。

7. 发明申请

US20100256792A1 METHOD OF ADJUSTING WAFER PROCESSING SEQUENCE 有权
标题翻译：调整加工顺序的方法
公开(公告)号：US20100256792A1
公开(公告)日：2010-10-07
申请号：US12476559
申请日：2009-06-02
申请人： YUN-ZONG TIAN , CHUN CHI CHEN , YI FENG LEE , WEI JUN CHEN , SHIH CHANG KAO , YIJ CHIEH CHU , CHENG-HAO CHEN
发明人： YUN-ZONG TIAN , CHUN CHI CHEN , YI FENG LEE , WEI JUN CHEN , SHIH CHANG KAO , YIJ CHIEH CHU , CHENG-HAO CHEN
IPC分类号： G06F17/00
CPC分类号： G05B19/41865 , G05B2219/32015 , G05B2219/32016 , G05B2219/32019 , G05B2219/45031 , Y02P90/20
摘要： A method of adjusting wafer process sequence includes steps of collecting production parameters for a plurality of lots; selecting a plurality of key parameters from the production parameters, wherein the key parameters at least includes a processing sequence; defining a formula to obtain an epsilon value; categorizing the lots into groups according to the epsilon value and the minimum point number by using density-based spatial clustering of application with noise (DBSCAN); and adjusting the processing sequences of the lots in the groups. Thereby, the lots with the same process recipe can be continuously or simultaneously sent into a machine, thereby reducing replacement of process recipes or shortening machine idle time.
摘要翻译：调整晶片工艺顺序的方法包括收集多个批次的生产参数的步骤; 从所述生产参数中选择多个关键参数，其中所述关键参数至少包括处理序列; 定义公式以获得ε值; 通过使用基于密度的噪声空间聚类（DBSCAN），根据ε值和最小点数将批次分组成组。并调整组中批次的处理顺序。因此，具有相同处理配方的批次可以连续或同时发送到机器中，从而减少过程配方的更换或缩短机器空闲时间。

8. 发明申请

US20120102052A1 SPECIFICATION ESTABLISHING METHOD FOR CONTROLLING SEMICONDUCTOR PROCESS 有权
标题翻译：用于控制半导体工艺的规范建立方法
公开(公告)号：US20120102052A1
公开(公告)日：2012-04-26
申请号：US13004236
申请日：2011-01-11
申请人： CHENG-HAO CHEN , YUN-ZONG TIAN , SHIH-CHANG KAO , YIJ CHIEH CHU , WEI JUN CHEN
发明人： CHENG-HAO CHEN , YUN-ZONG TIAN , SHIH-CHANG KAO , YIJ CHIEH CHU , WEI JUN CHEN
IPC分类号： G06F17/30
CPC分类号： G05B19/41865 , G05B2219/32201 , G05B2219/45031 , H01L22/20 , Y02P90/20 , Y02P90/22
摘要： A specification establishing method for controlling semiconductor process, the steps includes: providing a database and choosing a population from the database; sampling a plurality of sample groups from the population, each sample group being a non-normal distribution and having a plurality of samples; filtering the sample groups; summarizing the filtered sample groups to form a non-normal distribution diagram; getting a value-at-risk and a median by calculating from the non-normal distribution diagram; getting a critical value by calculating the value-at-risk and the median with a critical formula; getting a plurality of state values by calculating the filtered sample groups with a proportion formula; and getting an index value by calculating the non-normal distribution diagram with the proportion formula. Thus, the state values indicate the states of the sample groups are abnormal or not by comparing the state values to the index value.
摘要翻译：一种用于控制半导体处理的规范建立方法，所述步骤包括：提供数据库并从数据库中选择人口; 从群体中抽取多个样本组，每个样本组是非正态分布并具有多个样本; 过滤样品组; 总结过滤样品组以形成非正态分布图; 通过从非正态分布图计算得到风险价值和中位数; 通过使用关键公式计算风险值和中位数来获得临界值; 通过以比例公式计算过滤的样本组来获得多个状态值; 并用比例公式计算非正态分布图，得到指标值。因此，通过将状态值与指标值进行比较，状态值表示样本组的状态异常。

9. 发明申请

US20110257932A1 METHOD FOR DETECTING VARIANCE IN SEMICONDUCTOR PROCESSES 有权
标题翻译：用于检测半导体工艺中的变化的方法
公开(公告)号：US20110257932A1
公开(公告)日：2011-10-20
申请号：US13170229
申请日：2011-06-28
申请人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN
发明人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN
IPC分类号： G06F19/00
CPC分类号： G05B23/0221 , G05B2219/37224
摘要： A method of detecting variance by regression model has the following steps. Step 1 is preparing the FDC data and WAT data for analysis. Step 2 is figuring out what latent variable effect of WAT data by Factor Analysis Step 3 is utilizing Principal Component Analysis to reduce the number of FDC variables to a few independent principal components. Step 4 is demonstrating how the tools and FDC data affect WAT data by Analysis of covariance model, and constructing interrelationship among FDC, WAT and tools. The interrelationship can point out which parameter effect WAT significantly. By the method, when WAT abnormal situation happened, it is easier for engineers to trace where the problem is.
摘要翻译：通过回归模型检测方差的方法具有以下步骤。步骤1正在准备FDC数据和WAT数据进行分析。第2步是通过因子分析步骤3来确定WAT数据的潜在变量效应是否利用主成分分析将FDC变量的数量减少到少数独立的主成分。第4步演示了工具和FDC数据如何通过分析协方差模型影响WAT数据，并构建FDC，WAT和工具之间的相互关系。相互关系可以显着地指出哪个参数效应WAT。通过这种方法，当WAT异常情况发生时，工程师更容易追踪问题的位置。

10. 发明申请

US20100010763A1 METHOD FOR DETECTING VARIANCE IN SEMICONDUCTOR PROCESSES 审中-公开
标题翻译：用于检测半导体工艺中的变化的方法
公开(公告)号：US20100010763A1
公开(公告)日：2010-01-14
申请号：US12202631
申请日：2008-09-02
申请人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , YI FENG LEE
发明人： YIJ CHIEH CHU , CHUN CHI CHEN , YUN-ZONG TIAN , YI FENG LEE
IPC分类号： G06F19/00
CPC分类号： G05B23/024 , G05B23/0294 , G05B2219/37224
摘要： A method of detecting variance by regression model is disclosed. Said method comprising: preparing the FDC and WAT data for analysis, figuring out what latent variable effect WAT by Factor Analysis, utilizing Principal Component Analysis to reduce the number of FDC variables to a few independent principal components, demonstrating how the tool and FDC affect WAT by Analysis of covariance model, and constructing interrelationship among FDC, WAT and tools. The interrelationship can point out which parameter effect WAT significantly. By the method, when WAT abnormal situation happened, it is easier for engineers to trace where the problem is.
摘要翻译：公开了一种通过回归模型检测方差的方法。所述方法包括：准备用于分析的FDC和WAT数据，通过因子分析确定潜在变量效应WAT，利用主成分分析将FDC变量数量减少到少数独立主成分，证明工具和FDC如何影响WAT 通过协方差模型分析，构建FDC，WAT和工具之间的相互关系。相互关系可以显着地指出哪个参数效应WAT。通过这种方法，当WAT异常情况发生时，工程师更容易追踪问题的位置。

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