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1. 发明申请

US20110096842A1 VIDEO DECODING DEVICE AND METHOD 失效
标题翻译：视频解码设备和方法
公开(公告)号：US20110096842A1
公开(公告)日：2011-04-28
申请号：US12641501
申请日：2009-12-18
申请人： HSIEH-FU TSAI , YI-SHIN LI , YI-SHIN TUNG , SHENG-CHE HUANG , CHUN HSU
发明人： HSIEH-FU TSAI , YI-SHIN LI , YI-SHIN TUNG , SHENG-CHE HUANG , CHUN HSU
IPC分类号： H04N7/26
CPC分类号： H04N19/91 , H04N19/12 , H04N19/61
摘要： A video decoding method includes receiving video data and transforming the video data from a Huffman tree to at least one full tree and at least one one-side tree. One microcode corresponding to the video coding standard that has encoded the received video data is read where a format of the read microcode is determined. The method further includes reading video data from the transformed video data according to the consuming length of the read microcode if the format of the read microcode is a leaf, and decoding the read video data according to the decoding field of the read microcode to output a decoding result.
摘要翻译：视频解码方法包括接收视频数据并将视频数据从霍夫曼（Huffman）树转换成至少一个完整树和至少一个单面树。读取对应于已经编码所接收的视频数据的视频编码标准的一个微代码，其中确定读取的微代码的格式。该方法还包括：如果读取的微代码的格式是叶片，则根据所读取的微代码的消耗长度从转换后的视频数据中读取视频数据，并根据读出的微代码的解码字段解码读取的视频数据，以输出解码结果。

2. 发明申请

US20110099208A1 ENTROPY DECODING METHOD 有权
标题翻译：熵解码方法
公开(公告)号：US20110099208A1
公开(公告)日：2011-04-28
申请号：US12639136
申请日：2009-12-16
申请人： YI-SHIN TUNG , HSIEH-FU TSAI , YI-SHIN LI , SHENG-CHE HUANG
发明人： YI-SHIN TUNG , HSIEH-FU TSAI , YI-SHIN LI , SHENG-CHE HUANG
IPC分类号： G06F17/30
CPC分类号： H04N19/44 , H04N19/61 , H04N19/91
摘要： An entropy decoding method includes retrieving video data corresponding to an microcode, operating an entropy decoding operation on the video data to acquire a result, and retrieving video data corresponding to a subsequent microcode according to a MPS synchronously. The method further includes determining if the MPS matches the result, and operating an entropy decoding operation according to the subsequent microcode on the video data corresponding to the subsequent microcode if the MPS matches the result.
摘要翻译：熵解码方法包括检索对应于微码的视频数据，对视频数据进行熵解码操作以获取结果，并且同步地根据MPS检索对应于后续微码的视频数据。该方法还包括确定MPS是否匹配结果，并且如果MPS与结果匹配，则根据随后的微代码对与后续微代码相对应的视频数据进行熵解码操作。

3. 发明申请

US20110035425A1 DISCRETE COSINE AND INVERSE DISCRETE COSINE TRANSFORM CIRCUIT 失效
标题翻译：分离COSINE和反向离散COSO变换电路
公开(公告)号：US20110035425A1
公开(公告)日：2011-02-10
申请号：US12613658
申请日：2009-11-06
申请人： MING-CHUNG HSU , YI-SHIN TUNG , YI-SHIN LI , CHIA-YING LI
发明人： MING-CHUNG HSU , YI-SHIN TUNG , YI-SHIN LI , CHIA-YING LI
IPC分类号： G06F17/14 , G06F5/01
CPC分类号： G06F17/147 , G06F9/30032
摘要： A discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) circuit includes a microcode memory, a processor, and a butterfly operation circuit. The microcode memory stores multiple microcode groups corresponding to DCT/IDCT operations and each of the microcode groups includes a series of microcodes. The processor obtains one of the microcode groups corresponding to one of the DCT/IDCT operations to be performed and retrieves microcodes in the obtained microcode group in sequence. The butterfly operation circuit performs butterfly operations according to the retrieved microcodes to execute one of the DCT/IDCT operations.
摘要翻译：离散余弦变换（DCT）和逆离散余弦变换（IDCT）电路包括微代码存储器，处理器和蝶形运算电路。微代码存储器存储对应于DCT / IDCT操作的多个微代码组，并且每个微代码组都包括一系列微代码。处理器获得与要执行的DCT / IDCT操作之一相对应的微代码组之一，并且在获取的微代码组中依次检索微代码。蝶形运算电路根据检索的微码执行蝶形运算，以执行DCT / IDCT运算之一。

4. 发明申请

US20110110435A1 MULTI-STANDARD VIDEO DECODING SYSTEM 审中-公开
标题翻译：多标准视频解码系统
公开(公告)号：US20110110435A1
公开(公告)日：2011-05-12
申请号：US12625765
申请日：2009-11-25
申请人： YI-SHIN LI , YI-SHIN TUNG , TSE-TSUNG SHIH , SHENG-WEI LIN
发明人： YI-SHIN LI , YI-SHIN TUNG , TSE-TSUNG SHIH , SHENG-WEI LIN
IPC分类号： H04N7/26
CPC分类号： H04N19/42 , H04N19/44
摘要： A multi-standard video decoding system comprises a memory, a multi-master bridge interface, a peer-to-peer bus, a plurality of processors and a plurality of hardware accelerators. The memory stores bit stream and temporal data produced during decoding flow. The multi-master bridge interface is connected to the memory. At least one of the plurality of processors receives bit streams from the memory via the multi-master bridge interface. Each of the plurality of hardware accelerators receives instructions from one of the plurality of the processors and operates related video decoding flow, and accesses the memory via the multi-master bridge interface. The peer-to-peer bus connects the plurality of processors and the plurality of hardware accelerators.
摘要翻译：多标准视频解码系统包括存储器，多主机桥接口，对等总线，多个处理器和多个硬件加速器。存储器存储解码流期间产生的比特流和时间数据。多主桥接口连接到存储器。多个处理器中的至少一个经由多主桥接口从存储器接收位流。多个硬件加速器中的每一个从多个处理器之一接收指令，并操作相关的视频解码流，并通过多主桥接口访问存储器。对等总线连接多个处理器和多个硬件加速器。

5. 发明申请

US20110026846A1 DISCRETE COSINE PROCESSING CIRCUIT AND IMAGE PROCESSING DEVICE UTILIZING THE SAME 有权
标题翻译：使用它的分散卫星处理电路和图像处理装置
公开(公告)号：US20110026846A1
公开(公告)日：2011-02-03
申请号：US12551668
申请日：2009-09-01
申请人： MING-CHUNG HSU , YI-SHIN LI , YI-SHIN TUNG , CHIA-YING LI
发明人： MING-CHUNG HSU , YI-SHIN LI , YI-SHIN TUNG , CHIA-YING LI
IPC分类号： G06K9/36 , G06F17/14 , G06F5/01
CPC分类号： G06F17/147 , H04N19/42 , H04N19/60
摘要： A discrete cosine transformation circuit comprising a pipeline with a memory stage and an arithmetic stage. The arithmetic stage comprises first and second arithmetic logic units (ALU). Each of the ALUs receives from the memory a set of image data, performs a first calculation on the set of image data and outputs calculation result thereof in a first clock cycle. A path in the circuit directs the result to the memory stage, such that at least one ALU can selectively receive the result from the path in a clock cycle subsequent to the first clock cycle.
摘要翻译：一种离散余弦变换电路，包括具有存储器级和运算级的管线。算术级包括第一和第二算术逻辑单元（ALU）。每个ALU从存储器接收一组图像数据，对该组图像数据执行第一次计算，并在第一个时钟周期中输出其计算结果。电路中的路径将结果引导到存储器级，使得至少一个ALU可以在第一时钟周期之后的时钟周期中选择性地从路径接收结果。

6. 发明申请

US20110090957A1 VIDEO CODEC METHOD, VIDEO ENCODING DEVICE AND VIDEO DECODING DEVICE USING THE SAME 审中-公开
标题翻译：视频编解码方法，视频编码装置和使用其的视频解码装置
公开(公告)号：US20110090957A1
公开(公告)日：2011-04-21
申请号：US12650760
申请日：2009-12-31
申请人： CHIA-WEI LIAO , YA-TING YANG , YI-SHIN TUNG
发明人： CHIA-WEI LIAO , YA-TING YANG , YI-SHIN TUNG
IPC分类号： H04N7/26
CPC分类号： H04N19/58 , H04N19/105 , H04N19/166 , H04N19/176 , H04N19/573 , H04N19/61 , H04N19/89
摘要： A video codec method synchronizes long term reference frames in a video encoding device and a video decoding device of a video communication system. The video encoding device encodes video frames to code streams in an inter-prediction mode and set the corresponding reference frames to non-committed long term reference frames. The video decoding device decodes the code streams using the corresponding reference frames, then transmits an acknowledgement of the non-committed long term reference frames to the video encoding device. The video encoding device sets the non-committed long term reference frames to committed long term reference frames, and encodes succeeding video frames in the inter-prediction mode using the committed long term reference frames.
摘要翻译：视频编解码方法同步视频编码装置中的长期参考帧和视频通信系统的视频解码装置。视频编码装置以帧间预测模式对视频帧进行编码，并将相应的参考帧设置为未提交的长期参考帧。视频解码装置使用相应的参考帧解码码流，然后将未提交的长期参考帧的确认发送到视频编码装置。视频编码装置将未承诺的长期参考帧设置为承诺的长期参考帧，并且使用承诺的长期参考帧在帧间预测模式中对后续的视频帧进行编码。

7. 发明申请

US20100013679A1 DECODER AND METHOD FOR DECODING A MESSAGE USING AN ARBITRARY-SIDE GROWING HUFFMAN TREE 有权
标题翻译：解码器和方法，用于解码使用边缘增长HUFFMAN树的信息
公开(公告)号：US20100013679A1
公开(公告)日：2010-01-21
申请号：US12177096
申请日：2008-07-21
申请人： YI-SHIN TUNG , SUNG-WEN WANG , YI-CHIN HUANG , JA-LING WU
发明人： YI-SHIN TUNG , SUNG-WEN WANG , YI-CHIN HUANG , JA-LING WU
IPC分类号： H03M7/40
CPC分类号： H03M7/425
摘要： A decoder for decoding a message using an arbitrary-side growing (ASG) Huffman tree including a plurality of codewords and symbols includes a database, a processing module, and a bit pattern matching module. The database stores a plurality of parameters corresponding to the ASG Huffman tree divided into several sub-trees according to a Hashemian cut operation and a bits-pattern-Xor (BPX) operation. The plurality of parameters include a bit pattern of a sub-tree of the ASG Huffman tree divided according to the BPX operation and a code length of the bit pattern. The processing module receives a bit stream corresponding to the ASG Huffman tree from an encoder. The bit pattern matching module selects bits from the bit stream according to the code length of the bit pattern and decodes the selected bits into a symbol in the ASG Huffman tree by comparing the selected bits with the bit pattern.
摘要翻译：使用包括多个码字和符号的任意侧增长（ASG）霍夫曼树来解码消息的解码器包括数据库，处理模块和位模式匹配模块。数据库根据哈希姆切割操作和比特模式Xor（BPX）操作，将与ASG霍夫曼树相对应的多个参数存储为几个子树。多个参数包括根据BPX操作划分的ASG霍夫曼树的子树的位模式和位模式的代码长度。处理模块从编码器接收对应于ASG霍夫曼树的比特流。比特模式匹配模块根据比特模式的码长选择比特流中的比特，并通过将所选择的比特与比特模式进行比较，将所选择的比特解码成ASG霍夫曼树中的符号。

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