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    • 1. 发明申请
    • MULTI-STANDARD VIDEO DECODING SYSTEM
    • 多标准视频解码系统
    • US20110110435A1
    • 2011-05-12
    • US12625765
    • 2009-11-25
    • YI-SHIN LIYI-SHIN TUNGTSE-TSUNG SHIHSHENG-WEI LIN
    • YI-SHIN LIYI-SHIN TUNGTSE-TSUNG SHIHSHENG-WEI LIN
    • H04N7/26
    • H04N19/42H04N19/44
    • A multi-standard video decoding system comprises a memory, a multi-master bridge interface, a peer-to-peer bus, a plurality of processors and a plurality of hardware accelerators. The memory stores bit stream and temporal data produced during decoding flow. The multi-master bridge interface is connected to the memory. At least one of the plurality of processors receives bit streams from the memory via the multi-master bridge interface. Each of the plurality of hardware accelerators receives instructions from one of the plurality of the processors and operates related video decoding flow, and accesses the memory via the multi-master bridge interface. The peer-to-peer bus connects the plurality of processors and the plurality of hardware accelerators.
    • 多标准视频解码系统包括存储器,多主机桥接口,对等总线,多个处理器和多个硬件加速器。 存储器存储解码流期间产生的比特流和时间数据。 多主桥接口连接到存储器。 多个处理器中的至少一个经由多主桥接口从存储器接收位流。 多个硬件加速器中的每一个从多个处理器之一接收指令,并操作相关的视频解码流,并通过多主桥接口访问存储器。 对等总线连接多个处理器和多个硬件加速器。