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1. 发明授权

US08450181B2 In-situ passivation methods to improve performance of polysilicon diode 有权
标题翻译：原位钝化方法提高多晶硅二极管的性能
公开(公告)号：US08450181B2
公开(公告)日：2013-05-28
申请号：US12654927
申请日：2010-01-08
申请人： Xiying Chen , Kun Hou , Chuanbin Pan , Abhijit Bandyopadhyay , Yung-Tin Chen
发明人： Xiying Chen , Kun Hou , Chuanbin Pan , Abhijit Bandyopadhyay , Yung-Tin Chen
IPC分类号： H01L29/68 , H01L21/02 , H01L21/329
CPC分类号： H01L29/8615 , G11C13/003 , G11C2213/72 , H01L27/1021 , H01L27/2409 , H01L29/6609 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/149 , H01L45/16
摘要： A nonvolatile memory cell including a storage element in series with a diode steering element. At least one interface of the diode steering element is passivated.
摘要翻译：一种非易失性存储单元，包括与二极管转向元件串联的存储元件。二极管控制元件的至少一个界面被钝化。

2. 发明申请

US20110169126A1 In-situ passivation methods to improve performance of polysilicon diode 有权
标题翻译：原位钝化方法提高多晶硅二极管的性能
公开(公告)号：US20110169126A1
公开(公告)日：2011-07-14
申请号：US12654927
申请日：2010-01-08
申请人： Xiying Chen , Kun Hou , Chuanbin Pan , Abhijit Bandyopadhyay , Yung-Tin Chen
发明人： Xiying Chen , Kun Hou , Chuanbin Pan , Abhijit Bandyopadhyay , Yung-Tin Chen
IPC分类号： H01L29/68 , H01L21/02 , H01L21/329
CPC分类号： H01L29/8615 , G11C13/003 , G11C2213/72 , H01L27/1021 , H01L27/2409 , H01L29/6609 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/149 , H01L45/16
摘要： A nonvolatile memory cell including a storage element in series with a diode steering element. At least one interface of the diode steering element is passivated.
摘要翻译：一种非易失性存储单元，包括与二极管转向元件串联的存储元件。二极管控制元件的至少一个界面被钝化。

3. 发明授权

US07955981B2 Method of making a two-terminal non-volatile memory pillar device with rounded corner 有权
标题翻译：制造具有圆角的双端非易失性存储柱装置的方法
公开(公告)号：US07955981B2
公开(公告)日：2011-06-07
申请号：US12458091
申请日：2009-06-30
申请人： Xiying Chen , Huiwen Xu , Chuanbin Pan
发明人： Xiying Chen , Huiwen Xu , Chuanbin Pan
IPC分类号： H01L21/302
CPC分类号： H01L27/101 , H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/149 , H01L45/1675
摘要： A non-volatile memory device includes a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell containing a steering element and a storage element and at least one of a top corner or a bottom corner of each of the plurality of pillars is rounded. A method of making non-volatile memory device includes forming a stack of device layers, and patterning the stack to form a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell that contains a steering element and a storage element, and where at least one of top corner or bottom corner of each of the plurality of pillars is rounded.
摘要翻译：非易失性存储器件包括多个支柱，其中多个支柱中的每个支柱包含含有转向元件和存储元件的非易失性存储单元，并且每个的顶角或底角中的至少一个多个柱子是圆形的。制造非易失性存储器件的方法包括形成器件层堆叠，以及图案化堆叠以形成多个柱，其中多个柱中的每个柱包含含有转向元件和存储器的非易失性存储单元并且其中所述多个柱中的每一个的顶角或底角中的至少一个是圆形的。

4. 发明申请

US20100327254A1 Methods to improve electrode diffusions in two-terminal non-volatile memory devices 有权
标题翻译：改善双端非易失性存储器件中电极扩散的方法
公开(公告)号：US20100327254A1
公开(公告)日：2010-12-30
申请号：US12458091
申请日：2009-06-30
申请人： Xiying Chen , Huiwen XU , Chuanbin PAN
发明人： Xiying Chen , Huiwen XU , Chuanbin PAN
IPC分类号： H01L45/00 , H01L21/20
CPC分类号： H01L27/101 , H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/149 , H01L45/1675
摘要： A non-volatile memory device includes a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell containing a steering element and a storage element and at least one of a top corner or a bottom corner of each of the plurality of pillars is rounded. A method of making non-volatile memory device includes forming a stack of device layers, and patterning the stack to form a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell that contains a steering element and a storage element, and where at least one of top corner or bottom corner of each of the plurality of pillars is rounded.
摘要翻译：非易失性存储器件包括多个支柱，其中多个支柱中的每个支柱包含含有转向元件和存储元件的非易失性存储单元，并且每个的顶角或底角中的至少一个多个柱子是圆形的。制造非易失性存储器件的方法包括形成器件层堆叠，以及图案化堆叠以形成多个柱，其中多个柱中的每个柱包含含有转向元件和存储器的非易失性存储单元并且其中所述多个柱中的每一个的顶角或底角中的至少一个是圆形的。

5. 发明申请

US20110085370A1 SOFT FORMING REVERSIBLE RESISTIVITY-SWITCHING ELEMENT FOR BIPOLAR SWITCHING 有权
标题翻译：用于双极开关的软性可逆电阻开关元件
公开(公告)号：US20110085370A1
公开(公告)日：2011-04-14
申请号：US12642191
申请日：2009-12-18
申请人： Xiying Chen , Abhijit Bandyopadhyay , Brian Le , Roy Scheuerlein , Li Xiao
发明人： Xiying Chen , Abhijit Bandyopadhyay , Brian Le , Roy Scheuerlein , Li Xiao
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C13/0007 , G11C13/0064 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2013/0092 , G11C2213/32 , G11C2213/34
摘要： A method and system for forming reversible resistivity-switching elements is described herein. Forming refers to reducing the resistance of the reversible resistivity-switching element, and is generally understood to refer to reducing the resistance for the first time. Prior to forming the reversible resistivity-switching element it may be in a high-resistance state. A first voltage is applied to “partially form” the reversible resistivity-switching element. The first voltage has a first polarity. Partially forming the reversible resistivity-switching element lowers the resistance of the reversible resistivity-switching element. A second voltage that has the opposite polarity as the first is then applied to the reversible resistivity-switching element. Application of the second voltage may further lower the resistance of the reversible resistivity-switching element. Therefore, the second voltage could be considered as completing the forming of the reversible resistivity-switching element.
摘要翻译：本文描述了用于形成可逆电阻率开关元件的方法和系统。形成是指降低可逆电阻率开关元件的电阻，并且通常被理解为指第一次降低电阻。在形成可逆电阻率开关元件之前，它可能处于高电阻状态。施加第一电压以“部分地形成”可逆电阻率开关元件。第一电压具有第一极性。部分形成可逆电阻率开关元件降低可逆电阻率开关元件的电阻。然后将具有与第一相反极性的第二电压施加到可逆电阻率开关元件。第二电压的施加可以进一步降低可逆电阻率开关元件的电阻。因此，可以将第二电压视为完成可逆电阻率开关元件的形成。

6. 发明授权

US08592793B2 Electrode diffusions in two-terminal non-volatile memory devices 有权
标题翻译：双端非易失性存储器件中的电极扩散
公开(公告)号：US08592793B2
公开(公告)日：2013-11-26
申请号：US13100657
申请日：2011-05-04
申请人： Xiying Chen , Huiwen Xu , Chuanbin Pan
发明人： Xiying Chen , Huiwen Xu , Chuanbin Pan
IPC分类号： H01L47/00
CPC分类号： H01L27/101 , H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/149 , H01L45/1675
摘要： A non-volatile memory device includes a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell containing a steering element and a storage element and at least one of a top corner or a bottom corner of each of the plurality of pillars is rounded. A method of making non-volatile memory device includes forming a stack of device layers, and patterning the stack to form a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell that contains a steering element and a storage element, and where at least one of top corner or bottom corner of each of the plurality of pillars is rounded.
摘要翻译：非易失性存储器件包括多个支柱，其中多个支柱中的每个支柱包含含有转向元件和存储元件的非易失性存储单元，并且每个的顶角或底角中的至少一个多个柱子是圆形的。制造非易失性存储器件的方法包括形成器件层堆叠，以及图案化堆叠以形成多个柱，其中多个柱中的每个柱包含含有转向元件和存储器的非易失性存储单元并且其中所述多个柱中的每一个的顶角或底角中的至少一个是圆形的。

7. 发明授权

US07723180B2 Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same 有权
标题翻译：含有碳储存材料的多层非易失性存储器件及其制造和使用方法
公开(公告)号：US07723180B2
公开(公告)日：2010-05-25
申请号：US12153874
申请日：2008-05-27
申请人： Xiying Chen , Chuanbin Pan , Tanmay Kumar , Er-Xuan Ping
发明人： Xiying Chen , Chuanbin Pan , Tanmay Kumar , Er-Xuan Ping
IPC分类号： H01L21/8234
CPC分类号： H01L27/1021 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/124 , H01L45/149 , H01L45/1616 , H01L45/1675
摘要： A method of making a non-volatile memory device includes forming a first electrode, forming a steering element, forming at least one feature, forming a carbon resistivity switching material on at least one sidewall of the at least one feature such that the carbon resistivity switching material electrically contacts the steering element, and forming a second electrode.
摘要翻译：制造非易失性存储器件的方法包括形成第一电极，形成转向元件，形成至少一个特征，在至少一个特征的至少一个侧壁上形成碳电阻率切换材料，使得碳电阻率切换材料电接触转向元件，并形成第二电极。

8. 发明申请

US20090258489A1 Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same 有权
标题翻译：含有碳储存材料的多层非易失性存储器件及其制造和使用方法
公开(公告)号：US20090258489A1
公开(公告)日：2009-10-15
申请号：US12153874
申请日：2008-05-27
申请人： Xiying Chen , Chuanbin Pan , Tanmay Kumar , Er-Xuan Ping
发明人： Xiying Chen , Chuanbin Pan , Tanmay Kumar , Er-Xuan Ping
IPC分类号： H01L21/44
CPC分类号： H01L27/1021 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/124 , H01L45/149 , H01L45/1616 , H01L45/1675
摘要： A method of making a non-volatile memory device includes forming a first electrode, forming a steering element, forming at least one feature, forming a carbon resistivity switching material on at least one sidewall of the at least one feature such that the carbon resistivity switching material electrically contacts the steering element, and forming a second electrode.
摘要翻译：制造非易失性存储器件的方法包括形成第一电极，形成转向元件，形成至少一个特征，在至少一个特征的至少一个侧壁上形成碳电阻率切换材料，使得碳电阻率切换材料电接触转向元件，并形成第二电极。

9. 发明授权

US08289749B2 Soft forming reversible resistivity-switching element for bipolar switching 有权
标题翻译：用于双极开关的软成型可逆电阻率开关元件
公开(公告)号：US08289749B2
公开(公告)日：2012-10-16
申请号：US12642191
申请日：2009-12-18
申请人： Xiying Chen , Abhijit Bandyopadhyay , Brian Le , Roy Scheuerlein , Li Xiao
发明人： Xiying Chen , Abhijit Bandyopadhyay , Brian Le , Roy Scheuerlein , Li Xiao
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C13/0064 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2013/0092 , G11C2213/32 , G11C2213/34
摘要： A method and system for forming reversible resistivity-switching elements is described herein. Forming refers to reducing the resistance of the reversible resistivity-switching element, and is generally understood to refer to reducing the resistance for the first time. Prior to forming the reversible resistivity-switching element it may be in a high-resistance state. A first voltage is applied to “partially form” the reversible resistivity-switching element. The first voltage has a first polarity. Partially forming the reversible resistivity-switching element lowers the resistance of the reversible resistivity-switching element. A second voltage that has the opposite polarity as the first is then applied to the reversible resistivity-switching element. Application of the second voltage may further lower the resistance of the reversible resistivity-switching element. Therefore, the second voltage could be considered as completing the forming of the reversible resistivity-switching element.
摘要翻译：本文描述了用于形成可逆电阻率开关元件的方法和系统。形成是指降低可逆电阻率开关元件的电阻，并且通常被理解为指第一次降低电阻。在形成可逆电阻率开关元件之前，它可能处于高电阻状态。施加第一电压以部分地形成可逆电阻率开关元件。第一电压具有第一极性。部分形成可逆电阻率开关元件降低可逆电阻率开关元件的电阻。然后将具有与第一相反极性的第二电压施加到可逆电阻率开关元件。第二电压的施加可以进一步降低可逆电阻率开关元件的电阻。因此，可以将第二电压视为完成可逆电阻率开关元件的形成。

10. 发明申请

US20090272961A1 SURFACE TREATMENT TO IMPROVE RESISTIVE-SWITCHING CHARACTERISTICS 有权
标题翻译：表面处理提高电阻开关特性
公开(公告)号：US20090272961A1
公开(公告)日：2009-11-05
申请号：US12345576
申请日：2008-12-29
申请人： Michael Miller , Prashant Phatak , Tony Chiang , Xiying Chen , April Schricker , Tanmay Kumar
发明人： Michael Miller , Prashant Phatak , Tony Chiang , Xiying Chen , April Schricker , Tanmay Kumar
IPC分类号： H01L45/00 , H01L21/283
CPC分类号： H01L45/16 , H01L21/265 , H01L21/31155 , H01L27/2463 , H01L29/8615 , H01L45/08 , H01L45/10 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/1608 , H01L45/1616 , H01L45/1625 , H01L45/1641 , H01L45/165
摘要： This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.
摘要翻译：本公开提供了制造半导体器件层和相关联的存储单元结构的方法。通过进行半导体器件层的表面处理（例如离子轰击）以产生具有有意深度分布的缺陷，可以创建具有更一致的电参数的多层存储单元。例如，在电阻式开关存储单元中，可以获得设定和复位电压的更紧密的分配和较低的成形电压，从而提高器件的产量和可靠性。在至少一个实施例中，选择深度轮廓以调制缺陷的类型及其对被轰击的金属氧化物层的电性能的影响并增强均匀的缺陷分布。

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