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1. 发明授权

US08461656B2 Device structures for in-plane and out-of-plane sensing micro-electro-mechanical systems (MEMS) 有权
标题翻译：用于平面内和平面外感测微机电系统（MEMS）的器件结构
公开(公告)号：US08461656B2
公开(公告)日：2013-06-11
申请号：US12827848
申请日：2010-06-30
申请人： Woo Tae Park , Lisa H. Karlin , Lianjun Liu , Heinz Loreck , Hemant D. Desai
发明人： Woo Tae Park , Lisa H. Karlin , Lianjun Liu , Heinz Loreck , Hemant D. Desai
IPC分类号： H04R23/00
CPC分类号： B81C1/00182 , B81B2201/0235 , B81C2203/0792 , G01P15/0802 , G01P15/125 , H01L29/84
摘要： A device structure is made using a first conductive layer over a first wafer. An isolated conductive region is formed in the first conductive layer surrounded by a first opening in the conductive layer. A second wafer has a first insulating layer and a conductive substrate, wherein the conductive substrate has a first major surface adjacent to the first insulating layer. The insulating layer is attached to the isolated conductive region. The conductive substrate is thinned to form a second conductive layer. A second opening is formed through the second conductive layer and the first insulating layer to the isolated conductive region. The second opening is filled with a conductive plug wherein the conductive plug contacts the isolated conductive region. The second conductive region is etched to form a movable finger over the isolated conductive region. A portion of the insulating layer under the movable finger is removed.
摘要翻译：使用第一晶片上的第一导电层制造器件结构。在由导电层中的第一开口包围的第一导电层中形成隔离的导电区域。第二晶片具有第一绝缘层和导电衬底，其中导电衬底具有与第一绝缘层相邻的第一主表面。绝缘层附接到隔离导电区域。导电基板被薄化以形成第二导电层。通过第二导电层和第一绝缘层形成第二开口到隔离的导电区域。第二开口填充有导电插头，其中导电插头接触隔离的导电区域。蚀刻第二导电区域以在隔离的导电区域上形成可移动的手指。去除可动指状物下面的绝缘层的一部分。

2. 发明授权

US08119431B2 Method of forming a micro-electromechanical system (MEMS) having a gap stop 有权
标题翻译：形成具有间隙停止的微机电系统（MEMS）的方法
公开(公告)号：US08119431B2
公开(公告)日：2012-02-21
申请号：US12632940
申请日：2009-12-08
申请人： Woo Tae Park , Lisa H. Karlin , Lianjun Liu
发明人： Woo Tae Park , Lisa H. Karlin , Lianjun Liu
IPC分类号： H01L21/00
CPC分类号： H01L23/10 , B81B2203/0118 , B81C3/001 , B81C2203/0118 , B81C2203/035 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a micro-electromechanical system (MEMS) includes providing a cap substrate, providing a support substrate, depositing a conductive material over the support substrate, patterning the conductive material to form a gap stop and a contact, wherein the gap stop is separated form the contact by an opening, forming a bonding material over the contact and in the opening, wherein the gap stop and the contact prevent the bonding material from extending outside the opening, and attaching the cap substrate to the support substrate by the step of forming the bonding material. In addition, the structure is described.
摘要翻译：一种形成微机电系统（MEMS）的方法包括提供盖基板，提供支撑基板，在支撑基板上沉积导电材料，图案化导电材料以形成间隙止挡件和接触件，其中间隙止挡件通过开口分离形成接触，在接触和开口中形成接合材料，其中间隙停止和接触防止接合材料延伸到开口外部，并且通过步骤将盖基板附接到支撑基板形成接合材料。另外，对该结构进行说明。

3. 发明申请

US20120001277A1 METHODS FOR MAKING IN-PLANE AND OUT-OF-PLANE SENSING MICRO-ELECTRO-MECHANICAL SYSTEMS (MEMS) 有权
标题翻译：用于制造平面和平面外感测微电子机械系统（MEMS）的方法
公开(公告)号：US20120001277A1
公开(公告)日：2012-01-05
申请号：US12827848
申请日：2010-06-30
申请人： Woo Tae Park , Lisa H. Karlin , Lianjun Liu , Heinz Loreck , Hemant D. Desai
发明人： Woo Tae Park , Lisa H. Karlin , Lianjun Liu , Heinz Loreck , Hemant D. Desai
IPC分类号： H01L29/84 , H01L21/28
CPC分类号： B81C1/00182 , B81B2201/0235 , B81C2203/0792 , G01P15/0802 , G01P15/125 , H01L29/84
摘要： A device structure is made using a first conductive layer over a first wafer. An isolated conductive region is formed in the first conductive layer surrounded by a first opening in the conductive layer. A second wafer has a first insulating layer and a conductive substrate, wherein the conductive substrate has a first major surface adjacent to the first insulating layer. The insulating layer is attached to the isolated conductive region. The conductive substrate is thinned to form a second conductive layer. A second opening is formed through the second conductive layer and the first insulating layer to the isolated conductive region. The second opening is filled with a conductive plug wherein the conductive plug contacts the isolated conductive region. The second conductive region is etched to form a movable finger over the isolated conductive region. A portion of the insulating layer under the movable finger is removed.
摘要翻译：使用第一晶片上的第一导电层制造器件结构。在由导电层中的第一开口包围的第一导电层中形成隔离的导电区域。第二晶片具有第一绝缘层和导电衬底，其中导电衬底具有与第一绝缘层相邻的第一主表面。绝缘层附接到隔离导电区域。导电基板被薄化以形成第二导电层。通过第二导电层和第一绝缘层形成第二开口到隔离的导电区域。第二开口填充有导电插头，其中导电插头接触隔离的导电区域。蚀刻第二导电区域以在隔离的导电区域上形成可移动的手指。去除可动指状物下面的绝缘层的一部分。

4. 发明申请

US20110133294A1 MICRO ELECTROMECHANICAL SYSTEMS (MEMS) HAVING A GAP STOP AND METHOD THEREFOR 有权
标题翻译：微机电系统（MEMS）及其方法
公开(公告)号：US20110133294A1
公开(公告)日：2011-06-09
申请号：US12632940
申请日：2009-12-08
申请人： Woo Tae Park , Lisa H. Karlin , Lianjun Liu
发明人： Woo Tae Park , Lisa H. Karlin , Lianjun Liu
IPC分类号： H01L29/84 , H01L21/50
CPC分类号： H01L23/10 , B81B2203/0118 , B81C3/001 , B81C2203/0118 , B81C2203/035 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a micro-electromechanical system (MEMS) includes providing a cap substrate, providing a support substrate, depositing a conductive material over the support substrate, patterning the conductive material to form a gap stop and a contact, wherein the gap stop is separated form the contact by an opening, forming a bonding material over the contact and in the opening, wherein the gap stop and the contact prevent the bonding material from extending outside the opening, and attaching the cap substrate to the support substrate by the step of forming the bonding material. In addition, the structure is described.
摘要翻译：一种形成微机电系统（MEMS）的方法包括提供盖基板，提供支撑基板，在支撑基板上沉积导电材料，图案化导电材料以形成间隙止挡件和接触件，其中间隙止挡件通过开口分离形成接触，在接触和开口中形成接合材料，其中间隙停止和接触防止接合材料延伸到开口外部，并且通过步骤将盖基板附接到支撑基板形成接合材料。另外，对该结构进行说明。

5. 发明申请

US20100155861A1 MICROELECTROMECHANICAL DEVICE WITH ISOLATED MICROSTRUCTURES AND METHOD OF PRODUCING SAME 有权
标题翻译：具有隔离微结构的微电子器件及其制造方法
公开(公告)号：US20100155861A1
公开(公告)日：2010-06-24
申请号：US12340202
申请日：2008-12-19
申请人： Lisa Z. Zhang , Lisa H. Karlin , Ruben B. Montez , Woo Tae Park
发明人： Lisa Z. Zhang , Lisa H. Karlin , Ruben B. Montez , Woo Tae Park
IPC分类号： H01L29/84 , H01L21/762
CPC分类号： B81C1/00698
摘要： A microelectromechanical systems (MEMS) device (20) includes a polysilicon structural layer (46) having movable microstructures (28) formed therein and suspended above a substrate (22). Isolation trenches (56) extend through the layer (46) such that the microstructures (28) are laterally anchored to the isolation trenches (56). A sacrificial layer (22) is formed overlying the substrate (22), and the structural layer (46) is formed overlying the sacrificial layer (22). The isolation trenches (56) are formed by etching through the polysilicon structural layer (46) and depositing a nitride (72), such as silicon-rich nitride, in the trenches (56). The microstructures (28) are then formed in the structural layer (46), and electrical connections (30) are formed over the isolation trenches (56). The sacrificial layer (22) is subsequently removed to form the MEMS device (20) having the isolated microstructures (28) spaced apart from the substrate (22).
摘要翻译：微机电系统（MEMS）装置（20）包括多晶硅结构层（46），该多晶硅结构层（46）具有形成在其中的悬浮在衬底（22）上方的可移动微结构（28）。绝缘沟槽（56）延伸穿过层（46），使得微结构（28）横向锚定到隔离沟槽（56）。形成覆盖衬底（22）的牺牲层（22），并且覆盖牺牲层（22）上形成结构层（46）。隔离沟槽（56）通过蚀刻穿过多晶硅结构层（46）并在沟槽（56）中沉积诸如富含硅的氮化物的氮化物（72）形成。然后在结构层（46）中形成微结构（28），并且在隔离沟槽（56）上形成电连接（30）。随后去除牺牲层（22）以形成具有与衬底（22）间隔开的隔离微结构（28）的MEMS器件（20）。

6. 发明授权

US07943525B2 Method of producing microelectromechanical device with isolated microstructures 有权
标题翻译：具有隔离微结构的微机电装置的制造方法
公开(公告)号：US07943525B2
公开(公告)日：2011-05-17
申请号：US12340202
申请日：2008-12-19
申请人： Lisa Z. Zhang , Lisa H. Karlin , Ruben B. Montez , Woo Tae Park
发明人： Lisa Z. Zhang , Lisa H. Karlin , Ruben B. Montez , Woo Tae Park
IPC分类号： H01L21/302
CPC分类号： B81C1/00698
摘要： A microelectromechanical systems (MEMS) device (20) includes a polysilicon structural layer (46) having movable microstructures (28) formed therein and suspended above a substrate (22). Isolation trenches (56) extend through the layer (46) such that the microstructures (28) are laterally anchored to the isolation trenches (56). A sacrificial layer (22) is formed overlying the substrate (22), and the structural layer (46) is formed overlying the sacrificial layer (22). The isolation trenches (56) are formed by etching through the polysilicon structural layer (46) and depositing a nitride (72), such as silicon-rich nitride, in the trenches (56). The microstructures (28) are then formed in the structural layer (46), and electrical connections (30) are formed over the isolation trenches (56). The sacrificial layer (22) is subsequently removed to form the MEMS device (20) having the isolated microstructures (28) spaced apart from the substrate (22).
摘要翻译：微机电系统（MEMS）装置（20）包括多晶硅结构层（46），该多晶硅结构层（46）具有形成在其中的悬浮在衬底（22）上方的可移动微结构（28）。绝缘沟槽（56）延伸穿过层（46），使得微结构（28）横向锚定到隔离沟槽（56）。形成覆盖衬底（22）的牺牲层（22），并且覆盖牺牲层（22）上形成结构层（46）。隔离沟槽（56）通过蚀刻穿过多晶硅结构层（46）并在沟槽（56）中沉积诸如富含硅的氮化物的氮化物（72）形成。然后在结构层（46）中形成微结构（28），并且在隔离沟槽（56）上形成电连接（30）。随后去除牺牲层（22）以形成具有与衬底（22）间隔开的隔离微结构（28）的MEMS器件（20）。

7. 发明授权

US08138062B2 Electrical coupling of wafer structures 有权
标题翻译：晶片结构的电耦合
公开(公告)号：US08138062B2
公开(公告)日：2012-03-20
申请号：US12638424
申请日：2009-12-15
申请人： Lianjun Liu , Lisa H. Karlin , Alan J. Magnus
发明人： Lianjun Liu , Lisa H. Karlin , Alan J. Magnus
IPC分类号： H01L21/30
CPC分类号： B81B7/007 , B81B2207/097 , H01L21/50 , H01L23/10 , H01L24/05 , H01L24/06 , H01L24/94 , H01L2224/04042 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/06155 , H01L2224/94 , H01L2924/14 , H01L2924/1461 , H01L2924/157 , H01L2924/16152 , H01L2924/16153 , H01L2924/16235 , H01L2924/16251 , H01L2924/167 , H01L2924/16788 , H01L2224/83
摘要： A method for electrically coupling a first wafer with a second wafer is provided. The method includes bonding the first wafer with the second wafer using a bonding material. The method further includes forming an opening in the first wafer in a scribe area of the second wafer to expose a surface of a conductive structure of the second wafer. The method further includes forming a conductive layer overlying the first wafer and the opening in the first wafer such that the conductive layer forms an electrical contact with the conductive structure of the second wafer thereby electrically coupling the first wafer with the second wafer.
摘要翻译：提供了一种用于将第一晶片与第二晶片电耦合的方法。该方法包括使用接合材料将第一晶片与第二晶片接合。该方法还包括在第二晶片的划线区域中的第一晶片中形成开口以暴露第二晶片的导电结构的表面。该方法还包括形成覆盖第一晶片和第一晶片中的开口的导电层，使得导电层与第二晶片的导电结构形成电接触，从而将第一晶片与第二晶片电耦合。

8. 发明申请

US20110221042A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110221042A1
公开(公告)日：2011-09-15
申请号：US12722225
申请日：2010-03-11
申请人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
发明人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
IPC分类号： H01L23/04 , H01L21/50
CPC分类号： B81B3/0018 , B81B7/007 , H01L21/50 , H01L21/78 , H01L23/04 , H01L24/94 , H01L24/97 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L24/03 , H01L24/26 , H01L24/83 , H01L2224/83 , H01L2224/03 , H01L2224/27
摘要： A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).
摘要翻译：晶片结构（88）包括器件晶片（20）和盖晶片（60）。器件晶片（20）上的半导体管芯（22）各自包括微电子器件（26）和端子元件（28,30）。阻挡层（36,52）位于器件晶片（20）的非活性区域（32,50）中。盖晶片（60）耦合到器件晶片（20）并覆盖半导体管芯（22）。去除盖晶片（60）的部分（72）以露出端子元件（28,30）。障碍物（36,52）可以比元件（28,30）更高，并且用于在部分（72）被移除时防止部分（72）接触端子元件（28,30）。晶片结构（88）被单个化以形成多个半导体器件（89），每个器件（89）包括由盖晶片（60）的一部分覆盖的微电子器件（26）和从其暴露的端子元件（28,30）盖晶片（60）。

9. 发明授权

US09061885B2 Cavity based packaging for MEMS devices 有权
标题翻译： MEMS器件的腔体封装
公开(公告)号：US09061885B2
公开(公告)日：2015-06-23
申请号：US14018091
申请日：2013-09-04
申请人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
发明人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
IPC分类号： H01L33/48 , H01L33/62 , B81B3/00 , B81B7/00 , H01L21/50 , H01L21/78 , H01L23/04 , H01L33/54 , H01L23/00
CPC分类号： B81B3/0018 , B81B7/007 , H01L21/50 , H01L21/78 , H01L23/04 , H01L24/94 , H01L24/97 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L24/03 , H01L24/26 , H01L24/83 , H01L2224/83 , H01L2224/03 , H01L2224/27
摘要： A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).
摘要翻译：晶片结构（88）包括器件晶片（20）和盖晶片（60）。器件晶片（20）上的半导体管芯（22）各自包括微电子器件（26）和端子元件（28,30）。阻挡层（36,52）位于器件晶片（20）的非活性区域（32,50）中。盖晶片（60）耦合到器件晶片（20）并覆盖半导体管芯（22）。去除盖晶片（60）的部分（72）以露出端子元件（28,30）。障碍物（36,52）可以比元件（28,30）更高，并且用于在部分（72）被移除时防止部分（72）接触端子元件（28,30）。晶片结构（88）被单个化以形成多个半导体器件（89），每个器件（89）包括由盖晶片（60）的一部分覆盖的微电子器件（26）和从其暴露的端子元件（28,30）盖晶片（60）。

10. 发明申请

US20140008739A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20140008739A1
公开(公告)日：2014-01-09
申请号：US14018091
申请日：2013-09-04
申请人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
发明人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
IPC分类号： B81B3/00
CPC分类号： B81B3/0018 , B81B7/007 , H01L21/50 , H01L21/78 , H01L23/04 , H01L24/94 , H01L24/97 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L24/03 , H01L24/26 , H01L24/83 , H01L2224/83 , H01L2224/03 , H01L2224/27
摘要： A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).
摘要翻译：晶片结构（88）包括器件晶片（20）和盖晶片（60）。器件晶片（20）上的半导体管芯（22）各自包括微电子器件（26）和端子元件（28,30）。阻挡层（36,52）位于器件晶片（20）的非活性区域（32,50）中。盖晶片（60）耦合到器件晶片（20）并覆盖半导体管芯（22）。去除盖晶片（60）的部分（72）以露出端子元件（28,30）。障碍物（36,52）可以比元件（28,30）更高，并且用于在部分（72）被移除时防止部分（72）接触端子元件（28,30）。晶片结构（88）被单个化以形成多个半导体器件（89），每个器件（89）包括由盖晶片（60）的一部分覆盖的微电子器件（26）和从其暴露的端子元件（28,30）盖晶片（60）。

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