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1. 发明申请

US20050019969A1 Method for manufacturing thin film transistor array panel 有权
标题翻译：制造薄膜晶体管阵列面板的方法
公开(公告)号：US20050019969A1
公开(公告)日：2005-01-27
申请号：US10867811
申请日：2004-06-16
申请人： Won-Kie Chang , Jin-Wook Lee , Won Song , Jeong-Sik Yoo , You-Keun Kim , Dong-Uk Choi
发明人： Won-Kie Chang , Jin-Wook Lee , Won Song , Jeong-Sik Yoo , You-Keun Kim , Dong-Uk Choi
IPC分类号： G02F1/1368 , B08B7/00 , C23C16/44 , G02F1/136 , H01L21/205 , H01L21/3065 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/786
CPC分类号： H01L27/12 , C23C16/4405 , H01L21/84 , H01L27/1214 , H01L27/124 , H01L27/1259
摘要： The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.
摘要翻译：本发明涉及一种制造薄膜晶体管阵列面板及其装置的方法，更具体地涉及一种含有原位氟发生室的装置。

2. 发明申请

US20080057633A1 METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY 审中-公开
标题翻译：制造薄膜晶体管阵列的方法
公开(公告)号：US20080057633A1
公开(公告)日：2008-03-06
申请号：US11854302
申请日：2007-09-12
申请人： Won-Kie Chang , Jin-Wook Lee , Won Song , Jeong-Sik Yoo , You-Keun Kim , Dong-Uk Choi
发明人： Won-Kie Chang , Jin-Wook Lee , Won Song , Jeong-Sik Yoo , You-Keun Kim , Dong-Uk Choi
IPC分类号： H01L21/84
CPC分类号： H01L27/12 , C23C16/4405 , H01L21/84 , H01L27/1214 , H01L27/124 , H01L27/1259
摘要： The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.
摘要翻译：本发明涉及一种制造薄膜晶体管阵列面板及其装置的方法，更具体地涉及一种含有原位氟发生室的装置。

3. 发明授权

US07273772B2 Method for manufacturing thin film transistor array panel 有权
标题翻译：制造薄膜晶体管阵列面板的方法
公开(公告)号：US07273772B2
公开(公告)日：2007-09-25
申请号：US10867811
申请日：2004-06-16
申请人： Won-Kie Chang , Jin-Wook Lee , Won Song , Jeong-Sik Yoo , You-Keun Kim , Dong-Uk Choi
发明人： Won-Kie Chang , Jin-Wook Lee , Won Song , Jeong-Sik Yoo , You-Keun Kim , Dong-Uk Choi
IPC分类号： H01L21/00
CPC分类号： H01L27/12 , C23C16/4405 , H01L21/84 , H01L27/1214 , H01L27/124 , H01L27/1259
摘要： The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.
摘要翻译：本发明涉及一种制造薄膜晶体管阵列面板及其装置的方法，更具体地涉及一种含有原位氟发生室的装置。

4. 发明申请

US20130311054A1 SWING CONTROL SYSTEM FOR HYBRID CONSTRUCTION MACHINE 有权
标题翻译：混合建筑机械摆动控制系统
公开(公告)号：US20130311054A1
公开(公告)日：2013-11-21
申请号：US13993155
申请日：2010-12-15
申请人： Dong-Uk Choi
发明人： Dong-Uk Choi
IPC分类号： E02F9/20
CPC分类号： E02F9/2058 , E02F9/123 , E02F9/2095 , E02F9/265
摘要： A swing control system for a hybrid construction machine has a swing operating lever, an electric swing motor, a speed detection sensor which detects the rotary speed of a swing motor, a controller that calculates the driving speed of the swing motor by a swing operating signal created by the operation of the swing operating lever and by a detecting signal of the rotary speed, an inverter which drives the swing motor by a control signal from the controller, a swing inertia detector that detects the swing inertia of equipment and an inertia torque compensator which compares the torque compensation value in accordance with the equipment inertia, and outputs a calculated torque value for controlling the swing motor to the inverter.
摘要翻译：用于混合动力施工机械的回转控制系统具有回转操作杆，回转马达，检测回转马达的转速的速度检测传感器，通过摆动操作信号计算回转马达的驱动速度的控制器通过旋转操作杆的操作和通过旋转速度的检测信号产生的变频器，通过来自控制器的控制信号驱动回转马达的逆变器，检测设备的摆动惯量的摆动惯量检测器和惯性转矩补偿器其根据设备惯性比较转矩补偿值，并将用于控制回转马达的计算转矩值输出到逆变器。

5. 发明申请

US20130063893A1 ENERGY REPOSITORY DISCHARGE SYSTEM FOR CONSTRUCTION MACHINERY 审中-公开
标题翻译：建筑机械能源储存排放系统
公开(公告)号：US20130063893A1
公开(公告)日：2013-03-14
申请号：US13699460
申请日：2010-09-06
申请人： Chun-Han Lee , Dong-Uk Choi
发明人： Chun-Han Lee , Dong-Uk Choi
IPC分类号： H05K7/20
CPC分类号： H05K7/20 , H01C1/08
摘要： A discharge system of a stored energy for a construction machine is provided, which includes the energy storage, an electric discharge device discharging energy stored in the energy storage, and an energy cooling portion increasing the heat dissipation capacity of the electric discharge device by cooling heat generated in the electric discharge device for a time when the energy stored in the energy storage is discharged to the electric discharge device. Since the heat generated in the electric discharge device is cooled by a cooling device while the energy stored in the energy storage is discharged to the electric discharge device, the heat dissipation capacity of the electric discharge device is increased to shorten the discharge time. Also, the operation period of the cooling device is controlled in proportion to the residual voltage of the energy storage, and thus the cooling efficiency is maximized.
摘要翻译：提供一种用于建筑机械的储能的放电系统，其包括能量存储器，放电储存器中存储的能量的放电装置，以及通过冷却热量增加放电装置的散热能力的能量冷却部在存储在能量存储器中的能量被放电到放电装置的时间内，在放电装置中产生。由于在放电装置中产生的热量通过冷却装置冷却，而储存在能量存储器中的能量被放电到放电装置，所以放电装置的散热能力增加以缩短放电时间。此外，冷却装置的运转期间与能量储存器的剩余电压成比例地控制，从而冷却效率最大化。

6. 发明授权

US08044453B2 Non-volatile memory device with a charge trapping layer 有权
标题翻译：具有电荷捕获层的非易失性存储器件
公开(公告)号：US08044453B2
公开(公告)日：2011-10-25
申请号：US12318451
申请日：2008-12-30
申请人： Suk-Kang Sung , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
发明人： Suk-Kang Sung , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
IPC分类号： H01L29/792
CPC分类号： H01L27/11568
摘要： A non-volatile memory device includes field insulating layer patterns on a substrate to define an active region of the substrate, upper portions of the field insulating layer patterns protruding above an upper surface of the substrate, a tunnel insulating layer on the active region, a charge trapping layer on the tunnel insulating layer, a blocking layer on the charge trapping layer, first insulating layers on upper surfaces of the field insulating layer patterns, and a word line structure on the blocking layer and first insulating layers.
摘要翻译：非易失性存储器件包括在衬底上的场绝缘层图案，以限定衬底的有源区，场绝缘层图案的上部突出在衬底的上表面上，在有源区上的隧道绝缘层，隧道绝缘层上的电荷俘获层，电荷俘获层上的阻挡层，场绝缘层图案的上表面上的第一绝缘层，以及阻挡层和第一绝缘层上的字线结构。

7. 发明申请

US20100035398A1 Field effect transistor and method for manufacturing the same 有权
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20100035398A1
公开(公告)日：2010-02-11
申请号：US12588193
申请日：2009-10-07
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Dong-Uk Choi , Kyoung-Hwan Yeo
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Dong-Uk Choi , Kyoung-Hwan Yeo
IPC分类号： H01L21/336
CPC分类号： H01L29/0847 , H01L29/1054 , H01L29/665 , H01L29/66621 , H01L29/66636 , H01L29/66651 , H01L29/66795 , H01L29/7851 , H01L29/78687 , H01L29/7881
摘要： A field effect transistor (FET) and a method for manufacturing the same, in which the FET may include an isolation film formed on a semiconductor substrate to define an active region, and a gate electrode formed on a given portion of the semiconductor substrate. A channel layer may be formed on a portion of the gate electrode, with source and drain regions formed on either side of the channel layer so that boundaries between the channel layer and the source and drain regions of the FET may be perpendicular to a surface of the semiconductor substrate.
摘要翻译：场效应晶体管（FET）及其制造方法，其中FET可以包括形成在半导体衬底上以形成有源区的隔离膜，以及形成在半导体衬底的给定部分上的栅电极。沟道层可以形成在栅电极的一部分上，源极和漏极区形成在沟道层的任一侧上，使得沟道层与FET的源极和漏极区之间的边界可以垂直于半导体衬底。

8. 发明申请

US20120112542A1 METHOD OF TRIMMING A SOLAR ENERGY ASSEMBLY 审中-公开
标题翻译：调整太阳能组件的方法
公开(公告)号：US20120112542A1
公开(公告)日：2012-05-10
申请号：US13354671
申请日：2012-01-20
申请人： Myung-Hun SHIN , Dong-Uk Choi , Byoung-June Kim , Jin-Seock Kim , Czang-Ho Lee , Seung-Jae Jung , Joon-Young Seo
发明人： Myung-Hun SHIN , Dong-Uk Choi , Byoung-June Kim , Jin-Seock Kim , Czang-Ho Lee , Seung-Jae Jung , Joon-Young Seo
IPC分类号： H02J1/00
CPC分类号： H01L31/042 , H01L31/0201 , H01L31/046 , H01L31/05 , H02S40/36 , H02S50/10 , Y02E10/50 , Y10T307/50
摘要： A method of electrically eliminating defective solar cell units that are disposed within an integrated solar cells module and a method of trimming an output voltage of the integrated solar cells module are provided, where the solar cells module has a large number (e.g., 50 or more) of solar cell units integrally disposed therein and initially connected in series one to the next. The method includes providing a corresponding plurality of repair pads, each integrally extending from a respective electrode layer of the solar cell units, and providing a bypass conductor integrated within the module and extending adjacent to the repair pads. Pad-to-pad spacings and pad-to-bypass spacings are such that pad-to-pad connecting bridges may be selectively created between adjacent ones of the repair pads and such that pad-to-bypass connecting bridges may be selectively created between the repair pads and the adjacently extending bypass conductor.
摘要翻译：提供了一种电除去集成太阳能电池模块内的有缺陷的太阳能电池单元的方法和一种微调集成太阳能电池组件的输出电压的方法，其中太阳能电池模块具有大量（例如，50个或更多个））的太阳能电池单元整体地设置在其中并且最初串联连接到下一个。该方法包括提供相应的多个修复焊盘，每个修补焊盘从太阳能电池单元的相应电极层整体延伸，并且提供集成在模块内并在修补焊盘附近延伸的旁路导体。垫到衬垫间距和衬垫到旁路间隔使得可以在相邻的修补焊盘之间选择性地创建焊盘到焊盘的连接桥，并且可以在焊盘到旁路的连接桥之间选择性地创建焊盘到旁路的连接桥修补垫和相邻延伸的旁路导体。

9. 发明授权

US07936600B2 Methods of programming data in a non-volatile memory device with a fringe voltage applied to conductive layer 有权
标题翻译：在具有施加到导电层的条纹电压的非易失性存储器件中编程数据的方法
公开(公告)号：US07936600B2
公开(公告)日：2011-05-03
申请号：US12141249
申请日：2008-06-18
申请人： Hee-Soo Kang , Choong-Ho Lee , Dong-Uk Choi
发明人： Hee-Soo Kang , Choong-Ho Lee , Dong-Uk Choi
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C16/0483 , H01L27/11524
摘要： Methods of programming data in a non-volatile memory cell are provided. A memory cell according to some embodiments may include a gate structure that includes a tunnel oxide layer pattern, a floating gate, a dielectric layer and a control gate sequentially stacked on a substrate, impurity regions that are formed in the substrate at both sides of the gate structure, and a conductive layer pattern that is arranged spaced apart from and facing the floating gate. Embodiments of such methods may include applying a programming voltage to the control gate, grounding the impurity regions and applying a fringe voltage to the conductive layer pattern to generate a fringe field in the floating gate.
摘要翻译：提供了在非易失性存储单元中编程数据的方法。根据一些实施例的存储器单元可以包括栅极结构，其包括隧道氧化物层图案，浮动栅极，电介质层和顺序堆叠在衬底上的控制栅极，杂质区域形成在衬底的两侧的衬底中栅极结构以及与浮动栅极间隔开并面对浮栅的导电层图案。这种方法的实施例可以包括将编程电压施加到控制栅极，使杂质区域接地并且向导电层图案施加边缘电压以在浮动栅极中产生边缘场。

10. 发明申请

US20090180317A1 FLASH MEMORY DEVICE INCLUDING A DUMMY CELL 有权
标题翻译：包含DUMMY细胞的闪存存储器件
公开(公告)号：US20090180317A1
公开(公告)日：2009-07-16
申请号：US12416477
申请日：2009-04-01
申请人： Hee-Soo Kang , Dong-Uk Choi , Choong-Ho Lee , Sang-Gu Kang
发明人： Hee-Soo Kang , Dong-Uk Choi , Choong-Ho Lee , Sang-Gu Kang
IPC分类号： G11C16/06
CPC分类号： G11C11/5628 , G11C16/0483
摘要： A non-volatile memory device includes a selection transistor coupled to a bit line. The device also includes a plurality of memory cells serially coupled to the selection transistor and at least one dummy cell located between the plurality of memory cells. The dummy cell is turned off during a programming operation of a memory cell located between the dummy cell and the selection transistor.
摘要翻译：非挥发性存储器件包括耦合到位线的选择晶体管。该装置还包括串联耦合到选择晶体管的多个存储单元和位于多个存储单元之间的至少一个虚拟单元。在位于虚设单元和选择晶体管之间的存储单元的编程操作期间，虚设单元关闭。

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