会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明授权
    • Methods of forming magnetic memory cells
    • 形成磁记忆单元的方法
    • US09373775B2
    • 2016-06-21
    • US13614212
    • 2012-09-13
    • Gurtej S. SandhuWitold KulaWayne I. Kinney
    • Gurtej S. SandhuWitold KulaWayne I. Kinney
    • H01L27/20H01L43/08H01L43/12H01L27/22
    • H01L43/02H01L27/222H01L27/224H01L27/226H01L43/08H01L43/10H01L43/12
    • Methods of forming memory cells, magnetic memory cell structures, and arrays of magnetic memory cell structures are disclosed. Embodiments of the methods include patterning a precursor structure to form a stepped structure including at least an upper discrete feature section and a lower feature section with a broader width, length, or both than the upper discrete feature section. The method uses patterning acts directed along a first axis, e.g., an x-axis, and then along a second axis, e.g., a y-axis, that is perpendicular to or about perpendicular to the first axis. The patterning acts may therefore allow for more unifoimity between a plurality of formed, neighboring cell core structures, even at dimensions below about thirty nanometers. Magnetic memory structures and memory cell arrays are also disclosed.
    • 公开了形成存储单元,磁存储单元结构和磁存储单元结构阵列的方法。 方法的实施例包括图案化前体结构以形成包括至少上部离散特征部分和具有更宽的宽度,长度或两者比较高离散特征部分的下部特征部分的阶梯式结构。 该方法使用沿着第一轴线例如x轴,然后沿着垂直于第一轴线或垂直于第一轴线的第二轴线,例如y轴定向的图案化动作。 因此,即使在低于约三十纳米的尺寸下,图案化动作也可允许在多个形成的相邻电池芯结构之间的更大的均匀性。 还公开了磁存储器结构和存储单元阵列。
    • 9. 发明授权
    • High performance MTJ element for conventional MRAM and for STT-RAM and a method for making the same
    • 用于常规MRAM和STT-RAM的高性能MTJ元件及其制造方法
    • US08372661B2
    • 2013-02-12
    • US11981127
    • 2007-10-31
    • Cheng T. HorngRu-Ying TongChyu-Jiuh TorngWitold Kula
    • Cheng T. HorngRu-Ying TongChyu-Jiuh TorngWitold Kula
    • H01L21/00
    • H01L43/10B82Y10/00H01L27/228H01L43/08H01L43/12
    • A STT-RAM MTJ that minimizes spin-transfer magnetization switching current (Jc) is disclosed. The MTJ has a MgO tunnel barrier layer formed with a natural oxidation process to achieve a low RA (10 ohm-um2) and a Fe or Fe/CoFeB/Fe free layer which provides a lower intrinsic damping constant than a CoFeB free layer. A Fe, FeB, or Fe/CoFeB/Fe free layer when formed with a MgO tunnel barrier (radical oxidation process) and a CoFeB AP1 pinned layer in a MRAM MTJ stack annealed at 360° C. provides a high dR/R (TMR)>100% and a substantial improvement in read margin with a TMR/Rp_cov=20. High speed measurement of 100 nm×200 nm oval STT-RAM MTJs has shown a Jc0 for switching a Fe free layer is one half that for switching an amorphous CO40Fe40B20 free layer. A Fe/CoFeB/Fe free layer configuration allows the Hc value to be increased for STT-RAM applications.
    • 公开了使自旋转移磁化开关电流(Jc)最小化的STT-RAM MTJ。 MTJ具有形成有自然氧化工艺的MgO隧道阻挡层,以实现低的RA(10欧姆 - um2)和不含CoFeB自由层的较低的固有阻尼常数的Fe或Fe / CoFeB / Fe自由层。 当在360℃退火的MRAM MTJ堆叠中形成具有MgO隧道势垒(自由基氧化法)和CoFeB AP1钉扎层的Fe,FeB或Fe / CoFeB / Fe自由层时,提供高dR / R(TMR )> 100%,TMR / Rp_cov = 20时读取余量大幅度提高。 100 nm×200 nm椭圆STT-RAM MTJ的高速测量显示,用于切换无Fe层的Jc0是用于切换无定形CO40Fe40B20自由层的一半。 Fe / CoFeB / Fe自由层配置允许为STT-RAM应用增加Hc值。
    • 10. 发明申请
    • Composite free layer within magnetic tunnel junction for MRAM applications
    • 用于MRAM应用的磁性隧道结内的复合自由层
    • US20120280337A1
    • 2012-11-08
    • US13068222
    • 2011-05-05
    • Wei CaoWitold Kula
    • Wei CaoWitold Kula
    • H01L29/82H01L21/8239
    • H01L43/10B82Y40/00G11C11/161H01F10/187H01F10/3254H01F10/3272H01F10/3295H01F41/303H01L43/08H01L43/12
    • A MTJ in an MRAM array is disclosed with a composite free layer having a FL1/FL2/FL3 configuration where FL1 and FL2 are crystalline magnetic layers and FL3 is an amorphous NiFeX layer for improved bit switching performance. FL1 layer is CoFe which affords a high magnetoresistive (MR) ratio when forming an interface with a MgO tunnel barrier. FL2 is Fe to improve switching performance. NiFeX thickness where X is Hf is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. Annealing at 330° C. to 360° C. provides a high MR ratio of 190%. Furthermore, low Hc and Hk are simultaneously achieved with improved bit switching performance and fewer shorts without compromising other MTJ properties such as MR ratio. As a result of high MR ratio and lower bit-to-bit resistance variation, higher reading margin is realized.
    • 公开了一种具有FL1 / FL2 / FL3配置的复合自由层的MRAM阵列,其中FL1和FL2是结晶磁性层,FL3是非晶NiFeX层,用于改善位切换性能。 FL1层是当与MgO隧道势垒形成界面时提供高磁阻(MR)比的CoFe。 FL2是Fe提高开关性能。 其中X为Hf的NiFeX厚度优选在20至40埃之间,以显着降低位线切换电流和短路位数。 在330℃至360℃退火提供190%的高MR比。 此外,低Hc和Hk同时实现,具有改进的位切换性能和更短的短路,而不会影响其他MTJ特性,例如MR比。 由于高MR比和较低的比特电阻变化,实现了更高的读取余量。