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1. 发明授权

US07932158B2 Formation of improved SOI substrates using bulk semiconductor wafers 有权
标题翻译：使用块状半导体晶片形成改进的SOI衬底
公开(公告)号：US07932158B2
公开(公告)日：2011-04-26
申请号：US12254197
申请日：2008-10-20
申请人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
发明人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
IPC分类号： H01L21/76
CPC分类号： H01L21/764 , H01L21/76283
摘要： The present invention relates to a semiconductor-on-insulator (SOI) substrate having one or more device regions. Each device region comprises at least a base semiconductor substrate layer and a semiconductor device layer with a buried insulator layer located therebetween, while the semiconductor device layer is supported by one or more vertical insulating pillars. The vertical insulating pillars each preferably has a ledge extending between the base semiconductor substrate layer and the semiconductor device layer. The SOI substrates of the present invention can be readily formed from a precursor substrate structure with a “floating” semiconductor device layer that is spaced apart from the base semiconductor substrate layer by an air gap and is supported by one or more vertical insulating pillars. The air gap is preferably formed by selective removal of a sacrificial layer located between the base semiconductor substrate layer and the semiconductor device layer.
摘要翻译：本发明涉及具有一个或多个器件区域的绝缘体上半导体（SOI）衬底。每个器件区域至少包括基底半导体衬底层和其间设置有掩埋绝缘体层的半导体器件层，而半导体器件层由一个或多个垂直绝缘柱支撑。垂直绝缘柱各自优选地具有在基底半导体衬底层和半导体器件层之间延伸的凸缘。本发明的SOI衬底可以容易地由具有“浮动”半导体器件层的前体衬底结构形成，该半导体器件层通过气隙与基底半导体衬底层间隔开并由一个或多个垂直绝缘柱支撑。气隙优选通过选择性地去除位于基底半导体衬底层和半导体器件层之间的牺牲层来形成。

2. 发明授权

US08268698B2 Formation of improved SOI substrates using bulk semiconductor wafers 有权
标题翻译：使用块状半导体晶片形成改进的SOI衬底
公开(公告)号：US08268698B2
公开(公告)日：2012-09-18
申请号：US13037608
申请日：2011-03-01
申请人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
发明人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
IPC分类号： H01L21/76
CPC分类号： H01L21/764 , H01L21/76283
摘要： The present invention relates to a semiconductor-on-insulator (SOI) substrate having one or more device regions. Each device region comprises at least a base semiconductor substrate layer and a semiconductor device layer with a buried insulator layer located therebetween, while the semiconductor device layer is supported by one or more vertical insulating pillars. The vertical insulating pillars each preferably has a ledge extending between the base semiconductor substrate layer and the semiconductor device layer. The SOI substrates of the present invention can be readily formed from a precursor substrate structure with a “floating” semiconductor device layer that is spaced apart from the base semiconductor substrate layer by an air gap and is supported by one or more vertical insulating pillars. The air gap is preferably formed by selective removal of a sacrificial layer located between the base semiconductor substrate layer and the semiconductor device layer.
摘要翻译：本发明涉及具有一个或多个器件区域的绝缘体上半导体（SOI）衬底。每个器件区域至少包括基底半导体衬底层和其间设置有掩埋绝缘体层的半导体器件层，而半导体器件层由一个或多个垂直绝缘柱支撑。垂直绝缘柱各自优选地具有在基底半导体衬底层和半导体器件层之间延伸的凸缘。本发明的SOI衬底可以容易地由具有“浮动”半导体器件层的前体衬底结构形成，半导体器件层通过气隙与基底半导体衬底层间隔开并由一个或多个垂直绝缘柱支撑。气隙优选通过选择性地去除位于基底半导体衬底层和半导体器件层之间的牺牲层来形成。

3. 发明申请

US20110147885A1 FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS 有权
标题翻译：使用块状半导体波形形成改进的SOI衬底
公开(公告)号：US20110147885A1
公开(公告)日：2011-06-23
申请号：US13037608
申请日：2011-03-01
申请人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
发明人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
IPC分类号： H01L23/58
CPC分类号： H01L21/764 , H01L21/76283
摘要： The present invention relates to a semiconductor-on-insulator (SOI) substrate having one or more device regions. Each device region comprises at least a base semiconductor substrate layer and a semiconductor device layer with a buried insulator layer located therebetween, while the semiconductor device layer is supported by one or more vertical insulating pillars. The vertical insulating pillars each preferably has a ledge extending between the base semiconductor substrate layer and the semiconductor device layer. The SOI substrates of the present invention can be readily formed from a precursor substrate structure with a “floating” semiconductor device layer that is spaced apart from the base semiconductor substrate layer by an air gap and is supported by one or more vertical insulating pillars. The air gap is preferably formed by selective removal of a sacrificial layer located between the base semiconductor substrate layer and the semiconductor device layer.
摘要翻译：本发明涉及具有一个或多个器件区域的绝缘体上半导体（SOI）衬底。每个器件区域至少包括基底半导体衬底层和其间设置有掩埋绝缘体层的半导体器件层，而半导体器件层由一个或多个垂直绝缘柱支撑。垂直绝缘柱各自优选地具有在基底半导体衬底层和半导体器件层之间延伸的凸缘。本发明的SOI衬底可以容易地由具有“浮动”半导体器件层的前体衬底结构形成，半导体器件层通过气隙与基底半导体衬底层间隔开并由一个或多个垂直绝缘柱支撑。气隙优选通过选择性地去除位于基底半导体衬底层和半导体器件层之间的牺牲层来形成。

4. 发明授权

US07452784B2 Formation of improved SOI substrates using bulk semiconductor wafers 有权
标题翻译：使用块状半导体晶片形成改进的SOI衬底
公开(公告)号：US07452784B2
公开(公告)日：2008-11-18
申请号：US11420279
申请日：2006-05-25
申请人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
发明人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
IPC分类号： H01L21/76
CPC分类号： H01L21/764 , H01L21/76283
摘要： The present invention relates to a semiconductor-on-insulator (SOI) substrate having one or more device regions. Each device region comprises at least a base semiconductor substrate layer and a semiconductor device layer with a buried insulator layer located therebetween, while the semiconductor device layer is supported by one or more vertical insulating pillars. The vertical insulating pillars each preferably has a ledge extending between the base semiconductor substrate layer and the semiconductor device layer. The SOI substrates of the present invention can be readily formed from a precursor substrate structure with a “floating” semiconductor device layer that is spaced apart from the base semiconductor substrate layer by an air gap and is supported by one or more vertical insulating pillars. The air gap is preferably formed by selective removal of a sacrificial layer located between the base semiconductor substrate layer and the semiconductor device layer.
摘要翻译：本发明涉及具有一个或多个器件区域的绝缘体上半导体（SOI）衬底。每个器件区域至少包括基底半导体衬底层和其间设置有掩埋绝缘体层的半导体器件层，而半导体器件层由一个或多个垂直绝缘柱支撑。垂直绝缘柱各自优选地具有在基底半导体衬底层和半导体器件层之间延伸的凸缘。本发明的SOI衬底可以容易地由具有“浮动”半导体器件层的前体衬底结构形成，半导体器件层通过气隙与基底半导体衬底层间隔开并由一个或多个垂直绝缘柱支撑。气隙优选通过选择性地去除位于基底半导体衬底层和半导体器件层之间的牺牲层来形成。

5. 发明申请

US20090039461A1 FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS 有权
标题翻译：使用块状半导体波形形成改进的SOI衬底
公开(公告)号：US20090039461A1
公开(公告)日：2009-02-12
申请号：US12254197
申请日：2008-10-20
申请人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
发明人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
IPC分类号： H01L29/00 , H01L21/76
CPC分类号： H01L21/764 , H01L21/76283
摘要： The present invention relates to a semiconductor-on-insulator (SOI) substrate having one or more device regions. Each device region comprises at least a base semiconductor substrate layer and a semiconductor device layer with a buried insulator layer located therebetween, while the semiconductor device layer is supported by one or more vertical insulating pillars. The vertical insulating pillars each preferably has a ledge extending between the base semiconductor substrate layer and the semiconductor device layer. The SOI substrates of the present invention can be readily formed from a precursor substrate structure with a “floating” semiconductor device layer that is spaced apart from the base semiconductor substrate layer by an air gap and is supported by one or more vertical insulating pillars. The air gap is preferably formed by selective removal of a sacrificial layer located between the base semiconductor substrate layer and the semiconductor device layer.
摘要翻译：本发明涉及具有一个或多个器件区域的绝缘体上半导体（SOI）衬底。每个器件区域至少包括基底半导体衬底层和位于它们之间的掩埋绝缘体层的半导体器件层，而半导体器件层由一个或多个垂直绝缘柱支撑。垂直绝缘柱各自优选地具有在基底半导体衬底层和半导体器件层之间延伸的凸缘。本发明的SOI衬底可以容易地由具有“浮动”半导体器件层的前体衬底结构形成，半导体器件层通过气隙与基底半导体衬底层间隔开并由一个或多个垂直绝缘柱支撑。气隙优选通过选择性地去除位于基底半导体衬底层和半导体器件层之间的牺牲层来形成。

6. 发明申请

US20070275537A1 FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS 有权
标题翻译：使用块状半导体波形形成改进的SOI衬底
公开(公告)号：US20070275537A1
公开(公告)日：2007-11-29
申请号：US11420279
申请日：2006-05-25
申请人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
发明人： William K. Henson , Dureseti Chidambarrao , Kern Rim , Hsingjen Wann , Hung Y. Ng
IPC分类号： H01L21/76
CPC分类号： H01L21/764 , H01L21/76283
摘要： The present invention relates to a semiconductor-on-insulator (SOI) substrate having one or more device regions. Each device region comprises at least a base semiconductor substrate layer and a semiconductor device layer with a buried insulator layer located therebetween, while the semiconductor device layer is supported by one or more vertical insulating pillars. The vertical insulating pillars each preferably has a ledge extending between the base semiconductor substrate layer and the semiconductor device layer. The SOI substrates of the present invention can be readily formed from a precursor substrate structure with a “floating” semiconductor device layer that is spaced apart from the base semiconductor substrate layer by an air gap and is supported by one or more vertical insulating pillars. The air gap is preferably formed by selective removal of a sacrificial layer located between the base semiconductor substrate layer and the semiconductor device layer.
摘要翻译：本发明涉及具有一个或多个器件区域的绝缘体上半导体（SOI）衬底。每个器件区域至少包括基底半导体衬底层和其间设置有掩埋绝缘体层的半导体器件层，而半导体器件层由一个或多个垂直绝缘柱支撑。垂直绝缘柱各自优选地具有在基底半导体衬底层和半导体器件层之间延伸的凸缘。本发明的SOI衬底可以容易地由具有“浮动”半导体器件层的前体衬底结构形成，半导体器件层通过气隙与基底半导体衬底层间隔开并由一个或多个垂直绝缘柱支撑。气隙优选通过选择性地去除位于基底半导体衬底层和半导体器件层之间的牺牲层来形成。

7. 发明授权

US07442619B2 Method of forming substantially L-shaped silicide contact for a semiconductor device 有权
标题翻译：形成用于半导体器件的基本上L形硅化物接触的方法
公开(公告)号：US07442619B2
公开(公告)日：2008-10-28
申请号：US11383965
申请日：2006-05-18
申请人： Zhijiong Luo , Huilong Zhu , Yung Fu Chong , Hung Y. Ng , Kern Rim , Nivo Rovedo
发明人： Zhijiong Luo , Huilong Zhu , Yung Fu Chong , Hung Y. Ng , Kern Rim , Nivo Rovedo
IPC分类号： H01L21/283 , H01L23/482
CPC分类号： H01L21/823814 , H01L21/823871 , H01L21/823878 , H01L29/665 , H01L29/6656 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device having a substantially L-shaped silicide element forming a contact is disclosed. The substantially L-shaped silicide element, inter alia, reduces contact resistance and may allow increased density of CMOS circuits. In one embodiment, the substantially L-shaped silicide element includes a base member and an extended member, wherein the base member extends at least partially into a shallow trench isolation (STI) region such that a substantially horizontal surface of the base member directly contacts a substantially horizontal surface of the STI region; and a contact contacting the substantially L-shaped silicide element. The contact may include a notch region for mating with the base member and a portion of the extended member, which increases the silicide-to-contact area and reduces contact resistance. Substantially L-shaped silicide element may be formed about a source/drain region, which increases the silicon-to-silicide area, and reduces crowding and contact resistance.
摘要翻译：公开了一种制造具有形成接触的大致L形硅化物元件的半导体器件的方法。基本上L形的硅化物元件尤其降低了接触电阻并且可以允许增加的CMOS电路的密度。在一个实施例中，基本上L形的硅化物元件包括基底构件和延伸构件，其中基底构件至少部分地延伸到浅沟槽隔离（STI）区域中，使得基底构件的基本水平的表面直接接触 STI区域的基本水平的表面; 以及接触基本上L形的硅化物元件的接触。触点可以包括用于与基底构件和延伸构件的一部分配合的切口区域，这增加了硅化物与接触面积并降低了接触电阻。可以围绕源极/漏极区域形成基本上L形的硅化物元素，这增加了硅 - 硅化物面积，并且减少了拥挤和接触电阻。

8. 发明申请

US20070267753A1 SUBSTANTIALLY L-SHAPED SILICIDE FOR CONTACT AND RELATED METHOD 有权
标题翻译：用于接触的大量L型硅胶和相关方法
公开(公告)号：US20070267753A1
公开(公告)日：2007-11-22
申请号：US11383965
申请日：2006-05-18
申请人： Zhijiong Luo , Huilong Zhu , Yung Fu Chong , Hung Y. Ng , Kern Rim , Nivo Rovedo
发明人： Zhijiong Luo , Huilong Zhu , Yung Fu Chong , Hung Y. Ng , Kern Rim , Nivo Rovedo
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L21/823814 , H01L21/823871 , H01L21/823878 , H01L29/665 , H01L29/6656 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要： A structure, semiconductor device and method having a substantially L-shaped silicide element for a contact are disclosed. The substantially L-shaped silicide element, inter alia, reduces contact resistance and may allow increased density of CMOS circuits. In one embodiment, the structure includes a substantially L-shaped silicide element including a base member and an extended member, wherein the base member extends at least partially into a shallow trench isolation (STI) region such that a substantially horizontal surface of the base member directly contacts a substantially horizontal surface of the STI region; and a contact contacting the substantially L-shaped silicide element. The contact may include a notch region for mating with the base member and a portion of the extended member, which increases the silicide-to-contact area and reduces contact resistance. Substantially L-shaped silicide element may be formed about a source/drain region, which increases the silicon-to-silicide area, and reduces crowding and contact resistance.
摘要翻译：公开了具有用于接触的大致L形硅化物元件的结构，半导体器件和方法。基本上L形的硅化物元件尤其降低了接触电阻并且可以允许增加的CMOS电路的密度。在一个实施例中，该结构包括基本上为L形的硅化物元件，其包括基底构件和延伸构件，其中基底构件至少部分地延伸到浅沟槽隔离（STI）区域中，使得基底构件的基本水平的表面直接接触STI区域的基本水平的表面; 以及接触基本上L形的硅化物元件的接触。触点可以包括用于与基底构件和延伸构件的一部分配合的切口区域，这增加了硅化物与接触面积并降低了接触电阻。可以围绕源极/漏极区域形成基本上L形的硅化物元素，这增加了硅 - 硅化物面积，并且减少了拥挤和接触电阻。

9. 发明授权

US08643119B2 Substantially L-shaped silicide for contact 有权
标题翻译：基本上L型硅化物进行接触
公开(公告)号：US08643119B2
公开(公告)日：2014-02-04
申请号：US12182212
申请日：2008-07-30
申请人： Zhijiong Luo , Huilong Zhu , Yung Fu Chong , Hung Y. Ng , Kern Rim , Nivo Rovedo
发明人： Zhijiong Luo , Huilong Zhu , Yung Fu Chong , Hung Y. Ng , Kern Rim , Nivo Rovedo
IPC分类号： H01L29/76
CPC分类号： H01L21/823814 , H01L21/823871 , H01L21/823878 , H01L29/665 , H01L29/6656 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要： A structure for a semiconductor device, according to an embodiment, includes: a substantially L-shaped silicide element including a base member and an extended member, wherein the base member extends at least partially into a shallow trench isolation (STI) region such that a substantially horizontal surface of the base member directly contacts a substantially horizontal surface of the STI region; and a contact contacting the substantially L-shaped silicide element.
摘要翻译：根据实施例的用于半导体器件的结构包括：基本上L形的硅化物元件，其包括基底构件和延伸构件，其中所述基底构件至少部分地延伸到浅沟槽隔离（STI）区域中，使得基部构件的基本水平的表面直接接触STI区域的基本水平的表面; 以及接触基本上L形的硅化物元件的接触。

10. 发明申请

US20080283934A1 SUBSTANTIALLY L-SHAPED SILICIDE FOR CONTACT AND RELATED METHOD 有权
标题翻译：用于接触的大量L型硅胶和相关方法
公开(公告)号：US20080283934A1
公开(公告)日：2008-11-20
申请号：US12182212
申请日：2008-07-30
申请人： Zhijiong Luo , Huilong Zhu , Yung Fu Chong , Hung Y. Ng , Kern Rim , Nivo Rovedo
发明人： Zhijiong Luo , Huilong Zhu , Yung Fu Chong , Hung Y. Ng , Kern Rim , Nivo Rovedo
IPC分类号： H01L29/78 , H01L21/44
CPC分类号： H01L21/823814 , H01L21/823871 , H01L21/823878 , H01L29/665 , H01L29/6656 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要： A structure, semiconductor device and method having a substantially L-shaped silicide element for a contact are disclosed. The substantially L-shaped silicide element, inter alia, reduces contact resistance and may allow increased density of CMOS circuits. In one embodiment, the structure includes a substantially L-shaped silicide element including a base member and an extended member, wherein the base member extends at least partially into a shallow trench isolation (STI) region such that a substantially horizontal surface of the base member directly contacts a substantially horizontal surface of the STI region; and a contact contacting the substantially L-shaped silicide element. The contact may include a notch region for mating with the base member and a portion of the extended member, which increases the silicide-to-contact area and reduces contact resistance. Substantially L-shaped silicide element may be formed about a source/drain region, which increases the silicon-to-silicide area, and reduces crowding and contact resistance.
摘要翻译：公开了具有用于接触的大致L形硅化物元件的结构，半导体器件和方法。基本上L形的硅化物元件尤其降低了接触电阻并且可以允许增加的CMOS电路的密度。在一个实施例中，该结构包括基本上为L形的硅化物元件，其包括基底构件和延伸构件，其中基底构件至少部分地延伸到浅沟槽隔离（STI）区域中，使得基底构件的基本水平的表面直接接触STI区域的基本水平的表面; 以及接触基本上L形的硅化物元件的接触。触点可以包括用于与基底构件和延伸构件的一部分配合的切口区域，这增加了硅化物与接触面积并降低了接触电阻。可以围绕源极/漏极区域形成基本上L形的硅化物元素，这增加了硅 - 硅化物面积，并且减少了拥挤和接触电阻。

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