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1. 发明授权

US08921702B1 Microtruss based thermal plane structures and microelectronics and printed wiring board embodiments 有权
标题翻译：基于微桁架的热平面结构和微电子学和印刷线路板实施例
公开(公告)号：US08921702B1
公开(公告)日：2014-12-30
申请号：US12691322
申请日：2010-01-21
申请人： William B. Carter , Peter D. Brewer , Adam F. Gross , Jeffrey L. Rogers , Keith V. Guinn , Alan J. Jacobsen
发明人： William B. Carter , Peter D. Brewer , Adam F. Gross , Jeffrey L. Rogers , Keith V. Guinn , Alan J. Jacobsen
IPC分类号： H05K1/00
CPC分类号： H05K1/0272 , H05K1/0204 , H05K7/20336
摘要： In one possible implementation, a thermal plane structure includes a non-wicking structural microtruss between opposing surfaces of a multilayer structure and a thermal transport medium within the thermal plane structure for fluid and vapor transport between a thermal source and a thermal sink. A microtruss wick is located between the opposing surfaces and extends between the thermal source and the thermal sink.
摘要翻译：在一个可能的实施方案中，热平面结构包括在多层结构的相对表面和热平面结构内的热传输介质之间的非芯吸结构微桁架，用于在热源和散热器之间的流体和蒸气传输。微型uss芯位于相对的表面之间并在热源和散热器之间延伸。

2. 发明授权

US09546826B1 Microtruss based thermal heat spreading structures 有权
标题翻译：基于微桁架的热传热结构
公开(公告)号：US09546826B1
公开(公告)日：2017-01-17
申请号：US12691393
申请日：2010-01-21
申请人： William B. Carter , Adam F. Gross , Keith V. Guinn , Alan J. Jacobsen , David Kisailus
发明人： William B. Carter , Adam F. Gross , Keith V. Guinn , Alan J. Jacobsen , David Kisailus
IPC分类号： F28D15/00 , F28D15/04 , F28D15/02
CPC分类号： F28D15/046 , F28D15/02 , F28D15/0233 , H01L23/427
摘要： A heat transport structure is provided having a structural microtruss wick with a thermal transport medium associated with the microtruss wick for thermal energy transport by fluid and vapor transport between a heat source and a heat sink.
摘要翻译：提供了一种热传输结构，其具有结构微桁架芯，其具有与微桁架芯相关联的热传输介质，用于通过热源和散热器之间的流体和蒸气传输进行热能传输。

3. 发明授权

US08349650B1 Multi-layered integrated circuit and apparatus with thermal management and method 有权
标题翻译：具有热管理和方法的多层集成电路和设备
公开(公告)号：US08349650B1
公开(公告)日：2013-01-08
申请号：US13038244
申请日：2011-03-01
申请人： Peter D. Brewer , Keith V. Guinn , Jonathan J. Lynch
发明人： Peter D. Brewer , Keith V. Guinn , Jonathan J. Lynch
IPC分类号： H01L21/44
CPC分类号： H01L23/66 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/94 , H01L25/0657 , H01L2223/6644 , H01L2224/29034 , H01L2224/29144 , H01L2224/29187 , H01L2224/29188 , H01L2224/32145 , H01L2224/83203 , H01L2224/83896 , H01L2224/94 , H01L2225/06589 , H01L2924/10158 , H01L2924/10253 , H01L2924/10254 , H01L2924/10272 , H01L2924/10323 , H01L2924/14 , H01L2924/3011 , H01L2224/83
摘要： A multi-layered semiconductor apparatus capable of producing at least 500 W of continuous power includes at least two device substrates arranged in a stack. Each of the at least two device substrates has a first side and a second side opposite to the first side, and each of the at least two device substrates is configured to produce an average power density higher than 100 W/cm2. A plurality of active devices are provided on the first side of each of the at least two device substrates. The plurality of active devices are radiatively coupled among the at least two device substrates. At least one of the at least two device substrates is structured to provide a plurality of cavities on its second side to receive corresponding ones of the plurality of active devices on the first side of an adjacent one of the at least two device substrates.
摘要翻译：能够产生至少500W的连续功率的多层半导体装置包括布置在堆叠中的至少两个器件衬底。所述至少两个器件衬底中的每一个具有与第一侧相对的第一侧和第二侧，并且所述至少两个器件衬底中的每一个被配置为产生高于100W / cm 2的平均功率密度。多个有源器件设置在至少两个器件衬底中的每一个的第一侧上。多个有源器件辐射耦合在至少两个器件衬底之间。所述至少两个器件衬底中的至少一个被构造成在其第二侧上提供多个空腔，以在所述至少两个器件衬底中相邻的器件衬底的第一侧上接收所述多个有源器件中的相应的空穴。

4. 发明授权

US07956381B1 Multi-layered integrated circuit and apparatus with thermal management and method 失效
标题翻译：具有热管理和方法的多层集成电路和设备
公开(公告)号：US07956381B1
公开(公告)日：2011-06-07
申请号：US12189739
申请日：2008-08-11
申请人： Peter D. Brewer , Keith V. Guinn , Jonathan J. Lynch
发明人： Peter D. Brewer , Keith V. Guinn , Jonathan J. Lynch
IPC分类号： H01L29/74
CPC分类号： H01L23/66 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/94 , H01L25/0657 , H01L2223/6644 , H01L2224/29034 , H01L2224/29144 , H01L2224/29187 , H01L2224/29188 , H01L2224/32145 , H01L2224/83203 , H01L2224/83896 , H01L2224/94 , H01L2225/06589 , H01L2924/10158 , H01L2924/10253 , H01L2924/10254 , H01L2924/10272 , H01L2924/10323 , H01L2924/14 , H01L2924/3011 , H01L2224/83
摘要： A multi-layered semiconductor apparatus capable of producing at least 500 W of continuous power includes at least two device substrates arranged in a stack. Each of the at least two device substrates has a first side and a second side opposite to the first side, and each of the at least two device substrates is configured to produce an average power density higher than 100 W/cm2. A plurality of active devices are provided on the first side of each of the at least two device substrates. The plurality of active devices are radiatively coupled among the at least two device substrates. At least one of the at least two device substrates is structured to provide a plurality of cavities on its second side to receive corresponding ones of the plurality of active devices on the first side of an adjacent one of the at least two device substrates.
摘要翻译：能够产生至少500W的连续功率的多层半导体装置包括布置在堆叠中的至少两个器件衬底。所述至少两个器件衬底中的每一个具有与第一侧相对的第一侧和第二侧，并且所述至少两个器件衬底中的每一个被配置为产生高于100W / cm 2的平均功率密度。多个有源器件设置在至少两个器件衬底中的每一个的第一侧上。多个有源器件辐射耦合在至少两个器件衬底之间。所述至少两个器件衬底中的至少一个被构造成在其第二侧上提供多个空腔，以在所述至少两个器件衬底中相邻的器件衬底的第一侧上接收所述多个有源器件中的相应的空穴。

5. 发明授权

US06677832B1 Connector for differential-mode transmission line providing virtual ground 有权
标题翻译：差分模式传输线连接器提供虚拟接地
公开(公告)号：US06677832B1
公开(公告)日：2004-01-13
申请号：US09698582
申请日：2000-10-27
申请人： Keith V. Guinn , Louis Thomas Manzione , Ming-Ju Tsai , Hui Wu
发明人： Keith V. Guinn , Louis Thomas Manzione , Ming-Ju Tsai , Hui Wu
IPC分类号： H01P500
CPC分类号： H01P3/003
摘要： An electrical connecting element is disclosed comprised of a dielectric substrate having two conductor paths disposed on opposite sides and being substantially aligned with one another. The electrical connecting element employs differential-mode signaling such that the first conductor path carries a signal of opposite polarity to the second conductor path. A virtual ground exists between the differential + and − lines that permits an otherwise “groundless” differential transmission line. The substantial alignment of the first and second conductor paths improves the space constraints, relative to conventional electrical connecting elements. The characteristic impedance of the disclosed differential transmission line depends on the width of the trace lines the thickness of the dielectric substrate.
摘要翻译：公开了一种电连接元件，其包括具有设置在相对侧并且基本上彼此对准的两个导体路径的电介质基板。电连接元件使用差模信号，使得第一导体路径承载与第二导体路径相反极性的信号。在差分+和 - 线之间存在虚拟地，允许另外“无理”的差分传输线。相对于传统的电连接元件，第一和第二导体路径的基本对准改善了空间限制。所公开的差分传输线的特性阻抗取决于迹线的宽度，介电基片的厚度。

6. 发明授权

US06404389B1 Patch antenna 有权
标题翻译：补片天线
公开(公告)号：US06404389B1
公开(公告)日：2002-06-11
申请号：US09425368
申请日：1999-10-22
申请人： John Philip Franey , Keith V. Guinn , Louis Thomas Manzione , Ming-Ju Tsai
发明人： John Philip Franey , Keith V. Guinn , Louis Thomas Manzione , Ming-Ju Tsai
IPC分类号： H01Q138
CPC分类号： H01Q21/065 , H01Q9/0407 , H01Q9/0457
摘要： An inexpensive, easy to assemble patch antenna is disclosed where unwanted polarizations in the transmitted RF energy are minimized. A feedboard, spacer and resonator are held in a compressed relationship by two halves of the antenna housing. The spacer is a thermo-formed sheet with semi-spherical spacers. The spacers have a height that provides the desired spacing between the feedboard and the resonator.
摘要翻译：公开了一种便宜且易于组装的贴片天线，其中发射的RF能量中的不需要的极化最小化。馈电板，间隔件和谐振器由天线外壳的两半保持在压缩关系中。间隔物是具有半球形间隔物的热成型片。间隔件具有在馈送板和谐振器之间提供所需间隔的高度。

7. 发明申请

US20110278350A1 Metal foil interconnection of electrical devices 有权
公开(公告)号：US20110278350A1
公开(公告)日：2011-11-17
申请号：US13136096
申请日：2011-07-21
申请人： Keith V. Guinn
发明人： Keith V. Guinn
IPC分类号： B23K31/02
CPC分类号： H01L23/49844 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/84 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40225 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/4813 , H01L2224/48132 , H01L2224/48227 , H01L2224/48724 , H01L2224/48755 , H01L2224/48824 , H01L2224/48855 , H01L2224/4911 , H01L2224/49113 , H01L2224/49171 , H01L2224/49175 , H01L2224/83801 , H01L2224/84205 , H01L2224/85424 , H01L2224/85455 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/2076 , H01L2924/30107 , H01L2924/3025 , H01L2924/351 , Y10T29/4913 , Y10T29/49144 , Y10T29/49158 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/20755 , H01L2924/00015 , H01L2924/2075 , H01L2924/20754
摘要： An electrical assembly (300, 400) includes a power IC such as a MOSFET (112, 412) attached to a substrate module (114, 214). The MOSFET includes a top surface comprising first and second conductive device surfaces (A, B), associated with first and second device ports, and a bottom surface comprising a third conductive device surface C associated with a third device port. A first foil element is bonded to the first conductive device surface(s) A and to each of the first conductive substrate surfaces (A1, A2) and provides a continuous conductive pathway from each conductive surface (A) to each other conductive surface (A) and to each conductive surface (A1, A2). A second foil element is bonded to the second conductive device surface(s) B and to the second conductive substrate surface B1 and provides a continuous conductive pathway from each device conductive surface (B) to the substrate conductive surface (B1). A third foil element may be installed to electrically interconnect the discrete second device surfaces (B). The foil elements reduce interconnection parasitics and reduce charge and thermal energy density at device conductive surfaces as compared to wire bonded electrical interconnections. The foil elements may be comprised of formed metal elements that are flexible but sufficiently rigid to hold a formed shape or flexible foils supported on a flexible dielectric substrate.

8. 发明授权

US06407704B1 Patch antenna using non-conductive thermo form frame 有权
标题翻译：贴片天线采用非导电热成型框架
公开(公告)号：US06407704B1
公开(公告)日：2002-06-18
申请号：US09425373
申请日：1999-10-22
申请人： John Philip Franey , Keith V. Guinn , Louis Thomas Manzione , Ming-Ju Tsai
发明人： John Philip Franey , Keith V. Guinn , Louis Thomas Manzione , Ming-Ju Tsai
IPC分类号： H01Q138
CPC分类号： H01Q9/0407 , H01Q1/42 , H01Q21/0087
摘要： A patch antenna's resonators are supported by a non-conductive frame. The frame supports the resonators without making holes in the resonators and thereby avoids the problem of creating unwanted electric field polarizations. Additionally, the frame grasps the resonators in areas of low current density and thereby avoids creating additional disturbances in the radiation pattern. In one embodiment of the invention, the frame includes a perimeter lip that snaps over the edges of the feedboard and thereby attaches the frame to the feedboard.
摘要翻译：贴片天线的谐振器由非导电框架支撑。该框架支撑谐振器而不在谐振器中产生孔，从而避免产生不需要的电场偏振的问题。此外，框架在低电流密度区域中抓住谐振器，从而避免在辐射图中产生额外的干扰。在本发明的一个实施例中，所述框架包括周边唇缘，所述周边唇缘卡扣在所述馈送板的边缘上，从而将所述框架附接到所述馈送板。

9. 发明授权

US08567049B2 Method for interconnecting electrical device to a module 有权
标题翻译：将电气设备与模块互连的方法
公开(公告)号：US08567049B2
公开(公告)日：2013-10-29
申请号：US13136096
申请日：2011-07-21
申请人： Keith V. Guinn
发明人： Keith V. Guinn
IPC分类号： H05K3/30
CPC分类号： H01L23/49844 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/84 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40225 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/4813 , H01L2224/48132 , H01L2224/48227 , H01L2224/48724 , H01L2224/48755 , H01L2224/48824 , H01L2224/48855 , H01L2224/4911 , H01L2224/49113 , H01L2224/49171 , H01L2224/49175 , H01L2224/83801 , H01L2224/84205 , H01L2224/85424 , H01L2224/85455 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/2076 , H01L2924/30107 , H01L2924/3025 , H01L2924/351 , Y10T29/4913 , Y10T29/49144 , Y10T29/49158 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/20755 , H01L2924/00015 , H01L2924/2075 , H01L2924/20754
摘要： An electrical assembly (300, 400) includes a power IC such as a MOSFET (112, 412) attached to a substrate module (114, 214). The MOSFET includes a top surface comprising first and second conductive device surfaces (A, B), associated with first and second device ports, and a bottom surface comprising a third conductive device surface C associated with a third device port. A first foil element is bonded to the first conductive device surface(s) A and to each of the first conductive substrate surfaces (A1, A2) and provides a continuous conductive pathway from each conductive surface (A) to each other conductive surface (A) and to each conductive surface (A1, A2). A second foil element is bonded to the second conductive device surface(s) B and to the second conductive substrate surface B1 and provides a continuous conductive pathway from each device conductive surface (B) to the substrate conductive surface (B1). A third foil element may be installed to electrically interconnect the discrete second device surfaces (B). The foil elements reduce interconnection parasitics and reduce charge and thermal energy density at device conductive surfaces as compared to wire bonded electrical interconnections. The foil elements may be comprised of formed metal elements that are flexible but sufficiently rigid to hold a formed shape or flexible foils supported on a flexible dielectric substrate.
摘要翻译：电组件（300,400）包括功率IC，例如连接到衬底模块（114,214）的MOSFET（112,412）。 MOSFET包括顶表面，其包括与第一和第二器件端口相关联的第一和第二导电器件表面（A，B），以及包括与第三器件端口相关联的第三导电器件表面C的底表面。第一箔元件结合到第一导电器件表面A和每个第一导电衬底表面（A1，A2），并且提供从每个导电表面（A）到每个其它导电表面（A）的连续导电路径）和每个导电表面（A1，A2）。第二箔元件结合到第二导电器件表面B和第二导电衬底表面B1，并且提供从每个器件导电表面（B）到衬底导电表面（B1）的连续导电路径。可以安装第三箔元件以电连接离散的第二器件表面（B）。与引线键合的电互连相比，箔元件减少了器件导电表面的互连寄生效应并降低了电荷和热能密度。箔元件可以由柔性但足够刚性的金属元件组成，以保持成形形状或支撑在柔性电介质基底上的柔性箔片。

10. 发明授权

US5877032A Process for device fabrication in which the plasma etch is controlled by monitoring optical emission 失效
标题翻译：通过监测光发射来控制等离子体蚀刻的器件制造工艺
公开(公告)号：US5877032A
公开(公告)日：1999-03-02
申请号：US703756
申请日：1996-08-27
申请人： Keith V. Guinn , Susan Clardy McNevin
发明人： Keith V. Guinn , Susan Clardy McNevin
IPC分类号： G01N21/73 , H01J37/32 , H01L21/311 , H01L21/66 , C23K1/14
CPC分类号： B24B37/013 , G01N21/73 , H01J37/32935 , H01J37/32963 , H01J37/32972 , H01L21/31116 , H01L22/26
摘要： The present invention is directed to a process for device fabrication in which a pattern is transferred from a photoresist mask into an underlying layer of silicon dioxide. A plasma containing a fluorocarbon gas is used to etch the pattern into the underlying silicon dioxide layer. The plasma is monitored using optical emission spectroscopy to effect control of the etch process. The optical emission is monitored at select wavelengths. To control the process based on an observation of photoresist etch rate, two wavelengths are monitored. One is associated with a species that is produced by the interaction between the photoresist and the plasma, and one is associated with a species related to the plasma intensity. The ratio of the optical intensity at these two wavelengths is determined in real time during processing, and the ratio is associated with acceptable process conditions by referring to a predetermined calibration curve that associates a particular ratio with a particular photoresist etch rate for a given set of process conditions. If the ratio is observed to not be within a certain range of ratios determined to indicate acceptable process conditions, the plasma conditions are either changed to bring the ratio back within the desired range, or the process is stopped until the problem is corrected. To control the process based on an observation of contact hole etch rate, a wavelength associated with one species in the plasma is monitored at two different times during the etch. A ratio of the measured intensity at these two different times is obtained. Calibration information is then used to determine if the ratio indicates that the process is proceeding acceptably. If the ratio is not within the acceptable range, remedial action is taken.
摘要翻译：本发明涉及一种器件制造方法，其中将图案从光致抗蚀剂掩模转移到二氧化硅的下层中。使用包含碳氟化合物气体的等离子体将图案蚀刻到下面的二氧化硅层中。使用光发射光谱监测等离子体以实现蚀刻过程的控制。在选择的波长处监测光发射。为了基于光致抗蚀剂蚀刻速率的观察来控制工艺，监测两个波长。一个与通过光致抗蚀剂和等离子体之间的相互作用产生的物质相关联，并且一个与与等离子体强度相关的物质相关联。在这两个波长处的光强度的比率在处理期间实时地确定，并且该比率通过参考预定的校准曲线与可接受的工艺条件相关联，该预定校准曲线将特定比率与特定的光刻胶蚀刻速率相关联，工艺条件。如果观察到比率不在确定为表示可接受的工艺条件的一定比例范围内，则改变等离子体条件以使该比率回到期望的范围内，或者该过程停止直到问题得到纠正。为了基于接触孔蚀刻速率的观察来控制工艺，在蚀刻期间在两个不同的时间监测与等离子体中的一种物质相关的波长。获得这两个不同时间的测量强度的比率。然后使用校准信息来确定该比率是否表明该过程正在可接受地进行。如果比例不在可接受范围内，则采取补救措施。

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