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1. 发明申请

US20080062802A1 Circuit implementation of a dynamic power supply for SRAM core array 有权
公开(公告)号：US20080062802A1
公开(公告)日：2008-03-13
申请号：US11516994
申请日：2006-09-07
申请人： Wesley Lin , Jhon-Jhy Liaw , Fang-Shi Jordan Lai , Chia-Fu Lee
发明人： Wesley Lin , Jhon-Jhy Liaw , Fang-Shi Jordan Lai , Chia-Fu Lee
IPC分类号： G11C11/00 , G11C5/14
CPC分类号： G11C5/14 , G11C11/413
摘要： A SRAM device includes at least one memory cell having a source line for receiving an internal supply power, and a voltage management circuit coupled to the source line for generating the internal supply power that varies in at least two different voltage levels, depending on various operation modes of the memory cell.

2. 发明授权

US07394714B2 Circuit implementation of a dynamic power supply for SRAM core array 有权
标题翻译： SRAM核心阵列的动态电源的电路实现
公开(公告)号：US07394714B2
公开(公告)日：2008-07-01
申请号：US11516994
申请日：2006-09-07
申请人： Wesley Lin , Jhon-Jhy Liaw , Fang-Shi Jordan Lai , Chia-Fu Lee
发明人： Wesley Lin , Jhon-Jhy Liaw , Fang-Shi Jordan Lai , Chia-Fu Lee
IPC分类号： G11C7/00
CPC分类号： G11C5/14 , G11C11/413
摘要： A SRAM device includes at least one memory cell having a source line for receiving an internal supply power, and a voltage management circuit coupled to the source line for generating the internal supply power that varies in at least two different voltage levels, depending on various operation modes of the memory cell.
摘要翻译： SRAM装置包括至少一个具有用于接收内部电源的源极线的存储单元，以及耦合到源极线的电压管理电路，用于根据各种操作产生以至少两个不同电压电平变化的内部电源功率存储单元的模式。

3. 发明授权

US06831853B2 Apparatus for cleaning a substrate 有权
标题翻译：控制SRAM读出放大器时钟的方法和系统
公开(公告)号：US06831853B2
公开(公告)日：2004-12-14
申请号：US10299931
申请日：2002-11-19
申请人： Wesley Lin , Jhon-Jhy Liaw
发明人： Wesley Lin , Jhon-Jhy Liaw
IPC分类号： G11C1100
CPC分类号： G11C7/08 , G11C7/14 , G11C11/41 , G11C29/02 , G11C29/026 , G11C29/028 , G11C29/12015 , G11C29/50012 , G11C2029/5006
摘要： A memory device includes a number of memory cells 112 arranged in rows and columns. Each memory cell 112 is coupled to a wordline 120 and at least one bitline 126 and/or 128. Each bitline 126 (128) is coupled to a sense amplifier 130, which is enabled by a sense amplifier enable circuit 134. The sense amplifier enable circuit 134 is coupled to the dummy bitline. This circuit provides the enable signal at a time based on an amount of leakage voltage determined from the dummy bitline.
摘要翻译：存储器件包括以行和列排列的多个存储器单元112。每个存储器单元112耦合到字线120和至少一个位线126和/或128.每个位线126（128）耦合到读出放大器130，读出放大器130由读出放大器使能电路134使能。读出放大器使能电路134耦合到虚拟位线。该电路基于从虚拟位线确定的泄漏电压的量，一次提供使能信号。

4. 发明授权

US08326832B2 On-demand data management system and method 有权
标题翻译：按需数据管理系统和方法
公开(公告)号：US08326832B2
公开(公告)日：2012-12-04
申请号：US11113578
申请日：2005-04-25
申请人： Jacky Lin , Hsien-Ying Tseng , Ging-Fang Yen , Shiun-Huan Lai , Chii-ming M. Wu , Jiing-Shin Shyu , Jhon-Jhy Liaw , Wesley Lin
发明人： Jacky Lin , Hsien-Ying Tseng , Ging-Fang Yen , Shiun-Huan Lai , Chii-ming M. Wu , Jiing-Shin Shyu , Jhon-Jhy Liaw , Wesley Lin
IPC分类号： G06F7/00 , G06F17/30
CPC分类号： G06F17/30067
摘要： An on-demand data management system. The system comprises a file management module and a demand analysis module. The file management module receives files. Each file has attributes. The file management module segments the files according the attributes. The demand analysis module receives a data demand and selects data from the segmented files according to the data demand.
摘要翻译：按需数据管理系统。该系统包括文件管理模块和需求分析模块。文件管理模块接收文件。每个文件都有属性。文件管理模块根据属性对文件进行分段。需求分析模块接收数据需求，根据数据需求从分段文件中选择数据。

5. 发明申请

US20060242168A1 On-demand data management system and method 有权
标题翻译：按需数据管理系统和方法
公开(公告)号：US20060242168A1
公开(公告)日：2006-10-26
申请号：US11113578
申请日：2005-04-25
申请人： Jacky Lin , Hsien-Ying Tseng , Ging-Fang Yen , Shiun-Huan Lai , Chii-ming Wu , Jiing-Shin Shyu , Jhon-Jhy Liaw , Wesley Lin
发明人： Jacky Lin , Hsien-Ying Tseng , Ging-Fang Yen , Shiun-Huan Lai , Chii-ming Wu , Jiing-Shin Shyu , Jhon-Jhy Liaw , Wesley Lin
IPC分类号： G06F7/00
CPC分类号： G06F17/30067
摘要： An on-demand data management system. The system comprises a file management module and a demand analysis module. The file management module receives files. Each file has attributes. The file management module segments the files according the attributes. The demand analysis module receives a data demand and selects data from the segmented files according to the data demand.
摘要翻译：按需数据管理系统。该系统包括文件管理模块和需求分析模块。文件管理模块接收文件。每个文件都有属性。文件管理模块根据属性对文件进行分段。需求分析模块接收数据需求，根据数据需求从分段文件中选择数据。

6. 发明授权

US09368388B2 Apparatus for FinFETs 有权
公开(公告)号：US09368388B2
公开(公告)日：2016-06-14
申请号：US13446199
申请日：2012-04-13
申请人： Jhon-Jhy Liaw
发明人： Jhon-Jhy Liaw
IPC分类号： H01L27/088 , H01L21/762 , H01L27/11 , H01L21/8234 , H01L29/66 , H01L29/78 , H01L27/092
CPC分类号： H01L27/0924 , H01L21/76232 , H01L21/823431 , H01L27/1104 , H01L29/66818 , H01L29/7853
摘要： A FinFET comprises an isolation region formed in a substrate, a reverse T-shaped fin formed in the substrate, wherein a bottom portion of the reverse T-shaped fin is enclosed by the isolation region and an upper portion of the reverse T-shaped fin protrudes above a top surface of the isolation region. The FinFET further comprises a gate electrode wrapping the reverse T-shaped fin.

7. 发明授权

US08750011B2 Apparatus for ROM cells 有权
标题翻译： ROM电池装置
公开(公告)号：US08750011B2
公开(公告)日：2014-06-10
申请号：US13423968
申请日：2012-03-19
申请人： Jhon-Jhy Liaw
发明人： Jhon-Jhy Liaw
IPC分类号： G11C5/06
CPC分类号： G11C17/12 , H01L27/0207 , H01L27/0924 , H01L27/11226 , H01L27/1211
摘要： A ROM cell comprises a first first-level contact formed on a first active region of a transistor of a memory cell, a first second-level contact formed on the first first-level contact, wherein the first second-level contact shifts in a first direction with reference to the first first-level contact. The ROM cell further comprises a second first-level contact formed on a second active region of the transistor of the memory cell, wherein the second first-level contact is aligned with the first first-level contact and a second second-level formed on the second first-level contact, wherein the second second-level contact shifts in a second direction with reference to the second first-level contact, and wherein the first direction is opposite to the second direction.
摘要翻译： ROM单元包括形成在存储单元的晶体管的第一有源区上的第一第一电平触点，形成在第一第一级触点上的第一二级触点，其中第一二级触点以第一方向参考第一级联系人。 ROM单元还包括形成在存储器单元的晶体管的第二有源区上的第二第一电平触点，其中第二第一电平触点与第一第一电平触点对准，第二二级触点形成在第二电平触点上第二第一级触点，其中所述第二二级触头相对于所述第二第一级触点沿第二方向移动，并且其中所述第一方向与所述第二方向相反。

8. 发明授权

US08625334B2 Memory cell 有权
公开(公告)号：US08625334B2
公开(公告)日：2014-01-07
申请号：US13328685
申请日：2011-12-16
申请人： Jhon-Jhy Liaw
发明人： Jhon-Jhy Liaw
IPC分类号： G11C11/00
CPC分类号： G11C11/412 , H01L27/1104
摘要： A memory cell and array and a method of forming a memory cell and array are described. A memory cell includes first and second pull-up transistors, first and second pull-down transistors, first and second pass-gate transistors, and first and second isolation transistors. Drains of the first pull-up and first pull-down transistors are electrically coupled together at a first node. Drains of the second pull-up and second pull-down transistors are electrically coupled together at a second node. Gates of the second pull-up and second pull-down transistors are electrically coupled to the first node, and gates of the first pull-up and first pull-down transistors are electrically coupled to the second node. The first and second pass-gate transistors are electrically coupled to the first and second nodes, respectively. The first and second isolation transistors are electrically coupled to the first and second nodes, respectively.

9. 发明申请

US20130270652A1 Apparatus for FinFETs 有权
标题翻译： FinFET器件
公开(公告)号：US20130270652A1
公开(公告)日：2013-10-17
申请号：US13446199
申请日：2012-04-13
申请人： Jhon-Jhy Liaw
发明人： Jhon-Jhy Liaw
IPC分类号： H01L27/088
CPC分类号： H01L27/0924 , H01L21/76232 , H01L21/823431 , H01L27/1104 , H01L29/66818 , H01L29/7853
摘要： A FinFET comprises an isolation region formed in a substrate, a reverse T-shaped fin formed in the substrate, wherein a bottom portion of the reverse T-shaped fin is enclosed by the isolation region and an upper portion of the reverse T-shaped fin protrudes above a top surface of the isolation region. The FinFET further comprises a gate electrode wrapping the reverse T-shaped fin.
摘要翻译： FinFET包括形成在衬底中的隔离区域，形成在衬底中的反向T形翅片，其中反向T形翅片的底部被隔离区域包围，并且反向T形翅片的上部突出在隔离区域的顶表面上方。 FinFET还包括一个包围反向T形翅片的栅电极。

10. 发明授权

US08409964B2 Shallow trench isolation with improved structure and method of forming 有权
标题翻译：浅沟隔离具有改进的结构和成型方法
公开(公告)号：US08409964B2
公开(公告)日：2013-04-02
申请号：US13399488
申请日：2012-02-17
申请人： Jhon-Jhy Liaw , Chao-Cheng Chen , Chia-Wei Chang
发明人： Jhon-Jhy Liaw , Chao-Cheng Chen , Chia-Wei Chang
IPC分类号： H01L21/76
CPC分类号： H01L21/823878 , H01L21/76232
摘要： A shallow trench isolation (STI) structure and methods of forming a STI structure are disclosed. An embodiment is a method for forming a semiconductor structure. The method includes forming a recess in a semiconductor substrate; forming a first material on sidewalls of the recess; forming a widened recessed portion through a bottom surface of the recess; removing the first material from the sidewalls of the recess; and forming a dielectric material in the recess and the widened recessed portion. The bottom surface of the recess is exposed through the first material, and the bottom surface of the recess has a first width. The widened recessed portion has a second width. The second width is greater than the first width.
摘要翻译：公开了浅沟槽隔离（STI）结构和形成STI结构的方法。实施例是形成半导体结构的方法。该方法包括在半导体衬底中形成凹陷; 在所述凹部的侧壁上形成第一材料; 通过所述凹部的底面形成加宽的凹部; 从所述凹部的侧壁去除所述第一材料; 以及在所述凹部和所述加宽的凹部中形成介电材料。凹部的底面通过第一材料露出，凹部的底面具有第一宽度。加宽的凹部具有第二宽度。第二宽度大于第一宽度。

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