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    • 2. 发明授权
    • Method and device for data buffering
    • 用于数据缓冲的方法和设备
    • US07581072B2
    • 2009-08-25
    • US11427268
    • 2006-06-28
    • Wen-Chung TsaiJung-Tsan Hsu
    • Wen-Chung TsaiJung-Tsan Hsu
    • G06F12/00
    • G06F5/16
    • A data buffer device that includes a write unit and a read unit, and is disposed between a first interface device and a second interface device is provided. The write unit further includes a first write buffer, a second write buffer and a write controller. The write controller controls the first write buffer and the second write buffer to receive and transmit data from the first interface device to the second interface device alternatively according to the requests of the first interface device and the second interface device. The read unit further includes a first read controller, a first read buffer and a second read buffer. The read controller controls the first read buffer and the second read buffer to receive and transmit data from the second interface device to the first interface device alternatively according to the requests of the first interface device and the second interface device.
    • 提供一种包括写入单元和读取单元并且设置在第一接口设备和第二接口设备之间的数据缓冲设备。 写单元还包括第一写缓冲器,第二写缓冲器和写控制器。 写入控制器根据第一接口设备和第二接口设备的请求,控制第一写入缓冲器和第二写入缓冲器,以便从第一接口设备接收和发送数据至第二接口设备。 读取单元还包括第一读取控制器,第一读取缓冲器和第二读取缓冲器。 读取控制器控制第一读取缓冲器和第二读取缓冲器,以根据第一接口设备和第二接口设备的请求,将数据从第二接口设备接收和发送到第一接口设备。
    • 4. 发明申请
    • Embedded system with a bus and arbitration method for same
    • 嵌入式系统与总线和仲裁方法相同
    • US20070198730A1
    • 2007-08-23
    • US11357572
    • 2006-02-17
    • Wen-Chung TsaiJung-Tsan Hsu
    • Wen-Chung TsaiJung-Tsan Hsu
    • G06F15/16
    • G06F13/3625
    • The present invention relates to an embedded system and method, and in particular relates to an embedded system with a bus and an arbitration method. An arbitration method is applied in an embedded system that comprises a plurality of devices, a bus and an arbiter. Each device comprises a buffer and a time-to-death value. The arbiter chooses one device to access data through the bus according to the plurality of TTD values. The arbitration method comprises: sending a plurality of request signals to the arbiter; choosing one device to access data through the bus according to the plurality of TTD values, wherein the chosen device with a minimum TTD value is chosen; increasing the TTD value of the chosen device when the chosen device is accessing data through the bus; choosing another device to access data through the bus when the TTD value of another device becomes minimum.
    • 嵌入式系统和方法技术领域本发明涉及嵌入式系统和方法,特别涉及具有总线和仲裁方法的嵌入式系统。 仲裁方法应用于包括多个设备,总线和仲裁器的嵌入式系统中。 每个设备包括缓冲器和死时间值。 仲裁器根据多个TTD值选择一个设备通过总线访问数据。 仲裁方法包括:向仲裁者发送多个请求信号; 选择一个设备以根据多个TTD值通过总线访问数据,其中选择具有最小TTD值的所选择的设备; 当所选设备通过总线访问数据时,增加所选设备的TTD值; 当另一个设备的TTD值变得最小时,选择另一个设备通过总线访问数据。
    • 5. 发明申请
    • METHOD AND DEVICE FOR DATA BUFFERING
    • 数据缓冲的方法和装置
    • US20060282619A1
    • 2006-12-14
    • US11427268
    • 2006-06-28
    • Wen-Chung TsaiJung-Tsan Hsu
    • Wen-Chung TsaiJung-Tsan Hsu
    • G06F12/00G06F13/00
    • G06F5/16
    • A data buffer device that includes a write unit and a read unit, and is disposed between a first interface device and a second interface device is provided. The write unit further includes a first write buffer, a second write buffer and a write controller. The write controller controls the first write buffer and the second write buffer to receive and transmit data from the first interface device to the second interface device alternatively according to the requests of the first interface device and the second interface device. The read unit further includes a first read controller, a first read buffer and a second read buffer. The read controller controls the first read buffer and the second read buffer to receive and transmit data from the second interface device to the first interface device alternatively according to the requests of the first interface device and the second interface device.
    • 提供一种包括写入单元和读取单元并且设置在第一接口设备和第二接口设备之间的数据缓冲设备。 写单元还包括第一写缓冲器,第二写缓冲器和写控制器。 写入控制器根据第一接口设备和第二接口设备的请求,控制第一写入缓冲器和第二写入缓冲器,以便从第一接口设备接收和发送数据至第二接口设备。 读取单元还包括第一读取控制器,第一读取缓冲器和第二读取缓冲器。 读取控制器控制第一读取缓冲器和第二读取缓冲器,以根据第一接口设备和第二接口设备的请求,将数据从第二接口设备接收和发送到第一接口设备。