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1. 发明授权

US07060637B2 Methods of forming intermediate semiconductor device structures using spin-on, photopatternable, interlayer dielectric materials 有权
标题翻译：使用旋涂，光图案化，层间介电材料形成中间半导体器件结构的方法
公开(公告)号：US07060637B2
公开(公告)日：2006-06-13
申请号：US10435791
申请日：2003-05-12
申请人： Weimin Li , Gurtej S. Sandhu
发明人： Weimin Li , Gurtej S. Sandhu
IPC分类号： H01L21/47 , C08J7/04
CPC分类号： G03F7/095 , G03F7/0757 , H01L21/02134 , H01L21/02137 , H01L21/02216 , H01L21/02222 , H01L21/02282 , H01L21/02348 , H01L21/311 , Y10T428/31663
摘要： A cap layer that enables a photopatternable, spin-on material to be used in the formation of semiconductor device structures at wavelengths that were previously unusable. The photopatternable, spin-on material is applied as a layer to a semiconductor substrate. The cap layer and a photoresist layer are each formed over the photopatternable layer. The cap layer absorbs or reflects radiation and protects the photopatternable layer from a first wavelength of radiation used in patterning the photoresist layer. The photopatternable, spin-on material is convertible to a silicon dioxide-based material upon exposure to a second wavelength of radiation.
摘要翻译：能够使光可图案化的旋涂材料用于以前不可用的波长形成半导体器件结构的盖层。将可光刻图案的旋涂材料作为层施加到半导体衬底。覆盖层和光致抗蚀剂层各自形成在光图案化层上。盖层吸收或反射辐射，并保护光致图案层免受用于图案化光致抗蚀剂层的第一波长的辐射。照射图案化的旋涂材料在暴露于第二波长辐射时可转换为二氧化硅基材料。

2. 发明授权

US06930058B2 Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge 有权
标题翻译：沉积掺杂有P，B和Ge中的至少一种的包含二氧化硅的层的方法
公开(公告)号：US06930058B2
公开(公告)日：2005-08-16
申请号：US10420246
申请日：2003-04-21
申请人： Chris W. Hill , Weimin Li , Gurtej S. Sandhu
发明人： Chris W. Hill , Weimin Li , Gurtej S. Sandhu
IPC分类号： C23C16/40 , C23C16/44 , C23C16/455 , H01L21/316 , H01L21/31 , H01L21/469 , H01L21/76 , H01L21/8238
CPC分类号： C23C16/45523 , C23C16/401 , H01L21/02126 , H01L21/02129 , H01L21/02271 , H01L21/31625
摘要： A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.
摘要翻译：衬底位于沉积室内。将至少两种气体前体进料到共同包含硅的室，包含氧和掺杂剂的氧化剂成为沉积的掺杂二氧化硅的一部分。进料至少在两个不同的时间段内并且在有效沉积掺杂的二氧化硅层的条件下在基板上。时间段和条件的特征在于一段时间，其中一种所述包含所述掺杂剂的气态前体在基本上不流动任何所述氧化剂前体的情况下流动到所述室。在一个实施方案中，与沉积在限定所述间隙的衬底结构上的任何掺杂二氧化硅相比，时间段和条件有效地至少在衬底上的至少一些间隙内沉积更大量的掺杂二氧化硅。

3. 发明授权

US06777308B2 Method of improving HDP fill process 失效
标题翻译：改善HDP填充过程的方法
公开(公告)号：US06777308B2
公开(公告)日：2004-08-17
申请号：US10150843
申请日：2002-05-17
申请人： Li Li , Weimin Li , Gurtej S. Sandhu
发明人： Li Li , Weimin Li , Gurtej S. Sandhu
IPC分类号： H01L2176
CPC分类号： C23C16/4408 , C23C16/045 , C23C16/402 , H01L21/02164 , H01L21/02211 , H01L21/02274 , H01L21/31612 , H01L21/76224
摘要： A method for depositing a dielectric in a trench on a semiconductor substrate is provided. The dielectric is deposited by using an HDP-CVD system and performing a deposition of first and second layers of dielectric material. A first inert gas is utilized during the deposition of the first layer, and a second inert gas is utilized during the deposition of the second layer. Generally, a purge step is performed between the deposition of the first and second layers. The resulting dielectric layers are substantially free of voids and have low particle counts. Structures utilizing the filled trenches are also disclosed.
摘要翻译：提供了一种在半导体衬底上的沟槽中沉积电介质的方法。通过使用HDP-CVD系统沉积电介质并执行介电材料的第一和第二层的沉积。在第一层的沉积期间使用第一惰性气体，并且在沉积第二层期间使用第二惰性气体。通常，在第一和第二层的沉积之间进行清洗步骤。所得到的电介质层基本上没有空隙并且具有低的颗粒计数。还公开了利用填充沟槽的结构。

4. 发明授权

US06218288B1 Multiple step methods for forming conformal layers 失效
公开(公告)号：US06218288B1
公开(公告)日：2001-04-17
申请号：US09076253
申请日：1998-05-11
申请人： Weimin Li , Gurtej S. Sandhu
发明人： Weimin Li , Gurtej S. Sandhu
IPC分类号： H01L214763
CPC分类号： H01L21/76868 , C23C16/045 , C23C16/34 , H01L21/76843 , H01L21/76877 , H01L21/76897 , H01L28/60
摘要： A two-step formation process provides conformal coverage at both the bottom surface and one or more side walls of an opening for various applications, e.g., high aspect ratio contact liners or storage cell capacitor electrode applications, and provides conformal coverage on any features requiring such coverage. A method for forming a conformal layer in the fabrication of integrated circuits includes providing a substrate assembly including at least a generally horizontal first surface and a second surface extending therefrom. A first portion of the layer is formed selectively on the horizontal first surface during a first period of time and a second portion of the layer is deposited selectively on the second surface during a second period of time. Further, one illustrative process for forming tungsten nitride in the fabrication of integrated circuits includes forming tungsten nitride on the horizontal first surface during a first period of time and depositing tungsten nitride on the second surface during a second period of time by plasma enhanced chemical vapor deposition. The tungsten nitride may be formed on the first surface by plasma enhanced chemical vapor deposition using a first reactant gas mixture including WF6, at least one of NF3 and N2, and H2 with the tungsten nitride being deposited on the second surface by plasma enhanced chemical vapor deposition using a second reactant gas mixture including WF6, at least one of NF3 and N2, H2, and He.

5. 发明授权

US07470635B2 Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry, methods of forming trench isolation in the fabrication of integrated circuitry, methods of depositing silicon dioxide-comprising layers in the fabrication of integrated circuitry, and methods of forming bit line over capacitor arrays of memory cells 有权
标题翻译：在集成电路的制造中沉积二氧化硅层的方法，在集成电路的制造中形成沟槽隔离的方法，在集成电路的制造中沉积含二氧化硅的层的方法以及形成位线的方法电容阵列的存储单元
公开(公告)号：US07470635B2
公开(公告)日：2008-12-30
申请号：US11378825
申请日：2006-03-17
申请人： Weimin Li , Gurtej S. Sandhu
发明人： Weimin Li , Gurtej S. Sandhu
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02145 , H01L21/02164 , H01L21/02214 , H01L21/02271 , H01L21/0228 , H01L21/3121 , H01L21/31612 , H01L21/76224 , H01L21/823462
摘要： This invention includes methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming bit line over capacitor arrays of memory cells. In one implementation, a semiconductor substrate having an exposed outer first surface comprising silicon-nitrogen bonds and an exposed outer second surface comprising at least one of silicon and silicon dioxide is provided. A layer comprising a metal is deposited over at least the outer second surface. A silanol is flowed to the metal of the outer second surface and to the outer first surface effective to selectively deposit a silicon dioxide comprising layer over the outer second surface as compared to the outer first surface. Other aspects and implementations are contemplated.
摘要翻译：本发明包括在集成电路的制造中沉积包含层的二氧化硅的方法，形成沟槽隔离的方法以及在存储器单元的电容器阵列上形成位线的方法。在一个实施方案中，提供了具有包含硅 - 氮键的暴露的外部第一表面和包含硅和二氧化硅中的至少一种的暴露的外部第二表面的半导体衬底。包含金属的层至少沉积在外部第二表面上。与外部第一表面相比，硅烷醇流动到外部第二表面的金属和外部第一表面，有效地选择性地将二氧化硅包含层沉积在外部第二表面上。考虑了其他方面和实现。

6. 发明授权

US07341957B2 Masking structure having multiple layers including amorphous carbon layer 有权
标题翻译：具有包括无定形碳层的多层的掩模结构
公开(公告)号：US07341957B2
公开(公告)日：2008-03-11
申请号：US11215671
申请日：2005-08-30
申请人： Gurtej S. Sandhu , Zhiping Yin , Weimin Li
发明人： Gurtej S. Sandhu , Zhiping Yin , Weimin Li
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/3081 , H01L21/0332 , H01L21/31144 , H01L21/32139 , H01L27/10852
摘要： A masking structure having multiple layers is formed. The masking structure includes an amorphous carbon layer and a cap layer formed over the amorphous carbon layer. The amorphous carbon layer includes transparent amorphous carbon. The cap layer includes non-oxide materials. The masking structure may be used as a mask in an etching process during fabrication of semiconductor devices.
摘要翻译：形成具有多层的掩模结构。掩模结构包括无定形碳层和形成在无定形碳层上的盖层。无定形碳层包括透明无定形碳。盖层包括非氧化物材料。在半导体器件的制造期间，掩模结构可以用作蚀刻工艺中的掩模。

7. 发明授权

US07678460B2 Intermediate semiconductor device structures using photopatternable, dielectric materials 有权
标题翻译：中间半导体器件结构使用光图案化的介电材料
公开(公告)号：US07678460B2
公开(公告)日：2010-03-16
申请号：US11432739
申请日：2006-05-11
申请人： Weimin Li , Gurtej S. Sandhu
发明人： Weimin Li , Gurtej S. Sandhu
IPC分类号： B32B13/04
CPC分类号： G03F7/095 , G03F7/0757 , H01L21/02134 , H01L21/02137 , H01L21/02216 , H01L21/02222 , H01L21/02282 , H01L21/02348 , H01L21/311 , Y10T428/31663
摘要： A cap layer that enables a photopatternable, spin-on material to be used in the formation of semiconductor device structures at wavelengths that were previously unusable is disclosed. The photopatternable, spin-on material is applied as a layer to a semiconductor substrate. The cap layer and a photoresist layer are each formed over the photopatternable layer. The cap layer absorbs or reflects radiation and protects the photopatternable layer from a first wavelength of radiation used in patterning the photoresist layer. The photopatternable, spin-on material is convertible to a silicon dioxide-based material upon exposure to a second wavelength of radiation.
摘要翻译：公开了一种盖层，其能够使光可图案化的旋涂材料用于以前不可用的波长的半导体器件结构的形成。将可光刻图案的旋涂材料作为层施加到半导体衬底。覆盖层和光致抗蚀剂层各自形成在光图案化层上。盖层吸收或反射辐射，并保护光致图案层免受用于图案化光致抗蚀剂层的第一波长的辐射。照射图案化的旋涂材料在暴露于第二波长辐射时可转换为二氧化硅基材料。

8. 发明授权

US07470632B2 Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge 有权
标题翻译：沉积掺杂有P，B和Ge中的至少一种的包含二氧化硅的层的方法
公开(公告)号：US07470632B2
公开(公告)日：2008-12-30
申请号：US11204509
申请日：2005-08-16
申请人： Chris W. Hill , Weimin Li , Gurtej S. Sandhu
发明人： Chris W. Hill , Weimin Li , Gurtej S. Sandhu
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： C23C16/45523 , C23C16/401 , H01L21/02126 , H01L21/02129 , H01L21/02271 , H01L21/31625
摘要： A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.
摘要翻译：衬底位于沉积室内。将至少两种气体前体进料到共同包含硅的室，包含氧和掺杂剂的氧化剂成为沉积的掺杂二氧化硅的一部分。进料至少在两个不同的时间段内并且在有效沉积掺杂的二氧化硅层的条件下在基板上。时间段和条件的特征在于一段时间，其中一种所述包含所述掺杂剂的气态前体在基本上不流动任何所述氧化剂前体的情况下流动到所述室。在一个实施方案中，与沉积在限定所述间隙的衬底结构上的任何掺杂二氧化硅相比，时间段和条件有效地至少在衬底上的至少一些间隙内沉积更大量的掺杂二氧化硅。

9. 发明授权

US07053010B2 Methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming arrays of memory cells 有权
标题翻译：在制造集成电路中沉积包含层的二氧化硅的方法，形成沟槽隔离的方法和形成存储器单元阵列的方法
公开(公告)号：US07053010B2
公开(公告)日：2006-05-30
申请号：US10806923
申请日：2004-03-22
申请人： Weimin Li , Gurtej S. Sandhu
发明人： Weimin Li , Gurtej S. Sandhu
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02145 , H01L21/02164 , H01L21/02214 , H01L21/02271 , H01L21/0228 , H01L21/3121 , H01L21/31612 , H01L21/76224 , H01L21/823462
摘要： This invention includes methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming bit line over capacitor arrays of memory cells. In one implementation, a semiconductor substrate having an exposed outer first surface comprising silicon-nitrogen bonds and an exposed outer second surface comprising at least one of silicon and silicon dioxide is provided. A layer comprising a metal is deposited over at least the outer second surface. A silanol is flowed to the metal of the outer second surface and to the outer first surface effective to selectively deposit a silicon dioxide comprising layer over the outer second surface as compared to the outer first surface. Other aspects and implementations are contemplated.
摘要翻译：本发明包括在集成电路的制造中沉积包含层的二氧化硅的方法，形成沟槽隔离的方法以及在存储器单元的电容器阵列上形成位线的方法。在一个实施方案中，提供了具有包含硅 - 氮键的暴露的外部第一表面和包含硅和二氧化硅中的至少一种的暴露的外部第二表面的半导体衬底。包含金属的层至少沉积在外部第二表面上。与外部第一表面相比，硅烷醇流动到外部第二表面的金属和外部第一表面，有效地选择性地将二氧化硅包含层沉积在外部第二表面上。考虑了其他方面和实现。

10. 发明授权

US07018469B2 Atomic layer deposition methods of forming silicon dioxide comprising layers 失效
标题翻译：形成二氧化硅层的原子层沉积方法
公开(公告)号：US07018469B2
公开(公告)日：2006-03-28
申请号：US10669667
申请日：2003-09-23
申请人： Li Li , Weimin Li , Gurtej S. Sandhu
发明人： Li Li , Weimin Li , Gurtej S. Sandhu
IPC分类号： C30B25/14
CPC分类号： C23C16/45527 , C23C16/402
摘要： A substrate is positioned within a deposition chamber. Trimethylsilane is flowed to the chamber and a first inert gas is flowed to the chamber under conditions effective to chemisorb a first species monolayer comprising silicon onto the substrate. The first inert gas is flowed at a first rate. After forming the first species monolayer, an oxidant is flowed to the chamber and a second inert gas is flowed to the chamber under conditions effective to react the oxidant with the chemisorbed first species and form a monolayer comprising silicon dioxide on the substrate. The second inert gas flowing is at a second rate which is less than the first rate. The a) trimethylsilane and first inert gas flowing and the b) oxidant and second inert gas flowing are successively repeated effective to form a silicon dioxide comprising layer on the substrate. Other implementations and aspects are contemplated.
摘要翻译：衬底位于沉积室内。三甲基硅烷流到室中，并且第一惰性气体在有效地化学吸附包含硅的第一物质单层到衬底上的条件下流到室中。第一惰性气体以第一速率流动。在形成第一物质单层之后，将氧化剂流到室，并且在有效使氧化剂与化学吸附的第一种类反应的条件下将第二惰性气体流入室，并在衬底上形成包含二氧化硅的单层。第二惰性气体流动的速度小于第一速率。 a）三甲基硅烷和第一惰性气体流动，b）氧化剂和第二惰性气体流动相继重复有效地在基底上形成含二氧化硅的层。考虑其他实现和方面。

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