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1. 发明申请

US20070205499A1 Microelectromechanical microphone packaging system 有权
标题翻译：微机电麦克风包装系统
公开(公告)号：US20070205499A1
公开(公告)日：2007-09-06
申请号：US11645598
申请日：2006-12-27
申请人： Wei-Chung Wang , Sung-Mao Wu , Hsueh-An Yang , Kuo-Pin Yang , Chian-Chi Lin
发明人： Wei-Chung Wang , Sung-Mao Wu , Hsueh-An Yang , Kuo-Pin Yang , Chian-Chi Lin
IPC分类号： H01L23/12
CPC分类号： B81B7/0064 , B81B2201/0257 , H01L23/3121 , H01L24/48 , H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , H01L2224/8592 , H01L2924/00014 , H01L2924/16151 , H01L2924/181 , H01L2924/19105 , H01L2924/3025 , H04R1/02 , H04R1/04 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention relates to a microelectromechanical microphone packaging system. The microelectromechanical microphone packaging system comprises a substrate, a chip, a microelectromechanical microphone, a conductive glue, a non-conductive glue and a cover. The substrate has a first surface. The chip is mounted on the first surface of the substrate. The microelectromechanical microphone is mounted on the first surface of the substrate, and electrically connected to the chip. The chip is enclosed by the non-conductive glue. The non-conductive glue is enclosed by the conductive glue. The cover is mounted on the first surface of the substrate to form a containing space, and has an acoustic aperture. The microelectromechanical microphone packaging system utilizes the conductive glue enclosing the chip and the non-conductive glue to shield interference from outside noise and obtain a shielding effect. In addition, the cover does not need to be made of metal material.
摘要翻译：本发明涉及一种微机电麦克风包装系统。微电机麦克风包装系统包括基片，芯片，微电机麦克风，导电胶，非导电胶和盖。衬底具有第一表面。芯片安装在基板的第一表面上。微机电麦克风安装在基板的第一表面上，并与芯片电连接。芯片由非导电胶水封闭。导电胶被导电胶包围。盖安装在基板的第一表面上以形成容纳空间，并具有声孔。微机电麦克风包装系统利用封装芯片和非导电胶的导电胶来屏蔽外部噪声的干扰并获得屏蔽效果。此外，盖子不需要由金属材料制成。

2. 发明授权

US07945062B2 Microelectromechanical microphone packaging system 有权
标题翻译：微机电麦克风包装系统
公开(公告)号：US07945062B2
公开(公告)日：2011-05-17
申请号：US11645598
申请日：2006-12-27
申请人： Wei-Chung Wang , Sung-Mao Wu , Hsueh-An Yang , Kuo-Pin Yang , Chian-Chi Lin
发明人： Wei-Chung Wang , Sung-Mao Wu , Hsueh-An Yang , Kuo-Pin Yang , Chian-Chi Lin
IPC分类号： H04R25/00 , H04R9/08 , H04R11/04 , H04R17/02 , H04R19/04 , H04R21/02 , H01L23/02 , H01L23/28
CPC分类号： B81B7/0064 , B81B2201/0257 , H01L23/3121 , H01L24/48 , H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , H01L2224/8592 , H01L2924/00014 , H01L2924/16151 , H01L2924/181 , H01L2924/19105 , H01L2924/3025 , H04R1/02 , H04R1/04 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention relates to a microelectromechanical microphone packaging system. The microelectromechanical microphone packaging system comprises a substrate, a chip, a microelectromechanical microphone, a conductive glue, a non-conductive glue and a cover. The substrate has a first surface. The chip is mounted on the first surface of the substrate. The microelectromechanical microphone is mounted on the first surface of the substrate, and electrically connected to the chip. The chip is enclosed by the non-conductive glue. The non-conductive glue is enclosed by the conductive glue. The cover is mounted on the first surface of the substrate to form a containing space, and has an acoustic aperture. The microelectromechanical microphone packaging system utilizes the conductive glue enclosing the chip and the non-conductive glue to shield interference from outside noise and obtain a shielding effect. In addition, the cover does not need to be made of metal material.
摘要翻译：本发明涉及一种微机电麦克风包装系统。微电机麦克风包装系统包括基片，芯片，微电机麦克风，导电胶，非导电胶和盖。衬底具有第一表面。芯片安装在基板的第一表面上。微机电麦克风安装在基板的第一表面上，并与芯片电连接。芯片由非导电胶水封闭。导电胶被导电胶包围。盖安装在基板的第一表面上以形成容纳空间，并具有声孔。微机电麦克风包装系统利用封装芯片和非导电胶的导电胶来屏蔽外部噪声的干扰并获得屏蔽效果。此外，盖子不需要由金属材料制成。

3. 发明授权

US08836116B2 Wafer level packaging of micro-electro-mechanical systems (MEMS) and complementary metal-oxide-semiconductor (CMOS) substrates 有权
标题翻译：微电子机械系统（MEMS）和互补金属氧化物半导体（CMOS）基板的晶片级封装
公开(公告)号：US08836116B2
公开(公告)日：2014-09-16
申请号：US12944118
申请日：2010-11-11
申请人： Hsueh-An Yang
发明人： Hsueh-An Yang
IPC分类号： H01L29/72 , B81C1/00 , H01L23/48 , H01L23/31 , H01L21/768
CPC分类号： H01L23/481 , B81B7/008 , B81C1/0023 , B81C1/00238 , B81C1/00571 , B81C2203/0771 , H01L21/76 , H01L21/76885 , H01L21/76898 , H01L23/3171 , H01L23/53238 , H01L2224/0401 , H01L2224/05 , H01L2224/05569 , H01L2224/13 , H01L2224/13022 , H01L2924/00014 , H01L2924/0002 , H01L2924/1461 , H01L2924/00 , H01L2224/05552
摘要： The embodiments of methods and structures for forming through silicon vias a CMOS substrate bonded to a MEMS substrate and a capping substrate provide mechanisms for integrating CMOS and MEMS devices that use less real-estate and are more reliable. The through silicon vias electrically connect to metal-1 level of the CMOS devices. Copper metal may be plated on a barrier/Cu-seed layer to partially fill the through silicon vias, which saves time and cost. The formation method may involve using dual dielectric layers on the substrate surface as etching mask to eliminate a photolithographical process during the removal of oxide layer at the bottoms of through silicon vias. In some embodiments, the through silicon vias land on polysilicon gate structures to prevent notch formation during etching of the vias.
摘要翻译：用于形成硅通孔的方法和结构的实施例与粘合到MEMS衬底和封盖衬底的CMOS衬底提供用于集成使用较少不动产且更可靠的CMOS和MEMS器件的机制。通孔硅通孔电连接到CMOS器件的金属1级。铜金属可以镀在阻挡层/ Cu籽晶层上以部分地填充通过硅通孔，这节省了时间和成本。形成方法可以包括在衬底表面上使用双电介质层作为蚀刻掩模，以在通过硅通孔的底部去除氧化物层期间消除光刻工艺。在一些实施例中，穿通硅通孔着陆在多晶硅栅极结构上，以防止在蚀刻过孔期间形成凹陷。

4. 发明授权

US08318511B2 Integration manufacturing process for MEMS device 失效
公开(公告)号：US08318511B2
公开(公告)日：2012-11-27
申请号：US13343643
申请日：2012-01-04
申请人： Mingching Wu , Hsueh-An Yang , Hung-Yi Lin , Weileun Fang
发明人： Mingching Wu , Hsueh-An Yang , Hung-Yi Lin , Weileun Fang
IPC分类号： H01L31/26
CPC分类号： B81C1/00301 , B81B2201/042 , B81B2207/097
摘要： A method for manufacturing an MEMS device is provided. The method includes steps of a) providing a first substrate having a concavity located thereon, b) providing a second substrate having a connecting area and an actuating area respectively located thereon, c) forming plural microstructures in the actuating area, d) mounting a conducting element in the connecting area and the actuating area, e) forming an insulating layer on the conducting element and f) connecting the first substrate to the connecting area to form the MEMS device. The concavity contains the plural microstructures.

5. 发明申请

US20110174058A1 INTEGRATION MANUFACTURING PROCESS FOR MEMS DEVICE 有权
标题翻译： MEMS器件的集成制造工艺
公开(公告)号：US20110174058A1
公开(公告)日：2011-07-21
申请号：US13072879
申请日：2011-03-28
申请人： Mingching Wu , Hsueh-An Yang , Hung-Yi Lin , Weileun Fang
发明人： Mingching Wu , Hsueh-An Yang , Hung-Yi Lin , Weileun Fang
IPC分类号： G01M3/04 , H01L21/02
CPC分类号： B81C1/00301 , B81B2201/042 , B81B2207/097
摘要： A method for manufacturing an MEMS device is provided. The method includes steps of a) providing a first substrate having a concavity located thereon, b) providing a second substrate having a connecting area and an actuating area respectively located thereon, c) forming plural microstructures in the actuating area, d) mounting a conducting element in the connecting area and the actuating area, e) forming an insulating layer on the conducting element and f) connecting the first substrate to the connecting area to form the MEMS device. The concavity contains the plural microstructures.
摘要翻译：提供了一种用于制造MEMS器件的方法。该方法包括以下步骤：a）提供具有位于其上的凹面的第一基底，b）提供具有分别位于其上的连接区域和致动区域的第二基底，c）在致动区域中形成多个微结构，d）在所述连接区域和所述致动区域中的元件，e）在所述导电元件上形成绝缘层，以及f）将所述第一基板连接到所述连接区域以形成所述MEMS器件。凹面包含多个微结构。

6. 发明申请

US20100230759A1 Silicon Chip Having Through Via and Method for Making the Same 有权
标题翻译：通过硅片和其制造方法
公开(公告)号：US20100230759A1
公开(公告)日：2010-09-16
申请号：US12647856
申请日：2009-12-28
申请人： Hsueh-An Yang , Pei-Chun Chen , Chien-Hua Chen
发明人： Hsueh-An Yang , Pei-Chun Chen , Chien-Hua Chen
IPC分类号： H01L23/48 , H01L27/092 , H01L21/768
CPC分类号： H01L21/76898
摘要： The present invention relates to a silicon chip having a through via and a method for making the same. The silicon chip includes a silicon substrate, a passivation layer, at least one electrical device and at least one through via. The passivation layer is disposed on a first surface of the silicon substrate. The electrical device is disposed in the silicon substrate, and exposed to a second surface of the silicon substrate. The through via includes a barrier layer and a conductor, and penetrates the silicon substrate and the passivation layer. A first end of the through via is exposed to the surface of the passivation layer, and a second end of the through via connects the electrical device. When a redistribution layer is formed on the surface of the passivation layer, the redistribution layer will not contact the silicon substrate, thus avoiding a short circuit. Therefore, a lower resolution process can be used, which results in low manufacturing cost and simple manufacturing process.
摘要翻译：本发明涉及具有贯通孔的硅芯片及其制造方法。硅芯片包括硅衬底，钝化层，至少一个电器件和至少一个通孔。钝化层设置在硅衬底的第一表面上。电气设备设置在硅衬底中，并暴露于硅衬底的第二表面。通孔包括阻挡层和导体，并且穿透硅衬底和钝化层。通孔的第一端暴露于钝化层的表面，通孔的第二端连接电气装置。当在钝化层的表面上形成再分布层时，再分布层将不会接触硅衬底，从而避免短路。因此，可以使用较低分辨率的工艺，这导致制造成本低和制造工艺简单。

7. 发明申请

US20050280331A1 Two-axis device and manufacturing method therefor 失效
标题翻译：双轴装置及其制造方法
公开(公告)号：US20050280331A1
公开(公告)日：2005-12-22
申请号：US10951529
申请日：2004-09-28
申请人： Mingching Wu , Hsueh-An Yang , Hung-Yi Lin , Weileun Fang
发明人： Mingching Wu , Hsueh-An Yang , Hung-Yi Lin , Weileun Fang
IPC分类号： B81B7/02 , B81C1/00 , C23F1/00 , C23F4/00 , G02B26/08 , G02B26/10 , H02N1/00
CPC分类号： G02B26/0841 , C23F4/00 , H02N1/006
摘要： A two-axis device is provided. The two-axis device includes a first substrate having a plurality of electrodes, a first connecting layer located on the first substrate, an actuating layer, a second connecting layer and a cover. The actuating layer is connected to the first substrate via the first connecting layer and includes a circular portion, an actuating portion, a first shaft and a second shaft. The second connecting layer is connected to the actuating layer and the cover is connected to the actuating layer via the second connecting layer. In addition, a vacuum concavity is formed by the first substrate, the first connecting layer, the actuating layer, the second connecting layer and the cover. The actuating portion and the first shaft are located in the vacuum concavity, and the second shaft extends outside of the vacuum concavity.
摘要翻译：提供了两轴设备。双轴装置包括具有多个电极的第一基板，位于第一基板上的第一连接层，致动层，第二连接层和盖。所述致动层经由所述第一连接层连接到所述第一基板，并且包括圆形部分，致动部分，第一轴和第二轴。第二连接层连接到致动层，并且盖通过第二连接层连接到致动层。此外，由第一基板，第一连接层，致动层，第二连接层和盖形成真空凹部。致动部和第一轴位于真空凹部中，第二轴延伸到真空凹部的外侧。

8. 发明申请

US20050280116A1 Integration manufacturing process for MEMS device 审中-公开
标题翻译： MEMS器件集成制造工艺
公开(公告)号：US20050280116A1
公开(公告)日：2005-12-22
申请号：US11091062
申请日：2005-03-28
申请人： Mingching Wu , Hsueh-An Yang , Hung-Yi Lin , Weileun Fang
发明人： Mingching Wu , Hsueh-An Yang , Hung-Yi Lin , Weileun Fang
IPC分类号： H01L29/00
CPC分类号： B81C1/00301 , B81B2201/042 , B81B2207/097
摘要： A method for manufacturing an MEMS device is provided. The method includes steps of a) providing a first substrate having a concavity located thereon, b) providing a second substrate having a connecting area and an actuating area respectively located thereon, c) forming plural microstructures in the actuating area, d) mounting a conducting element in the connecting area and the actuating area, e) forming an insulating layer on the conducting element and f) connecting the first substrate to the connecting area to form the MEMS device. The concavity contains the plural microstructures.
摘要翻译：提供了一种用于制造MEMS器件的方法。该方法包括以下步骤：a）提供具有位于其上的凹面的第一基底，b）提供具有分别位于其上的连接区域和致动区域的第二基底，c）在致动区域中形成多个微结构，d）在所述连接区域和所述致动区域中的元件，e）在所述导电元件上形成绝缘层，以及f）将所述第一基板连接到所述连接区域以形成所述MEMS器件。凹面包含多个微结构。

9. 发明授权

US08810027B2 Bond ring for a first and second substrate 有权
标题翻译：用于第一和第二衬底的结合环
公开(公告)号：US08810027B2
公开(公告)日：2014-08-19
申请号：US12891062
申请日：2010-09-27
申请人： Chun-Wen Cheng , Hsueh-An Yang
发明人： Chun-Wen Cheng , Hsueh-An Yang
IPC分类号： H01L23/34 , H01L21/30 , H01L21/46
CPC分类号： B81C1/00269 , B81C1/0038 , B81C2203/0118 , B81C2203/019 , H01L23/02 , H01L2924/0002 , H01L2924/00
摘要： The present disclosure provides a device having a plurality of bonded substrates. The substrates are bonded by a first bond ring and a second bond ring. In an embodiment, the first bond ring is a eutectic bond and the second bond ring is at least one of an organic material and a eutectic bond. The second bond ring encircles the first bond ring. The first bond ring provides a hermetic region of the device. In a further embodiment, a plurality of wafers are bonded which include a third bond ring disposed at the periphery of the wafers.
摘要翻译：本公开提供了一种具有多个键合衬底的器件。基板通过第一键环和第二键环键合。在一个实施方案中，第一键环是共晶键，第二键环是有机材料和共晶键中的至少一种。第二个键环围绕第一个结合环。第一粘结环提供该装置的密封区域。在另一实施例中，多个晶片被结合，其包括设置在晶片周边的第三接合环。

10. 发明授权

US08263493B2 Silicon chip having through via and method for making the same 有权
标题翻译：具有通孔的硅芯片及其制造方法
公开(公告)号：US08263493B2
公开(公告)日：2012-09-11
申请号：US12647856
申请日：2009-12-28
申请人： Hsueh-An Yang , Pei-Chun Chen , Chien-Hua Chen
发明人： Hsueh-An Yang , Pei-Chun Chen , Chien-Hua Chen
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/76898
摘要： The present invention relates to a silicon chip having a through via and a method for making the same. The silicon chip includes a silicon substrate, a passivation layer, at least one electrical device and at least one through via. The passivation layer is disposed on a first surface of the silicon substrate. The electrical device is disposed in the silicon substrate, and exposed to a second surface of the silicon substrate. The through via includes a barrier layer and a conductor, and penetrates the silicon substrate and the passivation layer. A first end of the through via is exposed to the surface of the passivation layer, and a second end of the through via connects the electrical device. When a redistribution layer is formed on the surface of the passivation layer, the redistribution layer will not contact the silicon substrate, thus avoiding a short circuit. Therefore, a lower resolution process can be used, which results in low manufacturing cost and simple manufacturing process.
摘要翻译：本发明涉及具有贯通孔的硅芯片及其制造方法。硅芯片包括硅衬底，钝化层，至少一个电器件和至少一个通孔。钝化层设置在硅衬底的第一表面上。电气设备设置在硅衬底中，并暴露于硅衬底的第二表面。通孔包括阻挡层和导体，并且穿透硅衬底和钝化层。通孔的第一端暴露于钝化层的表面，通孔的第二端连接电气装置。当在钝化层的表面上形成再分布层时，再分布层将不会接触硅衬底，从而避免短路。因此，可以使用较低分辨率的工艺，这导致制造成本低和制造工艺简单。

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