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1. 发明申请

US20070066008A1 METHOD OF FABRICATING NON-VOLATILE MEMORY 有权
标题翻译：制造非易失性存储器的方法
公开(公告)号：US20070066008A1
公开(公告)日：2007-03-22
申请号：US11558453
申请日：2006-11-10
申请人： Chien-Lung Chu , Saysamone Pittikoun , Houng-Chi Wei , Wei-Chung Tseng
发明人： Chien-Lung Chu , Saysamone Pittikoun , Houng-Chi Wei , Wei-Chung Tseng
IPC分类号： H01L21/8238
CPC分类号： H01L27/115 , H01L27/11568
摘要： A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the first memory units are filled with a doped polysilicon layer. Thereafter, a portion of the doped polysilicon layer is removed to form trenches. After that, a metallic layer fills the trenches. A portion of the metallic layer is removed to form a plurality of gates. The gates and the composite layer together form a plurality of second memory units. The second memory units and the first memory units together constitute a memory cell column. Then, a source region and a drain region are formed in the substrate adjacent to the two sides of the memory cell column.
摘要翻译：描述了制造非易失性存储器的方法。在衬底上形成多个彼此间隙的第一存储单元。绝缘垫片形成在第一存储器单元的侧壁上。在衬底上形成复合层，并且第一存储单元之间的间隙填充有掺杂的多晶硅层。此后，去除掺杂多晶硅层的一部分以形成沟槽。之后，金属层填充沟槽。去除金属层的一部分以形成多个栅极。门和复合层一起形成多个第二存储单元。第二存储器单元和第一存储器单元一起构成存储单元列。然后，在与存储单元列的两侧相邻的基板中形成源极区域和漏极区域。

2. 发明申请

US20060199333A1 Method of fabricating non-volatile memory 有权
标题翻译：制造非易失性存储器的方法
公开(公告)号：US20060199333A1
公开(公告)日：2006-09-07
申请号：US11161648
申请日：2005-08-11
申请人： Chien-Lung Chu , Saysamone Pittikoun , Houng-Chi Wei , Wei-Chung Tseng
发明人： Chien-Lung Chu , Saysamone Pittikoun , Houng-Chi Wei , Wei-Chung Tseng
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11568
摘要： A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the first memory units are filled with a doped polysilicon layer. Thereafter, a portion of the doped polysilicon layer is removed to form trenches. After that, a metallic layer fills the trenches. A portion of the metallic layer is removed to form a plurality of gates. The gates and the composite layer together form a plurality of second memory units. The second memory units and the first memory units together constitute a memory cell column. Then, a source region and a drain region are formed in the substrate adjacent to the two sides of the memory cell column.
摘要翻译：描述了制造非易失性存储器的方法。在衬底上形成多个彼此间隙的第一存储单元。在第一存储单元的侧壁上形成绝缘间隔物。在衬底上形成复合层，并且第一存储单元之间的间隙填充有掺杂的多晶硅层。此后，去除掺杂多晶硅层的一部分以形成沟槽。之后，金属层填充沟槽。去除金属层的一部分以形成多个栅极。门和复合层一起形成多个第二存储单元。第二存储器单元和第一存储器单元一起构成存储单元列。然后，在与存储单元列的两侧相邻的基板中形成源极区域和漏极区域。

3. 发明授权

US07445993B2 Method of fabricating non-volatile memory 有权
标题翻译：制造非易失性存储器的方法
公开(公告)号：US07445993B2
公开(公告)日：2008-11-04
申请号：US11306254
申请日：2005-12-21
申请人： Wei-Chung Tseng , Houng-Chi Wei , Saysamone Pittikoun
发明人： Wei-Chung Tseng , Houng-Chi Wei , Saysamone Pittikoun
IPC分类号： H01L21/337
CPC分类号： H01L27/105 , H01L27/11526 , H01L27/11534
摘要： A method of fabricating non-volatile memory is provided. A plurality of first memory cells is formed on the memory cell region of a substrate. Each first memory cell comprises a first composite layer, a first gate and a cap layer. There is a gap between two adjacent first memory cells. Then, a plurality of gates is formed in the respective gaps. The gates together with a second composite layer form a plurality of second memory cells. The second memory cells and the first memory cells together constitute a memory cell column. In the meantime, a plurality of gate structures is also formed on the peripheral circuit region. The gates in the gaps and the gates in the peripheral circuit region are fabricated using different conductive layers.
摘要翻译：提供了一种制造非易失性存储器的方法。在基板的存储单元区域上形成多个第一存储单元。每个第一存储单元包括第一复合层，第一栅极和盖层。两个相邻的第一存储单元之间存在间隙。然后，在各个间隙中形成多个栅极。栅极与第二复合层一起形成多个第二存储单元。第二存储单元和第一存储单元一起构成存储单元列。同时，在外围电路区域也形成有多个栅极结构。使用不同的导电层制造间隙中的栅极和外围电路区域中的栅极。

4. 发明授权

US07285463B2 Method of fabricating non-volatile memory 有权
公开(公告)号：US07285463B2
公开(公告)日：2007-10-23
申请号：US11558453
申请日：2006-11-10
申请人： Chien-Lung Chu , Saysamone Pittikoun , Houng-Chi Wei , Wei-Chung Tseng
发明人： Chien-Lung Chu , Saysamone Pittikoun , Houng-Chi Wei , Wei-Chung Tseng
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11568
摘要： A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the first memory units are filled with a doped polysilicon layer. Thereafter, a portion of the doped polysilicon layer is removed to form trenches. After that, a metallic layer fills the trenches. A portion of the metallic layer is removed to form a plurality of gates. The gates and the composite layer together form a plurality of second memory units. The second memory units and the first memory units together constitute a memory cell column. Then, a source region and a drain region are formed in the substrate adjacent to the two sides of the memory cell column.

5. 发明授权

US07226851B2 Method for manufacturing semiconductor device and non-volatile memory 失效
标题翻译：半导体器件和非易失性存储器的制造方法
公开(公告)号：US07226851B2
公开(公告)日：2007-06-05
申请号：US11164134
申请日：2005-11-11
申请人： Chien-Lung Chu , Wei-Chung Tseng , Saysamone Pittikoun , Houng-Chi Wei
发明人： Chien-Lung Chu , Wei-Chung Tseng , Saysamone Pittikoun , Houng-Chi Wei
IPC分类号： H01L21/3205
CPC分类号： H01L27/115 , H01L27/105 , H01L27/11521 , H01L27/11526 , H01L27/11531 , H01L27/11568
摘要： A method for manufacturing semiconductor device is provided. First, a substrate is provided. Then, a plurality of first gate lines disposed in parallel to each other and a first dummy gate line disposed in a direction perpendicular to the first gate lines are formed on the substrate. There is a first gap between the first dummy gate line and the first gate lines and there is a second gap between every pair of adjacent first gate lines. Thereafter, a second composite layer and a conductive layer are sequentially formed over the substrate. The conductive layer is etched back to form a plurality of second device structures that completely fills the second gaps. Then, the conductive layer in the first gap is removed.
摘要翻译：提供一种半导体器件的制造方法。首先，提供基板。然后，在基板上形成彼此平行配置的多个第一栅极线和与第一栅极线垂直的方向配置的第一伪栅极线。在第一虚拟栅极线和第一栅极线之间存在第一间隙，并且在每对相邻的第一栅极线之间存在第二间隙。此后，在衬底上依次形成第二复合层和导电层。将导电层回蚀刻以形成完全填充第二间隙的多个第二器件结构。然后，去除第一间隙中的导电层。

6. 发明申请

US20060286749A1 METHOD OF FABRICATING NON-VOLATILE MEMORY 有权
标题翻译：制造非易失性存储器的方法
公开(公告)号：US20060286749A1
公开(公告)日：2006-12-21
申请号：US11306254
申请日：2005-12-21
申请人： Wei-Chung Tseng , Houng-Chi Wei , Saysamone Pittikoun
发明人： Wei-Chung Tseng , Houng-Chi Wei , Saysamone Pittikoun
IPC分类号： H01L21/336
CPC分类号： H01L27/105 , H01L27/11526 , H01L27/11534
摘要： A method of fabricating non-volatile memory is provided. A plurality of first memory cells is formed on the memory cell region of a substrate. Each first memory cell comprises a first composite layer, a first gate and a cap layer. There is a gap between two adjacent first memory cells. Then, a plurality of gates is formed in the respective gaps. The gates together with a second composite layer form a plurality of second memory cells. The second memory cells and the first memory cells together constitute a memory cell column. In the meantime, a plurality of gate structures is also formed on the peripheral circuit region. The gates in the gaps and the gates in the peripheral circuit region are fabricated using different conductive layers.
摘要翻译：提供了一种制造非易失性存储器的方法。在基板的存储单元区域上形成多个第一存储单元。每个第一存储单元包括第一复合层，第一栅极和盖层。两个相邻的第一存储单元之间存在间隙。然后，在各个间隙中形成多个栅极。栅极与第二复合层一起形成多个第二存储单元。第二存储单元和第一存储单元一起构成存储单元列。同时，在外围电路区域也形成有多个栅极结构。使用不同的导电层制造间隙中的栅极和外围电路区域中的栅极。

7. 发明申请

US20060234446A1 NON-VOLATILE MEMORY AND FABRICATING METHOD THEREOF 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US20060234446A1
公开(公告)日：2006-10-19
申请号：US11162648
申请日：2005-09-18
申请人： Houng-Chi Wei , Saysamone Pittikoun , Wei-Chung Tseng
发明人： Houng-Chi Wei , Saysamone Pittikoun , Wei-Chung Tseng
IPC分类号： H01L21/336
CPC分类号： H01L27/11568 , H01L21/28282 , H01L27/115 , H01L29/66833 , H01L29/792
摘要： A method of fabricating a non-volatile memory is provided. A memory cell array having first memory units and second memory units is formed on a substrate. Then, a source region and a drain region are formed in the substrate on the respective sides of the memory cell array. Next, a patterned first inter-layer insulating layer is formed on the substrate to form a first trench and a plurality of second trenches. A conductive layer is formed on the substrate to form a source line in the first trench and conductive lines in the second trenches. A second inter-layer insulating layer is formed on the substrate and then a conductive plug having contact with the drain region is formed in the second inter-layer insulating layer and the first inter-layer insulating layer. Then, a bit line having contact with the conductive plug is formed on the second inter-layer insulating layer.
摘要翻译：提供了一种制造非易失性存储器的方法。具有第一存储单元和第二存储单元的存储单元阵列形成在衬底上。然后，在存储单元阵列的各个侧面上的基板中形成源极区域和漏极区域。接下来，在基板上形成图案化的第一层间绝缘层，以形成第一沟槽和多个第二沟槽。导电层形成在基板上，以在第一沟槽中形成源极线，并在第二沟槽中形成导电线。在衬底上形成第二层间绝缘层，然后在第二层间绝缘层和第一层间绝缘层中形成与漏区接触的导电插塞。然后，在第二层间绝缘层上形成与导电插头接触的位线。

8. 发明授权

US07442998B2 Non-volatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US07442998B2
公开(公告)日：2008-10-28
申请号：US11162648
申请日：2005-09-18
申请人： Houng-Chi Wei , Saysamone Pittikoun , Wei-Chung Tseng
发明人： Houng-Chi Wei , Saysamone Pittikoun , Wei-Chung Tseng
IPC分类号： H01L29/78
CPC分类号： H01L27/11568 , H01L21/28282 , H01L27/115 , H01L29/66833 , H01L29/792
摘要： A method of fabricating a non-volatile memory is provided. A memory cell array having first memory units and second memory units is formed on a substrate. Then, a source region and a drain region are formed in the substrate on the respective sides of the memory cell array. Next, a patterned first inter-layer insulating layer is formed on the substrate to form a first trench and a plurality of second trenches. A conductive layer is formed on the substrate to form a source line in the first trench and conductive lines in the second trenches. A second inter-layer insulating layer is formed on the substrate and then a conductive plug having contact with the drain region is formed in the second inter-layer insulating layer and the first inter-layer insulating layer. Then, a bit line having contact with the conductive plug is formed on the second inter-layer insulating layer.
摘要翻译：提供了一种制造非易失性存储器的方法。具有第一存储单元和第二存储单元的存储单元阵列形成在衬底上。然后，在存储单元阵列的各个侧面上的基板中形成源极区域和漏极区域。接下来，在基板上形成图案化的第一层间绝缘层，以形成第一沟槽和多个第二沟槽。导电层形成在基板上，以在第一沟槽中形成源极线，并在第二沟槽中形成导电线。在衬底上形成第二层间绝缘层，然后在第二层间绝缘层和第一层间绝缘层中形成与漏区接触的导电插塞。然后，在第二层间绝缘层上形成与导电插头接触的位线。

9. 发明授权

US07285450B2 Method of fabricating non-volatile memory 有权
标题翻译：制造非易失性存储器的方法
公开(公告)号：US07285450B2
公开(公告)日：2007-10-23
申请号：US11306248
申请日：2005-12-21
申请人： Wei-Chung Tseng , Houng-Chi Wei , Saysamone Pittikoun
发明人： Wei-Chung Tseng , Houng-Chi Wei , Saysamone Pittikoun
IPC分类号： H01L21/337
CPC分类号： H01L27/105 , H01L27/11526 , H01L27/11534
摘要： A method of fabricating non-volatile memory is provided. A plurality of first memory cells is formed on the memory cell region of a substrate. Each first memory cell includes a first composite layer, a first gate and a cap layer. There is a gap between two adjacent first memory cells. Then, a plurality of gates is formed in the respective gaps. The gates together with a second composite layer form a plurality of second memory cells. The second memory cells and the first memory cells together constitute a memory cell column. In the meantime, a plurality of gate structures is also formed on the peripheral circuit region. The gates in the gaps and the gates in the peripheral circuit region are formed using the same conductive layers.
摘要翻译：提供了一种制造非易失性存储器的方法。在基板的存储单元区域上形成多个第一存储单元。每个第一存储单元包括第一复合层，第一栅极和盖层。两个相邻的第一存储单元之间存在间隙。然后，在各个间隙中形成多个栅极。栅极与第二复合层一起形成多个第二存储单元。第二存储单元和第一存储单元一起构成存储单元列。同时，在外围电路区域也形成有多个栅极结构。使用相同的导电层形成间隙中的栅极和外围电路区域中的栅极。

10. 发明申请

US20060286752A1 METHOD OF FABRICATING NON-VOLATILE MEMORY 有权
标题翻译：制造非易失性存储器的方法
公开(公告)号：US20060286752A1
公开(公告)日：2006-12-21
申请号：US11306248
申请日：2005-12-21
申请人： Wei-Chung Tseng , Houng-Chi Wei , Saysamone Pittikoun
发明人： Wei-Chung Tseng , Houng-Chi Wei , Saysamone Pittikoun
IPC分类号： H01L21/336
CPC分类号： H01L27/105 , H01L27/11526 , H01L27/11534
摘要： A method of fabricating non-volatile memory is provided. A plurality of first memory cells is formed on the memory cell region of a substrate. Each first memory cell includes a first composite layer, a first gate and a cap layer. There is a gap between two adjacent first memory cells. Then, a plurality of gates is formed in the respective gaps. The gates together with a second composite layer form a plurality of second memory cells. The second memory cells and the first memory cells together constitute a memory cell column. In the meantime, a plurality of gate structures is also formed on the peripheral circuit region. The gates in the gaps and the gates in the peripheral circuit region are formed using the same conductive layers.
摘要翻译：提供了一种制造非易失性存储器的方法。在基板的存储单元区域上形成多个第一存储单元。每个第一存储单元包括第一复合层，第一栅极和盖层。两个相邻的第一存储单元之间存在间隙。然后，在各个间隙中形成多个栅极。栅极与第二复合层一起形成多个第二存储单元。第二存储单元和第一存储单元一起构成存储单元列。同时，在外围电路区域也形成有多个栅极结构。使用相同的导电层形成间隙中的栅极和外围电路区域中的栅极。

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