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1. 发明授权

US4635099A Apparatus for detecting nonstandard video signals 失效
标题翻译：用于检测非标准视频信号的装置
公开(公告)号：US4635099A
公开(公告)日：1987-01-06
申请号：US697907
申请日：1985-02-04
申请人： Warren H. Nicholson , Walter E. Sepp
发明人： Warren H. Nicholson , Walter E. Sepp
IPC分类号： H04N11/22 , H04N7/01 , H04N9/44 , H04N9/77 , H04N9/78 , H04N11/04 , H04N5/04
CPC分类号： H04N9/44
摘要： Circuitry for detecting nonstandard video signals is disclosed. This circuitry is used in a sampled data video signal processing system to control signal processing steps which utilize a frame store memory. The detecting circuitry includes a programmable counter which generates a standard horizontal pulse signal having a 70 ns pulse width by counting down a sampling clock signal that has a frequency proportional to the color subcarrier frequency of the video signals. The circuitry generates another horizontal pulse signal having a pulse width of less than 140 ns from the horizontal sync pulses of the input video signals. These pulse signals are compared in a coincidence detector which produces a signal that is in a first state when the pulses of the two signals overlap at least once in every twenty-five horizontal line times and in a second state otherwise. This coincidence signal and the field rate vertical synchronizing signal from the input video signal are used to generate the control signal for the frame store memory. This control signal is in a first state when the coincidence signal has been in its first state for at least one frame time and that changes to a second state when the coincidence signal changes to its second state.
摘要翻译：公开了用于检测非标准视频信号的电路。该电路用于采样数据视频信号处理系统以控制利用帧存储器的信号处理步骤。检测电路包括可编程计数器，其通过对具有与视频信号的彩色副载波频率成比例的频率的采样时钟信号进行下降来产生具有70ns脉冲宽度的标准水平脉冲信号。电路产生另一个水平脉冲信号，其脉冲宽度小于输入视频信号的水平同步脉冲的140ns。这些脉冲信号在符合检测器中进行比较，当两个信号的脉冲在每二十五个水平行时间中至少重叠一次时，产生处于第一状态的信号，否则在第二状态。来自输入视频信号的该符合信号和场速垂直同步信号用于产生帧存储器的控制信号。当一致信号已经处于其第一状态至少一帧时间时，该控制信号处于第一状态，并且当一致信号变为其第二状态时，该控制信号变为第二状态。

2. 发明授权

US4558347A Progressive scan television system employing vertical detail enhancement 失效
标题翻译：逐行扫描电视系统采用垂直细节增强
公开(公告)号：US4558347A
公开(公告)日：1985-12-10
申请号：US526702
申请日：1983-08-26
申请人： Dalton H. Pritchard , Walter E. Sepp
发明人： Dalton H. Pritchard , Walter E. Sepp
IPC分类号： H04N11/20 , H04N5/44 , H04N7/01 , H04N5/14
CPC分类号： H04N7/012 , H04N7/0135
摘要： A flat-field television image having reduced visibility of horizontal scan lines is generated by receiving first and second fields of interlaced video and progressively generating a scanned image within a time for one incoming field. The progressive scanned image is formed from "real" and interpolated lines of luminance. In this arrangement the interpolated line is formed by weighting samples from time-successive lines. To improve the vertical detail of a progressively scanned image vertical detail information which may be obtained from the chrominance channel is combined with both "real" and interpolated lines, or one to the exclusion of the other, to enhance the image displayed.
摘要翻译：通过在一个输入场的时间内接收第一和第二隔行扫描视频并逐渐生成扫描图像，产生具有降低的水平扫描线的可视性的平场电视图像。逐行扫描图像由“实际”和内插的亮度线形成。在这种布置中，通过从时间连续的行加权样本来形成内插线。为了提高可以从色度通道获得的逐渐扫描的图像垂直细节信息的垂直细节与“实际”和插入的线相结合，或者一个排除另一个，以增强显示的图像。

3. 发明授权

US4562458A Circuit for coupling a three terminal filter to a signal path using one interface connection 失效
标题翻译：使用一个接口连接将三端子滤波器耦合到信号路径的电路
公开(公告)号：US4562458A
公开(公告)日：1985-12-31
申请号：US470618
申请日：1983-02-28
申请人： Walter E. Sepp
发明人： Walter E. Sepp
IPC分类号： H03H7/01 , H03H11/04 , H04N9/64 , H04N9/66 , H03H11/00
CPC分类号： H04N9/64 , H03H11/04
摘要： An electrical signal processing network includes a high order, two port, three terminal filter, and means coupled to the filter for synthesizing, at a single terminal, an impedance exhibiting the transfer function of the filter. The synthesized impedance can be coupled to a single point in a signal path for filtering signals in accordance with the transfer function of the filter.
摘要翻译：电信号处理网络包括高阶二端口三端滤波器和耦合到滤波器的装置，用于在单个端子处合成呈现滤波器传递函数的阻抗。合成阻抗可以耦合到信号路径中的单个点，以根据滤波器的传递函数对信号进行滤波。

4. 发明授权

US4616251A Progressive scan television system employing a comb filter 失效
标题翻译：逐行扫描电视系统采用梳状滤波器
公开(公告)号：US4616251A
公开(公告)日：1986-10-07
申请号：US793314
申请日：1985-10-31
申请人： Dalton H. Pritchard , Walter E. Sepp
发明人： Dalton H. Pritchard , Walter E. Sepp
IPC分类号： H04N5/44 , H04N7/01 , H04N11/20
CPC分类号： H04N7/012 , H04N7/0135
摘要： A flat-field television image having reduced visibility of horizontal scan lines is generated by receiving first and second fields of interlaced video and progressively generating a scanned image within a time for one incoming field. The progressive scanned image is formed from "real" and interpolated lines of luminance. In this arrangement the interpolated line is formed by weighting samples from time-successive lines. To improve the vertical detail of a progressively scanned image vertical detail information which may be obtained from the chrominance channel is combined with both "real" and interpolated lines, or one to the exclusion of the other, to enhance the image displayed.
摘要翻译：通过在一个输入场的时间内接收第一和第二隔行扫描视频并逐渐生成扫描图像，产生具有降低的水平扫描线的可视性的平场电视图像。逐行扫描图像由“实际”和内插的亮度线形成。在这种布置中，通过从时间连续的行加权样本来形成内插线。为了提高可以从色度通道获得的逐渐扫描的图像垂直细节信息的垂直细节与“实际”和插入的线相结合，或者一个排除另一个，以增强显示的图像。

5. 发明授权

US4550336A Progressive scan speed-up processor 失效
标题翻译：逐行扫描加速处理器
公开(公告)号：US4550336A
公开(公告)日：1985-10-29
申请号：US526701
申请日：1983-08-26
申请人： Walter E. Sepp
发明人： Walter E. Sepp
IPC分类号： H04N11/20 , H04N5/44 , H04N9/535
CPC分类号： H04N7/012
摘要： A flat-field television image having reduced visibility of horizontal scan lines is generated by receiving first and second fields of interlaced video and progressively generating a scanned image within a time period for one incoming field. The progressively scanned image is formed from "real" and interpolated lines of luminance. In this arrangement a speed-up processor is provided for generating the high speed output. The speed-up processor incorporates an input sequence device, a storage device and an output sequence device. In the implementation the input sequence device rearranges the original data stream such that samples from the input data stream are stored in the rearranged sequence. The output sequence means selects the samples from the storage device such that the output samples are restored to their original sequence and provided at the faster rate.
摘要翻译：通过在一个输入场的时间段内接收第一和第二隔行扫描视频并逐渐生成扫描图像，产生具有降低的水平扫描线可见度的平场电视图像。渐进扫描的图像由“实际”和内插的亮度线形成。在这种布置中，提供了用于产生高速输出的加速处理器。加速处理器包括输入序列设备，存储设备和输出序列设备。在实现中，输入序列装置重新排列原始数据流，使得来自输入数据流的样本以重新排列的顺序存储。输出序列意味着从存储设备中选择样本，使得输出样本恢复到其原始序列并以更快的速率提供。

6. 发明授权

US4422052A Delay circuit employing active bandpass filter 失效
标题翻译：采用有源带通滤波器的延迟电路
公开(公告)号：US4422052A
公开(公告)日：1983-12-20
申请号：US268374
申请日：1981-05-29
申请人： Bernard J. Yorkanis , Walter E. Sepp
发明人： Bernard J. Yorkanis , Walter E. Sepp
IPC分类号： H03H11/12 , H03H11/26 , H04N9/77
CPC分类号： H04N9/77 , H03H11/1213 , H03H11/26
摘要： A signal to be delayed is applied to a frequency selective path including an inverting active bandpass filter and to a non-frequency selective path including a voltage-to-current converter. The paths are coupled to a signal combiner which produces an output current having a first component proportional to the output current of the converter and a second component directly proportional to the filter output voltage and inversely proportional to the value of a gain control resistor. The resistor is selected to provide a predetermined ratio of the output current components to provide an overall allpass characteristic for the delay circuit and biased to conduct no current under quiescent signal conditions thereby reducing power dissipation. Several circuits may be cascaded for such purposes as peaking and delay equalization in television receivers, video disc players or the like.
摘要翻译：要延迟的信号被施加到包括反相有源带通滤波器的频率选择路径和包括电压 - 电流转换器的非频率选择路径。这些路径被耦合到信号组合器，该信号组合器产生具有与转换器的输出电流成比例的第一分量的输出电流和与滤波器输出电压成比例的第二分量，并与增益控制电阻器的值成反比。选择电阻器以提供输出电流分量的预定比率以提供用于延迟电路的总体全通特性，并且被偏置以在静态信号条件下不导通电流，从而降低功耗。可以将多个电路级联以用于电视接收机，视频盘播放器等中的峰化和延迟均衡。

7. 发明授权

US4573068A Video signal processor for progressive scanning 失效
标题翻译：用于逐行扫描的视频信号处理器
公开(公告)号：US4573068A
公开(公告)日：1986-02-25
申请号：US591996
申请日：1984-03-21
申请人： Denis P. Dorsey , Walter E. Sepp , Dalton H. Pritchard
发明人： Denis P. Dorsey , Walter E. Sepp , Dalton H. Pritchard
IPC分类号： H04N11/20 , H04N5/44 , H04N9/64 , H04N9/67 , H04N11/04
CPC分类号： H04N9/641 , H04N7/012
摘要： In a video signal processor for a progressive scanning system, an interlaced composite video signal, repeating at an f.sub.H line rate of approximately 16 KHz, is coupled to a comb filter. Separated luminance and chrominance signals are developed at respective output terminals of the comb filter. The chrominance signal is demodulated to develop color mixture signals. The luminance and color mixture signals are applied to a color matrix for generating a first set of R, G, B color signals, with each signal repeating at the f.sub.H line rate. A time compression circuit is coupled to the output of the color matrix for time compressing the R, G, B color signals to generate a comparable set of three time compressed and processed color signals, with each time compressed signal repeating at a double line rate of 2f.sub.H. The video signal processor is also capable of converting f.sub.H line rate, interlaced R, G, B signals, obtained from an external video source, into double line rate, non-interlaced signals. A switching arrangement is coupled to the color matrix, the external source and the time compression circuit to selectively apply to the time compression circuit, either the R, G, B signals derived from the source of the composite video signal or those directly obtained from the external source.
摘要翻译：在用于逐行扫描系统的视频信号处理器中，以大约16KHz的fH线路速率重复的隔行复合视频信号耦合到梳状滤波器。分离的亮度和色度信号在梳状滤波器的各个输出端产生。色度信号被解调以产生混色信号。亮度和混色信号被施加到颜色矩阵，用于产生第一组R，G，B彩色信号，每个信号以fH线速率重复。时间压缩电路耦合到彩色矩阵的输出端，用于对R，G，B颜色信号进行时间压缩，以产生可比较的三组压缩和处理的颜色信号，每个时间压缩信号以双线速率 2fH。视频信号处理器还能够将从外部视频源获得的fH线速率，隔行扫描R，G，B信号转换为双线速率，非隔行扫描信号。切换装置耦合到彩色矩阵，外部源和时间压缩电路，以选择性地将时间压缩电路应用于从复合视频信号源或从直接获得的R，G，B信号中得到的R，G，B信号外部来源。

8. 发明授权

US4224638A Frequency multiplier for use with CCD comb filter 失效
标题翻译：用于CCD梳状滤波器的倍频器
公开(公告)号：US4224638A
公开(公告)日：1980-09-23
申请号：US38291
申请日：1979-05-11
申请人： Dalton H. Pritchard , Walter E. Sepp , William A. Lagoni
发明人： Dalton H. Pritchard , Walter E. Sepp , William A. Lagoni
IPC分类号： H03B19/00 , H03B19/14 , H03B19/16 , H04N9/78 , H04N9/535
CPC分类号： H04N9/78
摘要： Frequency multiplier includes common-emitter input amplifying stage receiving fundamental frequency input signals at input transistor base. Output amplifying stage has output transistor with its base linked to input transistor collector, and with its collector coupled to narrow band load circuit tuned to a selected harmonic frequency. Emitter circuit of output transistor includes parallel resonant circuit tuned to input signal fundamental frequency. Non-linear negative feedback path between output transistor emitter and input transistor base includes capacitor in series with paralleled, oppositely poled diodes.
摘要翻译：倍频器包括输入晶体管基极处的共射极输入放大级接收基频输入信号。输出放大级具有输出晶体管，其基极连接到输入晶体管集电极，并且其集电极耦合到窄带负载电路，调谐到选定的谐波频率。输出晶体管的发射极电路包括调谐到输入信号基频的并联谐振电路。输出晶体管发射极和输入晶体管基极之间的非线性负反馈路径包括与并联的相反极化二极管串联的电容器。

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