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1. 发明授权

US5787001A Method for using sorting techniques in a type-safe way 失效
标题翻译：以类型安全的方式使用排序技术的方法
公开(公告)号：US5787001A
公开(公告)日：1998-07-28
申请号：US504626
申请日：1995-07-20
申请人： Walter C. Dietrich, Jr. , Thomas Robert Ervolina , John Peter Fasano , Jung-Mu Tang
发明人： Walter C. Dietrich, Jr. , Thomas Robert Ervolina , John Peter Fasano , Jung-Mu Tang
IPC分类号： G06F9/44 , G06F9/45 , G06F11/00 , G06F9/00
CPC分类号： G06F8/437 , G06F9/4428
摘要： A method for invoking an arbitrary sorting technique in a type-safe way. In one aspect, the method comprises the steps of providing a hierarchical schedule class comprising a schedule float subclass and a sorting schedule float subclass, subsumed by the schedule float subclass. The sorting schedule float subclass, in turn, comprises a schedule attribute class; a filter class; and a pair compare class. The method further includes using the hierarchical schedule class with each of an independent group consisting of a schedule attribute strategy, a filter strategy and a pair compare class strategy.
摘要翻译：一种以类型安全的方式调用任意排序技术的方法。一方面，该方法包括以下步骤：提供包括由调度浮动子类所包含的调度浮动子类和排序调度浮动子类的分级调度类。排序调度浮动子类依次包含调度属性类; 一个过滤器类; 和一对比较班。该方法还包括使用分层调度类与由调度属性策略，过滤器策略和对比较类策略组成的独立组中的每一个。

2. 发明授权

US5787283A Framework for manufacturing logistics decision support 失效
标题翻译：制造物流决策支持框架
公开(公告)号：US5787283A
公开(公告)日：1998-07-28
申请号：US549591
申请日：1995-10-27
申请人： Goodwin R. Chin , Walter C. Dietrich, Jr. , Thomas Robert Ervolina , John Peter Fasano , Elizabeth Jodi Poole , Jung-Mu Tang
发明人： Goodwin R. Chin , Walter C. Dietrich, Jr. , Thomas Robert Ervolina , John Peter Fasano , Elizabeth Jodi Poole , Jung-Mu Tang
IPC分类号： G05B13/02 , B65G61/00 , G05B19/418 , G06F9/44 , G06F19/00 , G06Q10/06 , G06Q90/00 , G06F17/60
CPC分类号： G06Q10/06 , G06Q10/063 , Y10S706/919 , Y10S706/92 , Y10S706/925 , Y10S707/99945 , Y10S707/99948
摘要： A tool including a framework suitable for manufacturing logistics decision support. The tool comprises means for providing an object-oriented technology framework, the framework comprising: means for defining objects representing manufacturing logistics problems; means for transforming a subject of the above objects into representations commonly used in a mathematical solver, wherein the representations in the solver have predefined relationships based on their properties; and, means responsive to selective changes in the objects for modifying the behavior of the framework for developing anew manufacturing logistics decision support application.
摘要翻译：一个工具，包括一个适合制造物流决策支持的框架。该工具包括用于提供面向对象技术框架的装置，所述框架包括：用于定义表示制造物流问题的对象的装置; 用于将上述对象的主题变换为数学求解器中通常使用的表示的手段，其中所述求解器中的表示基于其属性具有预定义的关系; 并且，意味着响应于对象中的选择性变化来修改用于开发新的制造物流决策支持应用的框架的行为。

3. 发明授权

US5739824A Method and apparatus for conveying higher-dimensional tabular information to people using lower-dimensional output devices 失效
标题翻译：使用较低维输出设备将更高维表格信息传送给人的方法和设备
公开(公告)号：US5739824A
公开(公告)日：1998-04-14
申请号：US781078
申请日：1997-01-09
申请人： Brenda Lynn Dietrich , Walter C. Dietrich, Jr. , Elizabeth Jodi Poole , John Peter Fasano , Jung-Mu Tang
发明人： Brenda Lynn Dietrich , Walter C. Dietrich, Jr. , Elizabeth Jodi Poole , John Peter Fasano , Jung-Mu Tang
IPC分类号： G06Q10/00 , G06F17/21 , G06T11/20 , G06F3/14
CPC分类号： G06F17/211 , G06T11/206
摘要： The invention discloses an apparatus for conveying higher dimensional tabular information to people using a lower dimensional output device. The apparatus is such that original information in the higher dimensional expression can be mapped to the lower dimensional output device, while preserving invariant a content and relationship of the original information.
摘要翻译：本发明公开了一种用于使用较低维度输出装置向较高维度表格信息传送给人的装置。该装置使得较高维度表达式中的原始信息可以映射到较低维度输出设备，同时保留原始信息的内容和关系的不变性。

4. 发明授权

US06282318B1 Method and system for combining pattern matching and optimization 失效
标题翻译：组合模式匹配和优化的方法和系统
公开(公告)号：US06282318B1
公开(公告)日：2001-08-28
申请号：US09070322
申请日：1998-04-30
申请人： Brenda Lynn Dietrich , Walter C. Dietrich, Jr.
发明人： Brenda Lynn Dietrich , Walter C. Dietrich, Jr.
IPC分类号： G06K962
CPC分类号： G06F7/02 , G06F2207/025
摘要： A method for combining pattern matching and optimization. The method includes the steps of reading the data elements and corresponding attributes for each of the two data files; performing pattern matching on the elements and the corresponding attributes of each of the two files read in this step; performing optimization on the results for finding a best total matching of the elements of the two files; and, outputting a file selected from the group consisting of the matches produced by step 3, and a file containing the elements that are not matched.
摘要翻译：一种组合模式匹配和优化的方法。该方法包括读取两个数据文件中的每一个的数据元素和对应属性的步骤; 对该步骤中读取的两个文件中的每个元素执行模式匹配以及相应的属性; 对结果执行优化，以找到两个文件的元素的最佳匹配; 并且输出从由步骤3产生的匹配组成的组中选择的文件和包含不匹配的元素的文件。

5. 发明授权

US5457789A Method and apparatus for performing memory protection operations in a single instruction multiple data system 失效
标题翻译：在单个指令多数据系统中执行存储器保护操作的方法和装置
公开(公告)号：US5457789A
公开(公告)日：1995-10-10
申请号：US20870
申请日：1993-02-19
申请人： Walter C. Dietrich, Jr. , Mark A. Lavin , Hungwen Li , Ming-Cheng Sheng
发明人： Walter C. Dietrich, Jr. , Mark A. Lavin , Hungwen Li , Ming-Cheng Sheng
IPC分类号： G06F9/38 , G06F9/50 , G06F11/10 , G06F12/14 , G06F15/16 , G06F15/80
CPC分类号： G06F9/5016 , G06F11/10 , G06F12/1483
摘要： In a multiprocessor system, memory accesses by the individual processing elements are checked by a common controller. The controller includes a table of values defining valid memory locations for a task. The controller verifies the address value used by each instruction to ensure that, it is within a valid memory area for the particular task. Additional circuitry for the controller and processing elements allows finer control, of memory accessibility. The multiprocessor system may be coupled to a host computer through a buffer. Data is serially written into the buffer by the host and is read out of the buffer in parallel by the multiprocessor system. The buffer used in this system includes apparatus which calculates an error correction code from a serial data stream and passes this code, along with the data, to the multiprocessor system. The multiprocessor system includes apparatus which processes the data in parallel to handle errors occurring during transfers as indicated by the code.
摘要翻译：在多处理器系统中，各个处理元件的存储器访问由公共控制器检查。控制器包括定义任务的有效内存位置的值的表格。控制器验证每个指令使用的地址值，以确保它在特定任务的有效内存区域内。用于控制器和处理元件的附加电路允许更好的控制存储器可访问性。多处理器系统可以通过缓冲器耦合到主计算机。数据由主机串行写入缓冲区，并由多处理器系统并行读出缓冲区。该系统中使用的缓冲器包括从串行数据流计算纠错码并将该代码连同该数据传送到多处理器系统的装置。多处理器系统包括并行处理数据以处理由代码所示的传输期间发生的错误的装置。

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