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    • 5. 发明申请
    • Noise-tolerant signaling schemes supporting simplified timing and data recovery
    • 支持简化时序和数据恢复的耐噪声信令方案
    • US20050135489A1
    • 2005-06-23
    • US10739823
    • 2003-12-17
    • Andrew HoVladimir StojanovicFred ChenElad AlonMark Horowitz
    • Andrew HoVladimir StojanovicFred ChenElad AlonMark Horowitz
    • G06F13/40H03K19/003H04L5/20H04L12/56H04B3/00
    • H04L47/10H04L5/20H04L25/0276
    • Described are communication systems that convey differential and common-mode signals over the same differential channel. Noise-tolerant communication schemes use low-amplitude common-mode signals that are easily rejected by differential receivers, thus allowing for very high differential data rates. Some embodiments employ the common-mode signals to transmit backchannel signals for adjusting the characteristics of the differential transmitter. Backchannel control signals are effectively conveyed even if the forward channel transmitter is so maladjusted that the received differential data is unrecognizable. Systems in accordance with the above-described embodiments obtain these advantages without additional pins or communications channels, and are compatible with both AC-coupled and DC-coupled communications channels. Data coding schemes and corresponding data recovery circuits eliminate the need for complex, high-speed CDR circuits.
    • 描述了通过相同的差分通道传送差分和共模信号的通信系统。 耐噪声通信方案使用容易被差分接收机拒绝的低振幅共模信号,从而允许非常高的差分数据速率。 一些实施例采用共模信号来发送用于调整差分发射机的特性的反向信道信号。 即使前向信道发射机被调整不正确,接收到的差分数据是无法识别的,反向信道控制信号也被有效地传送。 根据上述实施例的系统在没有附加引脚或通信信道的情况下获得这些优点,并且与AC耦合和DC耦合通信信道兼容。 数据编码方案和相应的数据恢复电路不需要复杂的高速CDR电路。
    • 10. 发明申请
    • Equalizing transceiver with reduced parasitic capacitance
    • 均衡收发器具有降低的寄生电容
    • US20060091930A1
    • 2006-05-04
    • US11251139
    • 2005-10-14
    • Fred ChenVladimir Stojanovic
    • Fred ChenVladimir Stojanovic
    • G06G7/12
    • H04L25/03885
    • A signaling circuit having reduced parasitic capacitance. The signaling circuit includes a plurality of driver circuits each having an output coupled to a first output node, and a plurality of select circuits each having an output coupled to a control input of a corresponding one of the driver circuits. Each of the select circuits includes a control input to receive a respective select signal and a plurality of data inputs to receive a plurality of data signals. Each of the select circuits is adapted to select, according to the respective select signal, one of the plurality of data signals to be output to the control input of the corresponding one of the driver circuits.
    • 具有降低的寄生电容的信令电路。 信令电路包括多个驱动器电路,每个驱动器电路各自具有耦合到第一输出节点的输出,以及多个选择电路,每个选择电路具有耦合到相应的一个驱动器电路的控制输入的输出。 每个选择电路包括用于接收相应选择信号的控制输入和用于接收多个数据信号的多个数据输入。 每个选择电路适于根据相应的选择信号选择要输出到对应的一个驱动器电路的控制输入的多个数据信号之一。