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1. 发明授权

US06624005B1 Semiconductor memory cards and method of making same 有权
标题翻译：半导体存储卡及其制造方法
公开(公告)号：US06624005B1
公开(公告)日：2003-09-23
申请号：US09656253
申请日：2000-09-06
申请人： Vincent DiCaprio , Kenneth Kaskoun
发明人： Vincent DiCaprio , Kenneth Kaskoun
IPC分类号： H01L2156
CPC分类号： H01L25/50 , H01L21/561 , H01L23/3121 , H01L23/49855 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L2224/05554 , H01L2224/05599 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/49175 , H01L2224/73265 , H01L2224/85399 , H01L2224/97 , H01L2225/0651 , H01L2225/06579 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01074 , H01L2924/181 , H01L2924/19043 , H01L2924/19105 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： Alternative methods for making memory cards for computers and such eliminate a need for a separate external housing and a separate chip encapsulation step and enable more memory to be packaged in a same-sized card. One of said methods includes providing a substrate having opposite first and second surfaces with a memory chip mounted on and in electrical connection with a first surface of said substrate. Said second surface of said substrate is temporarily attached to a first surface of a flat carrier sheet, e.g., an adhesive tape. In one embodiment, a mold having a cavity therein is placed on said first surface of said carrier sheet such that said chip and said first surface of said substrate are enclosed in said cavity between said mold and said carrier sheet. A fluid plastic is introduced into said cavity and cured to encapsulate said chip and at least said first surface of said substrate in a protective, monolithic body of hardened plastic. A completed card is then detached from said carrier sheet.
摘要翻译：为计算机制造存储卡等的替代方法不需要单独的外壳和单独的芯片封装步骤，并且能够将更多的存储器封装在相同尺寸的卡中。所述方法之一包括提供具有相对的第一和第二表面的基板，其具有安装在所述基板的第一表面上且与所述基板的第一表面电连接的存储芯片。所述基板的所述第二表面临时附接到平坦载体片材的第一表面，例如胶带。在一个实施例中，其中具有空腔的模具放置在所述载体片的所述第一表面上，使得所述基片的所述芯片和所述第一表面被封闭在所述模具和所述载体片材之间的所述空腔中。将流体塑料引入所述空腔中并固化以将所述芯片和所述基板的至少所述第一表面封装在保护性整体硬化塑料体中。然后将完成的卡片从所述载体片材上分离。

2. 发明授权

US08258613B1 Semiconductor memory card 有权
标题翻译：半导体存储卡
公开(公告)号：US08258613B1
公开(公告)日：2012-09-04
申请号：US10634541
申请日：2003-08-04
申请人： Vincent DiCaprio , Kenneth Kaskoun
发明人： Vincent DiCaprio , Kenneth Kaskoun
IPC分类号： H01L23/02
CPC分类号： H01L25/50 , H01L21/561 , H01L23/3121 , H01L23/49855 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L2224/05554 , H01L2224/05599 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/49175 , H01L2224/73265 , H01L2224/85399 , H01L2224/97 , H01L2225/0651 , H01L2225/06579 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01074 , H01L2924/181 , H01L2924/19043 , H01L2924/19105 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package for a semiconductor chip, e.g., a memory chip, is disclosed. The semiconductor package includes a substrate having a generally rectangular perimeter with four sidewalls and a chamfer between adjacent first and second ones of the sidewalls. The memory chip is electrically coupled contacts provided on an opposite surface of the substrate. The contacts are in a row along only the one sidewall of the substrate. A body of a plastic encapsulant covers the first surface of the substrate, the memory chip, and at least two of the sidewalls of the package. The entire perimeter of the substrate, including all four sidewalls and the chamfer, are covered by the plastic encapsulant. Alternatively, only two or three of the sidewalls are covered by the plastic encapsulant, with the other sidewall(s) being exposed and vertically coplanar with a respective sidewall of the plastic encapsulant.
摘要翻译：公开了一种用于半导体芯片的半导体封装，例如存储芯片。半导体封装包括具有大致矩形的周边的基板，其具有四个侧壁和在相邻的第一和第二侧壁之间的倒角。存储器芯片是设置在衬底的相对表面上的电耦合触点。触点沿着衬底的一个侧壁成一行。塑料密封剂的主体覆盖衬底的第一表面，存储器芯片以及封装的至少两个侧壁。衬底的整个周边，包括所有四个侧壁和倒角，都被塑料密封剂覆盖。或者，只有两个或三个侧壁被塑料密封剂覆盖，其他侧壁被暴露并与塑料密封剂的相应侧壁垂直共面。

3. 发明申请

US20050205979A1 Semiconductor package and method for fabricating the same 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US20050205979A1
公开(公告)日：2005-09-22
申请号：US11129596
申请日：2005-05-13
申请人： Won Shin , Do Chun , Seon Lee , Il Shim , Vincent DiCaprio
发明人： Won Shin , Do Chun , Seon Lee , Il Shim , Vincent DiCaprio
IPC分类号： H01L23/12 , H01L23/02 , H01L23/13 , H01L23/31 , H01L23/498 , H01L25/065 , H01L25/07 , H01L25/10 , H01L25/18
CPC分类号： H01L24/97 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/26175 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06555 , H01L2225/06568 , H01L2225/06586 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01079 , H01L2924/07802 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/1532 , H01L2924/15321 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
摘要： A semiconductor package and method for fabricating the same is disclosed. In one embodiment, the semiconductor package includes a circuit board, at least two semiconductor chips, electric connection means, an encapsulant, and a plurality of conductive balls. The circuit board has a resin layer and a circuit pattern. The resin layer is provided with an opening at its center portion. The circuit pattern is formed on at least one of upper and lower surfaces of the resin layer and includes one or more bond fingers and ball lands exposed to the outside. The semiconductor chips have a plurality of input/output pads on an active surface thereof. The semiconductor chips are stacked at a position of the opening of the circuit board, with at least one of the chips being within the opening. Alternatively, both chips are in the opening. The electric connection means connects the input/output pads of the semiconductor chips to the bond fingers of the circuit board. The encapsulant surrounds the semiconductor chips so as to protect the chips from the external environment. The conductive balls are fusion-bonded on the ball lands of the circuit board.
摘要翻译：公开了半导体封装及其制造方法。在一个实施例中，半导体封装包括电路板，至少两个半导体芯片，电连接装置，密封剂和多个导电球。电路板具有树脂层和电路图案。树脂层在其中心部分设置有开口。电路图案形成在树脂层的上表面和下表面中的至少一个上，并且包括暴露于外部的一个或多个粘合指状物和球状区域。半导体芯片在其有效表面上具有多个输入/输出焊盘。半导体芯片堆叠在电路板的开口的位置，其中至少一个芯片在开口内。或者，两个芯片都在开口中。电连接装置将半导体芯片的输入/输出焊盘连接到电路板的键合指状物。密封剂围绕半导体芯片，以保护芯片免受外部环境的影响。导电球熔接在电路板的球面上。

4. 发明授权

US06683377B1 Multi-stacked memory package 有权
标题翻译：多堆叠内存包
公开(公告)号：US06683377B1
公开(公告)日：2004-01-27
申请号：US09583183
申请日：2000-05-30
申请人： Il Kwon Shim , Vincent DiCaprio
发明人： Il Kwon Shim , Vincent DiCaprio
IPC分类号： H01L2334
CPC分类号： H01L25/0657 , H01L23/5387 , H01L24/45 , H01L24/48 , H01L2224/16 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2225/0651 , H01L2225/06575 , H01L2225/06579 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2224/05599 , H01L2924/00
摘要： A multiple chip package and method of making the package allow multiple same size or different size chips to be stacked over each other, thereby creating a thin profile multi-chip package. Chips are attached to one surface of a continuous flexible substrate. The substrate has a metallization layer, which is electrically connected to the chips, such as via bond wires attached to center bond pads of the chips and to bond fingers on the metallization layer. Interconnections, such as solder balls, are attached to the other surface of the substrate and only at the portion opposite to the first chip. The substrate is folded to bring the first chip toward a second chip, which are then attached, such as with an insulative adhesive spacer. If any additional chips remain on the substrate, the substrate is folded to sequentially bring each additional chip toward the surface of the substrate opposite to the preceding chip and is secured thereto.
摘要翻译：制造封装的多芯片封装和方法允许多个相同尺寸或不同尺寸的芯片彼此堆叠，从而形成薄型多芯片封装。芯片连接到连续柔性基板的一个表面。衬底具有电连接到芯片的金属化层，例如连接到芯片的中心接合焊盘的通孔接合线，并且在金属化层上粘合指状物。诸如焊球之类的互连连接到衬底的另一表面，并且仅在与第一芯片相对的部分处。将基板折叠以将第一芯片朝向第二芯片，然后将其连接，例如用绝缘粘合剂间隔件。如果在基板上剩余另外的芯片，则将基板折叠成顺序地使每个附加芯片朝向与先前芯片相对的基板的表面并固定到其上。

5. 发明授权

US06531784B1 Semiconductor package with spacer strips 有权
标题翻译：半导体封装带间隔条
公开(公告)号：US06531784B1
公开(公告)日：2003-03-11
申请号：US09585915
申请日：2000-06-02
申请人： Il Kwon Shim , Kambhampati Ramakrishna , Vincent DiCaprio
发明人： Il Kwon Shim , Kambhampati Ramakrishna , Vincent DiCaprio
IPC分类号： H01L2348
CPC分类号： H01L24/48 , H01L23/49833 , H01L24/45 , H01L24/49 , H01L25/0657 , H01L2224/05553 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48095 , H01L2224/4813 , H01L2224/48472 , H01L2224/48599 , H01L2224/48699 , H01L2224/4899 , H01L2224/4911 , H01L2224/49171 , H01L2224/73265 , H01L2224/85201 , H01L2224/85205 , H01L2225/0651 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01031 , H01L2924/01079 , H01L2924/014 , H01L2924/10162 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/85399 , H01L2224/05599
摘要： A semiconductor package incorporates spacer strips enabling one or more semiconductor dies having central terminal pads to be stacked on top of one another within the package and reliably wire bonded to an associated substrate without shorting of the bonded wires. Each of the spacer strips comprises a flat, elongated strip of an insulative material that mount at edges of a surface of a die such that they straddle the central terminal pads thereon. The die is electrically connected to the substrate by a plurality of fine conductive wires having a first end bonded to one of the central terminal pad on the die, a second end bonded to a terminal pad on the substrate, and an intermediate portion between the first and second ends that passes transversely across the top surface of one of the spacer strips. The spacer strips have spaced pads or grooves on or in their top surfaces that captivate the individual wires and thereby redistribute the wires and prevent them from contacting the die and each other.
摘要翻译：半导体封装包括间隔条，使得一个或多个具有中心端子焊盘的半导体管芯能够在封装内堆叠在彼此的顶部，并且可靠地引线键合到相关联的衬底而不会使接合的引线短路。每个间隔条包括平坦的，细长的绝缘材料条，其安装在管芯的表面的边缘处，使得它们跨越其上的中心端子焊盘。芯片通过多个细导电线电连接到基板上，该细导电线具有与芯片上的一个中心端子焊盘接合的第一端，接合到基板上的端子焊盘的第二端和第一端并且横向穿过一个间隔条的顶表面的第二端。间隔条在其顶表面上或其顶表面上具有间隔的垫或凹槽，其吸引各个线，从而重新分布电线并防止它们与管芯和彼此接触。

6. 发明授权

US06517656B1 Method of making an integrated circuit package using a batch step for curing a die attachment film and a tool system for performing the method 有权
标题翻译：使用用于固化模具附着膜的批量步骤制造集成电路封装的方法和用于执行该方法的工具系统
公开(公告)号：US06517656B1
公开(公告)日：2003-02-11
申请号：US09412889
申请日：1999-10-05
申请人： Vincent DiCaprio
发明人： Vincent DiCaprio
IPC分类号： B32B3120
CPC分类号： H01L24/83 , H01L24/75 , H01L2224/2919 , H01L2224/8319 , H01L2224/83855 , H01L2224/83856 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01074 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/00
摘要： Methods of making packages for integrated circuit devices, and in particular for attaching a plurality of integrated circuit die to a substrate strip, are disclosed. The substrate includes a plurality of die mounting sites. A B-staged epoxy film is on each site. An exemplary method includes placing an integrated circuit die on the adhesive film of each site. After a plurality of integrated circuit die are individually placed on the substrate, the adhesive films of a plurality of sites are cured simultaneously in a batch process. The curing permanently attaches the die to the substrate. Subsequently, the die are wire bonded to their respective substrate sites and encapsulated. The encapsulated substrate is cut to form individual packages. A tool system for performing the die attachment process includes a head for picking up a die and placing the die on an adhesive film on the substrate strip, and a pair of opposing plates capable of pressing together and applying pressure and heat to a plurality of sites simultaneously so as to cure the adhesive film of the plurality of sites.
摘要翻译：公开了用于集成电路器件的封装的方法，特别是用于将多个集成电路管芯附着到衬底条上的方法。基板包括多个模具安装位置。每个站点都有一个B级环氧膜。一种示例性方法包括将集成电路管芯放置在每个部位的粘合膜上。在将多个集成电路芯片分别放置在基板上之后，多个部位的粘合膜在批处理中同时固化。固化将模具永久地附着到基底上。随后，管芯被引线键合到它们各自的衬底部位并封装。封装的衬底被切割以形成单独的封装。用于执行模具附接工艺的工具系统包括用于拾取模具并将模具放置在衬底条上的粘合剂膜上的头部，以及一对能够压在一起并向多个部位施加压力和热量的相对板同时固化多个部位的粘合膜。

7. 发明授权

US06762078B2 Semiconductor package having semiconductor chip within central aperture of substrate 失效
标题翻译：具有在衬底的中心孔内的半导体芯片的半导体封装
公开(公告)号：US06762078B2
公开(公告)日：2004-07-13
申请号：US09774952
申请日：2001-01-30
申请人： WonSun Shin , DoSung Chun , SangHo Lee , SeonGoo Lee , Vincent DiCaprio
发明人： WonSun Shin , DoSung Chun , SangHo Lee , SeonGoo Lee , Vincent DiCaprio
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L23/544 , H01L24/45 , H01L24/48 , H01L24/96 , H01L24/97 , H01L25/105 , H01L2223/54473 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/81005 , H01L2224/85001 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/15151 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/00014 , H01L2224/85 , H01L2924/00012
摘要： Semiconductor packages having a thin structure capable of easily discharging heat from a semiconductor chip included therein, and methods for fabricating such semiconductor packages, are disclosed. An embodiment of a semiconductor package includes a semiconductor chip having a first major surface and a second major surface, the semiconductor chip being provided at the second major surface with a plurality of input/output pads; a circuit board including a resin substrate having a first major surface and a second major surface, a first circuit pattern formed at the first major surface and provided with a plurality of ball lands, a second circuit pattern formed at the second major surface and provided with a plurality of bond fingers connected with the ball lands by conductive via holes through the resin substrate, cover coats respectively coating the first and second circuit patterns while allowing the bond fingers and the ball lands to be exposed therethrough, and a central through hole adapted to receive the semiconductor chip therein; electrical conductors that electrically connect the input/output pads of the semiconductor chip with the bond fingers of the circuit board, respectively; a resin encapsulate that covers the semiconductor chip, the electrical conductors, and at least part of the circuit board; and, a plurality of conductive balls fused on the ball lands of the circuit board, respectively.
摘要翻译：公开了具有能够容易地从包括在其中的半导体芯片放出热的薄结构的半导体封装以及制造这种半导体封装的方法。半导体封装的实施例包括具有第一主表面和第二主表面的半导体芯片，所述半导体芯片在第二主表面处设置有多个输入/输出焊盘; 包括具有第一主表面和第二主表面的树脂基板的电路板，形成在第一主表面处并设置有多个球接头的第一电路图案，形成在第二主表面处并且设置有第二主表面的第二电路图案多个粘结指状物通过导电通孔与树脂基底连接，通过树脂基底，覆盖涂层分别涂覆第一和第二电路图案，同时允许粘合指状物和球状区域暴露于其中;以及中心通孔，其适于在其中接收半导体芯片; 电导体，其将半导体芯片的输入/输出焊盘电连接到电路板的键合指; 覆盖半导体芯片，电导体和电路板的至少一部分的树脂封装; 以及多个导电球分别熔合在电路板的球面上。

8. 发明授权

US06589801B1 Wafer-scale production of chip-scale semiconductor packages using wafer mapping techniques 有权
标题翻译：使用晶片映射技术晶圆尺寸生产芯片级半导体封装
公开(公告)号：US06589801B1
公开(公告)日：2003-07-08
申请号：US09385694
申请日：1999-08-30
申请人： Ju-Hoon Yoon , Dae-Byung Kang , In-Bae Park , Vincent DiCaprio , Markus K. Liebhard
发明人： Ju-Hoon Yoon , Dae-Byung Kang , In-Bae Park , Vincent DiCaprio , Markus K. Liebhard
IPC分类号： H01L2166
CPC分类号： H01L22/20 , H01L24/94 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/48465 , H01L2224/73215 , H01L2224/78301 , H01L2224/85009 , H01L2224/94 , H01L2924/01004 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2924/3025 , H01L2924/00014 , H01L2224/85 , H01L2924/00
摘要： A method is disclosed for manufacturing chip-scale semiconductor packages at a wafer-scale level using wafer mapping techniques. In the method, a semiconductor wafer and/or a circuit substrate, each respectively comprising a plurality of individual chips and circuit pattern units, is/are pre-tested and discriminated in terms of the quality and/or grade of each individual chip unit and/or circuit pattern unit contained therein. The test results are marked on the lower surface of each chip unit and/or on each pattern unit. The substrate is laminated to the wafer to form a laminated assembly prior to performing the packaging process, which typically includes a wire bonding step, an encapsulation step and a solder ball welding step. A plurality of connected package units are thereby formed in the laminated substrate-wafer assembly. The package units are then singulated from each other and the laminated assembly by a cutting process. Using the pre-testing results, the method eliminates wasteful packaging of defective chips. The quality and/or grade of packaged units are marked on the chips in accordance with the pre-testing data, thereby enabling defective packages to be distinguished from good packages without need for post-singulation testing. The method permits using only good circuit pattern units, thereby preventing expensive chip units from being packaged with defective pattern units. In addition, the method permits both a package pick-and-place step and a package marking step to be combined into a single operation using a single device.
摘要翻译：公开了一种使用晶片映射技术在晶片级别制造芯片级半导体封装的方法。在该方法中，分别包括多个单独芯片和电路图案单元的半导体晶片和/或电路基板在每个单独芯片单元的质量和/或等级方面被预先测试和鉴别，并且 /或其中包含的电路图案单元。测试结果标记在每个芯片单元的下表面和/或每个图案单元上。在执行包装工艺之前，将衬底层压到晶片上以形成层压组件，其通常包括引线键合步骤，封装步骤和焊球焊接步骤。由此，在叠层基板 - 晶片组件中形成多个连接的封装单元。然后通过切割工艺将包装单元彼此分离并且层压组件。使用预测试结果，该方法消除了有缺陷的芯片的浪费包装。封装单元的质量和/或等级根据预测数据在芯片上标记，从而使有缺陷的封装与良好的封装区分开，而不需要进行后分离测试。该方法仅允许使用良好的电路图案单元，从而防止昂贵的芯片单元与缺陷图案单元一起封装。此外，该方法允许使用单个设备将包装拾取步骤和包装标记步骤组合成单个操作。

9. 发明授权

US06515356B1 Semiconductor package and method for fabricating the same 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US06515356B1
公开(公告)日：2003-02-04
申请号：US09566069
申请日：2000-05-05
申请人： Won Sun Shin , Seon Goo Lee , Do Sung Chun , Tae Hoan Jang , Vincent DiCaprio
发明人： Won Sun Shin , Seon Goo Lee , Do Sung Chun , Tae Hoan Jang , Vincent DiCaprio
IPC分类号： H01L2302
CPC分类号： H01L21/568 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L23/544 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/96 , H01L24/97 , H01L25/105 , H01L2223/54473 , H01L2224/32145 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/18165 , H01L2924/3511 , H01L2924/00014 , H01L2224/85 , H01L2224/83 , H01L2924/00012 , H01L2924/00
摘要： There is provided a semiconductor package and method for fabricating the same. An embodiment of the semiconductor package includes: a semiconductor chip having a first face and a second face, the first face having a plurality of input/output pads formed thereon; a circuit board composed of a resin film having a first face and a second face, a circuit pattern layer including a plurality of bond fingers and ball lands, and a cover coat covering the circuit pattern layer and selectively exposing the plurality of bond fingers and ball lands, the circuit pattern layer being formed on the first face of the resin film, the circuit board having a through hole at the center the semiconductor chip being placed in the through hole; electrical connection means for electrically connecting the input/output pads of the semiconductor chip to the bond fingers of the circuit board; an encapsulant for encapsulating the semiconductor chip, connection means and a part of the circuit board; and a plurality of conductive balls fused to the circuit board. Accordingly, the semiconductor package becomes very thin and its heat spreading performance is improved.
摘要翻译：提供了一种半导体封装及其制造方法。半导体封装的一个实施例包括：具有第一面和第二面的半导体芯片，第一面具有形成在其上的多个输入/输出焊盘; 由具有第一面和第二面的树脂膜构成的电路板，包括多个接合指和球面的电路图案层，以及覆盖电路图案层并且选择性地暴露多个键合指状物和球的覆盖层所述电路图案层形成在所述树脂膜的第一面上，所述电路板在所述半导体芯片的中心处具有通孔，所述通孔位于所述通孔中; 电连接装置，用于将半导体芯片的输入/输出焊盘电连接到电路板的键合指状物; 用于封装半导体芯片的密封剂，连接装置和电路板的一部分; 以及与电路板熔接的多个导电球。因此，半导体封装变得非常薄，并且其散热性能得到改善。

10. 发明授权

US06472758B1 Semiconductor package including stacked semiconductor dies and bond wires 有权
标题翻译：半导体封装包括堆叠的半导体管芯和接合线
公开(公告)号：US06472758B1
公开(公告)日：2002-10-29
申请号：US09620444
申请日：2000-07-20
申请人： Thomas P. Glenn , Lee J. Smith , David A. Zoba , Kambhampati Ramakrishna , Vincent DiCaprio
发明人： Thomas P. Glenn , Lee J. Smith , David A. Zoba , Kambhampati Ramakrishna , Vincent DiCaprio
IPC分类号： H01L2348
CPC分类号： H01L25/0657 , H01L2224/05553 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/48472 , H01L2224/49171 , H01L2224/73265 , H01L2224/83139 , H01L2225/0651 , H01L2225/06575 , H01L2225/06586 , H01L2924/01079 , H01L2924/15311 , H01L2924/181 , Y10T428/21 , H01L2924/00 , H01L2924/00012
摘要： This invention provides a method for making a semiconductor package with stacked dies that eliminates fracturing of the upper die(s) during the wire bonding process. One embodiment of the method includes the provision of a substrate and pair of semiconductor dies, each having opposite top and bottom surfaces and a plurality of wire bonding pads around the peripheries of their respective top surfaces. One die is attached and wire bonded to a top surface of the substrate. A measured quantity of an uncured, fluid adhesive is dispensed onto the top surface of the first die, and the adhesive is squeezed toward the edges of the dies by pressing the bottom surface of the second die down onto the adhesive until the two dies are separated by a layer of the adhesive. The adhesive is cured, the second die is then wire bonded to the substrate, and the dies are then molded over with an encapsulant. The layer of adhesive prevents the second die from shorting the wires on the top of the first die, prevents the second die from being fractured during the wire bonding process, and prevents the encapsulant from forming a thermally expansive wedge between the two dies.
摘要翻译：本发明提供一种制造具有堆叠管芯的半导体封装的方法，其消除了在引线接合工艺期间上模的断裂。该方法的一个实施例包括提供基板和一对半导体管芯，每个半导体管芯具有相对的顶部和底部表面以及围绕其相应顶部表面的周边的多个引线接合焊盘。连接一个管芯并将其引线接合到衬底的顶表面。将未固化的流体粘合剂的测量量分配到第一模具的顶表面上，并且通过将第二模具的底表面压在粘合剂上而将粘合剂朝向模具的边缘挤压，直到两个模具分离通过一层粘合剂。粘合剂被固化，然后将第二模具引线键合到基底上，然后用密封剂模制模具。粘合剂层防止第二管芯在第一管芯的顶部短路，防止第二管芯在引线接合过程中断裂，并且防止密封剂在两个管芯之间形成热膨胀的楔形件。

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