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1. 发明申请

US20080251888A1 Method and Apparatus for Self-Contained Automatic Decoupling Capacitor Switch-Out in Integrated Circuits 失效
标题翻译：集成电路中自包含自动去耦电容开关的方法和装置
公开(公告)号：US20080251888A1
公开(公告)日：2008-10-16
申请号：US11733435
申请日：2007-04-10
申请人： Vikas Agarwal , Asit S. Ambekar , Sanjay Dubey , Saiful Islam
发明人： Vikas Agarwal , Asit S. Ambekar , Sanjay Dubey , Saiful Islam
IPC分类号： H01L27/02
CPC分类号： H01L27/0805 , G06F1/26 , H01L27/0629 , Y10T307/865
摘要： An integrated circuit (IC) includes power supply interconnects that couple to a power source. The integrated circuit includes electronic devices that perform desired functions and further includes decoupling capacitor circuits that provide noise reduction throughout the integrated circuit. In one embodiment, each decoupling capacitor circuit includes a decoupling capacitor and a switching circuit. The switching circuit connects the decoupling capacitor to the power supply interconnects during a connect mode when the switching circuit detects no substantial decoupling capacitor leakage. However, the switching circuit effectively disconnects the decoupling capacitor from the power supply interconnects during a disconnect mode when the switching circuit detects substantial decoupling capacitor leakage. The decoupling capacitor circuit self-initializes in the connect mode without external control signals and is thus self-contained. Because of the self-contained nature of the decoupling capacitor circuit, an integrated circuit may contain an array of decoupling capacitor circuits without expenditure of substantial chip real estate for respective decoupling capacitor control lines.
摘要翻译：集成电路（IC）包括耦合到电源的电源互连。集成电路包括执行所需功能的电子器件，还包括在整个集成电路中提供降噪的去耦电容器电路。在一个实施例中，每个去耦电容器电路包括去耦电容器和开关电路。当开关电路检测到没有实质的去耦电容器泄漏时，开关电路在连接模式期间将去耦电容器连接到电源互连。然而，当开关电路检测到实质的去耦电容器泄漏时，开关电路在断开模式期间有效地将去耦电容器与电源互连件断开。去耦电容电路在连接模式下自我初始化，无需外部控制信号，因此是独立的。由于去耦电容电路的自包含性质，集成电路可能包含一个去耦电容电路的阵列，而不需要相应的去耦电容器控制线的大量芯片空间。

2. 发明授权

US07750511B2 Method and apparatus for self-contained automatic decoupling capacitor switch-out in integrated circuits 失效
标题翻译：集成电路中独立自动去耦电容开关的方法和装置
公开(公告)号：US07750511B2
公开(公告)日：2010-07-06
申请号：US11733435
申请日：2007-04-10
申请人： Vikas Agarwal , Asit S. Ambekar , Sanjay Dubey , Saiful Islam
发明人： Vikas Agarwal , Asit S. Ambekar , Sanjay Dubey , Saiful Islam
IPC分类号： H02H3/00
CPC分类号： H01L27/0805 , G06F1/26 , H01L27/0629 , Y10T307/865
摘要： An integrated circuit (IC) includes power supply interconnects that couple to a power source. The integrated circuit includes electronic devices that perform desired functions and further includes decoupling capacitor circuits that provide noise reduction throughout the integrated circuit. In one embodiment, each decoupling capacitor circuit includes a decoupling capacitor and a switching circuit. The switching circuit connects the decoupling capacitor to the power supply interconnects during a connect mode when the switching circuit detects no substantial decoupling capacitor leakage. However, the switching circuit effectively disconnects the decoupling capacitor from the power supply interconnects during a disconnect mode when the switching circuit detects substantial decoupling capacitor leakage. The decoupling capacitor circuit self-initializes in the connect mode without external control signals and is thus self-contained. Because of the self-contained nature of the decoupling capacitor circuit, an integrated circuit may contain an array of decoupling capacitor circuits without expenditure of substantial chip real estate for respective decoupling capacitor control lines.
摘要翻译：集成电路（IC）包括耦合到电源的电源互连。集成电路包括执行所需功能的电子器件，还包括在整个集成电路中提供降噪的去耦电容器电路。在一个实施例中，每个解耦电容器电路包括去耦电容器和开关电路。当开关电路检测到没有实质的去耦电容器泄漏时，开关电路在连接模式期间将去耦电容器连接到电源互连。然而，当开关电路检测到实质的去耦电容器泄漏时，开关电路在断开模式期间有效地将去耦电容器与电源互连件断开。去耦电容电路在连接模式下自我初始化，无需外部控制信号，因此是独立的。由于去耦电容电路的自包含性质，集成电路可能包含一个去耦电容电路的阵列，而不需要相应的去耦电容器控制线的大量芯片空间。

3. 发明授权

US07545176B2 Energy-saving circuit and method using charge equalization across complementary nodes 失效
标题翻译：节能电路和方法在互补节点上使用电荷均衡
公开(公告)号：US07545176B2
公开(公告)日：2009-06-09
申请号：US11923714
申请日：2007-10-25
申请人： Vikas Agarwal , Sanjay Dubey , Saiful Islam , Gaurav Mittal
发明人： Vikas Agarwal , Sanjay Dubey , Saiful Islam , Gaurav Mittal
IPC分类号： H03K19/0175 , H03K19/094
CPC分类号： H03K5/151 , H03K19/0008
摘要： An energy-saving circuit and method using charge equalization across complementary nodes reduces power consumption in memory circuits and other circuits such as wide multiplexers having complementary high-capacitance nodes. A change detection circuit detects a state change to be applied to the bitlines, and generates a pulse if a state change is to be applied. A pass gate connected between the nodes is activated in response to the pulse to equalize the charge on the bitlines. The driver circuit enable inputs are also delayed, so that the bitlines are not driven until after the charge has been equalized and the pass gate disabled. In one embodiment, the driver circuits are only enabled momentarily by a pulsed output of the change detector and keeper circuits are employed to retain the bitlines in their asserted states.
摘要翻译：在互补节点上使用电荷均衡的节能电路和方法降低存储器电路和其它电路中的功耗，例如具有互补高电容节点的宽多路复用器。改变检测电路检测要施加到位线的状态变化，并且如果要施加状态改变则产生脉冲。连接在节点之间的通过门被响应于脉冲激活以均衡位线上的电荷。驱动电路使能输入也被延迟，使得位线不被驱动，直到电荷被均衡并且通路禁止。在一个实施例中，驱动器电路仅通过变化检测器的脉冲输出暂时使能，并且使用保持器电路将位线保持在其断言状态。

4. 发明申请

US20090108920A1 ENERGY-SAVING CIRCUIT AND METHOD USING CHARGE EQUALIZATION ACROSS COMPLEMENTARY NODES 失效
标题翻译：节能电路和使用充电均衡的方法
公开(公告)号：US20090108920A1
公开(公告)日：2009-04-30
申请号：US11923714
申请日：2007-10-25
申请人： Vikas Agarwal , Sanjay Dubey , Saiful Islam , Gaurav Mittal
发明人： Vikas Agarwal , Sanjay Dubey , Saiful Islam , Gaurav Mittal
IPC分类号： G05F1/10
CPC分类号： H03K5/151 , H03K19/0008
摘要： An energy-saving circuit and method using charge equalization across complementary nodes reduces power consumption in memory circuits and other circuits such as wide multiplexers having complementary high-capacitance nodes. A change detection circuit detects a state change to be applied to the bitlines, and generates a pulse if a state change is to be applied. A pass gate connected between the nodes is activated in response to the pulse to equalize the charge on the bitlines. The driver circuit enable inputs are also delayed, so that the bitlines are not driven until after the charge has been equalized and the pass gate disabled. In one embodiment, the driver circuits are only enabled momentarily by a pulsed output of the change detector and keeper circuits are employed to retain the bitlines in their asserted states.
摘要翻译：在互补节点上使用电荷均衡的节能电路和方法降低存储器电路和其它电路中的功耗，例如具有互补高电容节点的宽多路复用器。改变检测电路检测要施加到位线的状态变化，并且如果要施加状态改变则产生脉冲。连接在节点之间的通过门被响应于脉冲激活以均衡位线上的电荷。驱动电路使能输入也被延迟，使得位线不被驱动，直到电荷被均衡并且通路禁止。在一个实施例中，驱动器电路仅通过变化检测器的脉冲输出暂时使能，并且使用保持器电路将位线保持在其断言状态。

5. 发明申请

US20090010077A1 SHIFT REGISTER LATCH WITH EMBEDDED DYNAMIC RANDOM ACCESS MEMORY SCAN ONLY CELL 有权
标题翻译：具有嵌入式动态随机存取存储器扫描的移位寄存器
公开(公告)号：US20090010077A1
公开(公告)日：2009-01-08
申请号：US11772592
申请日：2007-07-02
申请人： Vikas Agarwal , Sam Gat-Shang Chu , Saiful Islam , Philip George Shephard, III
发明人： Vikas Agarwal , Sam Gat-Shang Chu , Saiful Islam , Philip George Shephard, III
IPC分类号： G11C7/00
CPC分类号： G11C19/184 , G11C11/41 , G11C14/00 , G11C29/32 , G11C2029/3202
摘要： A hybrid shift register latch which uses static memory cells for system operations and a dynamic memory cell for testing operations only. An L1 storage element and an L2 storage element are provided in an array cell. The L1 storage element comprises a static random access memory cell. The L1 storage element is used during system and testing operation of the array cell. The L2 storage element comprises a dynamic random access memory cell. The L2 storage element is used only during testing operation of the array cell.
摘要翻译：混合移位寄存器锁存器，其使用用于系统操作的静态存储器单元和仅用于测试操作的动态存储器单元。在阵列单元中设置L1存储元件和L2存储元件。 L1存储元件包括静态随机存取存储单元。 L1存储元件在阵列单元的系统和测试操作期间使用。 L2存储元件包括动态随机存取存储单元。 L2存储元件仅在阵列单元的测试操作期间使用。

6. 发明授权

US07474574B1 Shift register latch with embedded dynamic random access memory scan only cell 有权
标题翻译：移位寄存器锁存器与嵌入式动态随机存取存储器扫描单元格
公开(公告)号：US07474574B1
公开(公告)日：2009-01-06
申请号：US11772592
申请日：2007-07-02
申请人： Vikas Agarwal , Sam Gat-Shang Chu , Saiful Islam , Philip George Shephard, III
发明人： Vikas Agarwal , Sam Gat-Shang Chu , Saiful Islam , Philip George Shephard, III
IPC分类号： G11C7/00
CPC分类号： G11C19/184 , G11C11/41 , G11C14/00 , G11C29/32 , G11C2029/3202
摘要： A hybrid shift register latch which uses static memory cells for system operations and a dynamic memory cell for testing operations only. An L1 storage element and an L2 storage element are provided in an array cell. The L1 storage element comprises a static random access memory cell. The L1 storage element is used during system and testing operation of the array cell. The L2 storage element comprises a dynamic random access memory cell. The L2 storage element is used only during testing operation of the array cell.
摘要翻译：混合移位寄存器锁存器，其使用用于系统操作的静态存储器单元和仅用于测试操作的动态存储器单元。在阵列单元中设置L1存储元件和L2存储元件。 L1存储元件包括静态随机存取存储单元。 L1存储元件在阵列单元的系统和测试操作期间使用。 L2存储元件包括动态随机存取存储单元。 L2存储元件仅在阵列单元的测试操作期间使用。

7. 发明授权

US08009398B2 Isolating faulty decoupling capacitors 有权
标题翻译：隔离有缺陷的去耦电容
公开(公告)号：US08009398B2
公开(公告)日：2011-08-30
申请号：US12478477
申请日：2009-06-04
申请人： Vikas Agarwal , Sanjay Dubey , Ankit K. Gheedia , Nikhil Kejriwal , Sankara Reddy S. Kommareddi
发明人： Vikas Agarwal , Sanjay Dubey , Ankit K. Gheedia , Nikhil Kejriwal , Sankara Reddy S. Kommareddi
IPC分类号： H02H3/22
CPC分类号： G11C29/02 , G11C2029/5006 , H01L22/22
摘要： The present invention generally provides a decoupling capacitor circuit that is configured to determine whether a decoupling capacitor is defective. Upon determining that the decoupling capacitor is defective, the decoupling capacitor circuit may disconnect the decoupling capacitor from both, a positive segment and a negative segment of a power grid. In some embodiments, the decoupling capacitor circuit may be configured to reconnect the decoupling capacitor to the power grid upon receiving a reset signal.
摘要翻译：本发明通常提供一种去耦电容器电路，其被配置为确定去耦电容器是否有缺陷。在确定去耦电容器有缺陷时，去耦电容器电路可以将去耦电容器与电网的正段和负段断开。在一些实施例中，解耦电容器电路可以被配置为在接收到复位信号时将去耦电容器重新连接到电网。

8. 发明申请

US20100308663A1 ISOLATING FAULTY DECOUPLING CAPACITORS 有权
标题翻译：隔离故障解除电容器
公开(公告)号：US20100308663A1
公开(公告)日：2010-12-09
申请号：US12478477
申请日：2009-06-04
申请人： Vikas Agarwal , Sanjay Dubey , Ankit K. Gheedia , Nikhil Kejriwal , Sankara Reddy S. Kommareddi
发明人： Vikas Agarwal , Sanjay Dubey , Ankit K. Gheedia , Nikhil Kejriwal , Sankara Reddy S. Kommareddi
IPC分类号： H02J1/00
CPC分类号： G11C29/02 , G11C2029/5006 , H01L22/22
摘要： The present invention generally provides a decoupling capacitor circuit that is configured to determine whether a decoupling capacitor is defective. Upon determining that the decoupling capacitor is defective, the decoupling capacitor circuit may disconnect the decoupling capacitor from both, a positive segment and a negative segment of a power grid. In some embodiments, the decoupling capacitor circuit may be configured to reconnect the decoupling capacitor to the power grid upon receiving a reset signal.
摘要翻译：本发明通常提供一种去耦电容器电路，其被配置为确定去耦电容器是否有缺陷。在确定去耦电容器有缺陷时，去耦电容器电路可以将去耦电容器与电网的正段和负段断开。在一些实施例中，解耦电容器电路可以被配置为在接收到复位信号时将去耦电容器重新连接到电网。

9. 发明授权

US09137651B2 Systems and methods for determining relationships between mobile applications and electronic device users 有权
标题翻译：用于确定移动应用和电子设备用户之间的关系的系统和方法
公开(公告)号：US09137651B2
公开(公告)日：2015-09-15
申请号：US13302198
申请日：2011-11-22
申请人： Vikas Agarwal , Sumit Mittal , Sougata Mukherjea
发明人： Vikas Agarwal , Sumit Mittal , Sougata Mukherjea
IPC分类号： G06F9/44 , H04W4/20 , G06F9/445
CPC分类号： H04W4/21 , G06F8/60 , G06F9/44
摘要： A system and method are provided for generating a mobile software program for prospective users. Telecommunications data is received from a telecommunications source. Snapshot data is generated that is related to one or more software programs downloaded to an electronic device. A relevance matrix is generated from the generated snapshot data and the telecommunications data to determine a first software program of the one or more software programs for a predetermined first consumer of the electronic device users or to determine a plurality of second consumers of the electronic device users for receiving data related to a second software program of the plurality of the one or more software programs.
摘要翻译：提供了一种为潜在用户生成移动软件程序的系统和方法。从电信来源接收电信数据。生成与下载到电子设备的一个或多个软件程序有关的快照数据。从生成的快照数据和电信数据生成相关矩阵，以确定电子设备用户的预定第一消费者的一个或多个软件程序的第一软件程序，或者确定电子设备用户的多个第二消费者用于接收与所述多个所述一个或多个软件程序中的第二软件程序相关的数据。

10. 发明授权

US08537880B2 Apparatus and method for frame synchronization in satellite communication system 有权
标题翻译：卫星通信系统中帧同步的装置和方法
公开(公告)号：US08537880B2
公开(公告)日：2013-09-17
申请号：US13324351
申请日：2011-12-13
申请人： Vikas Agarwal , Pan-Soo Kim , Deock-Gil Oh
发明人： Vikas Agarwal , Pan-Soo Kim , Deock-Gil Oh
IPC分类号： H04W56/00
CPC分类号： H04H40/90
摘要： Provided is a frame synchronization apparatus capable of reducing the amount of total computation and computation delays when a receiver of a satellite communication system calculates correlation between an input signal for frame synchronization and a signal sequence of the receiver, since the receiver uses no multiplier. The frame synchronization apparatus includes a correlator to obtain a correlation value of a unique word of a receiver with respect to a symbol data stream of a frame received from a transmitter of the satellite communication system, a comparator to compare the correlation value to a predetermined threshold value, and a determiner to determine whether the frame has been synchronized, based on the result of the comparison by the comparator.
摘要翻译：提供了一种帧同步装置，当卫星通信系统的接收机计算用于帧同步的输入信号与接收机的信号序列之间的相关性时，能够减少总计算量和计算延迟量，因为接收机不使用乘法器。帧同步装置包括相关器，用于相对于从卫星通信系统的发射机接收到的帧的符号数据流获得接收机的唯一字的相关值;将相关值与预定阈值进行比较的比较器值，以及基于比较器的比较结果来确定帧是否已被同步的确定器。

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