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1. 发明授权

US07525130B2 Polarization-doped field effect transistors (POLFETS) and materials and methods for making the same 有权
标题翻译：极化掺杂场效应晶体管（POLFETS）及其制作方法
公开(公告)号：US07525130B2
公开(公告)日：2009-04-28
申请号：US11241804
申请日：2005-09-29
申请人： Umesh K. Mishra , Huili Xing , Debdeep Jena , Siddharth Rajan
发明人： Umesh K. Mishra , Huili Xing , Debdeep Jena , Siddharth Rajan
IPC分类号： H01L31/00
CPC分类号： H01L29/812 , H01L29/1029 , H01L29/2003 , H01L29/7783 , H01L29/7787
摘要： Novel GaN/AlGaN metal-semiconductor field-effect transistor (MESFET) structures grown without any impurity doping in the channel. A high-mobility polarization-induced bulk channel charge is created by grading the channel region linearly from GaN to Al0.3Ga0.7N over a distance, e.g., 1000 Å. A polarization-doped field effect transistor (PolFET) was fabricated and tested under DC and RF conditions. A current density of 850 mA/mm and transconductance of 93 mS/mm was observed under DC conditions. Small-signal characterization of 0.7 μm gate length devices had a cutoff frequency, fτ=19 GHz, and a maximum oscillation of fmax=46 GHz. The PolFETs perform better than comparable MESFETs with impurity-doped channels, and are suitable for high microwave power applications. An important advantage of these devices over AlGaN/GaN HEMTs is that the transconductance vs. gate voltage profile can be tailored by compositional grading for better large-signal linearity.
摘要翻译：新型GaN / AlGaN金属半导体场效应晶体管（MESFET）结构在通道中没有任何杂质掺杂生长。通过在一定距离（例如）1000处将通道区域从GaN线性地分级至Al 0.3 Ga 0.7 N来产生高迁移率极化诱导的体沟道电荷。在DC和RF条件下制造和测试偏振掺杂场效应晶体管（PolFET）。在直流条件下观察到电流密度为850mA / mm，跨导为93mS / mm。 0.7mm门极长度器件的小信号表征具有截止频率ftau = 19GHz，fmax = 46GHz的最大振荡。 PolFET比具有杂质掺杂通道的可比MESFET性能更好，适用于高微波功率应用。这些器件对AlGaN / GaN HEMT的一个重要优点是跨导与栅极电压分布可以通过组合分级来定制，以获得更好的大信号线性度。

2. 发明授权

US07935985B2 N-face high electron mobility transistors with low buffer leakage and low parasitic resistance 有权
标题翻译：具有低缓冲器泄漏和低寄生电阻的N面高电子迁移率晶体管
公开(公告)号：US07935985B2
公开(公告)日：2011-05-03
申请号：US12059902
申请日：2008-03-31
申请人： Umesh K. Mishra , Yi Pei , Siddharth Rajan , Man Hoi Wong
发明人： Umesh K. Mishra , Yi Pei , Siddharth Rajan , Man Hoi Wong
IPC分类号： H01L29/66
CPC分类号： H01L29/7786 , H01L21/02378 , H01L21/02433 , H01L21/02458 , H01L21/02516 , H01L21/0254 , H01L29/0891 , H01L29/1608 , H01L29/2003
摘要： A method for fabricating nitrogen-face (N-face) nitride-based electronic devices with low buffer leakage, comprising isolating a buffer from a substrate with an AlGaInN nucleation layer to suppress impurity incorporation from the substrate into the buffer. A method for fabricating N-face nitride-based electronic devices with low parasitic resistance and high breakdown, comprising capping a device structure with a conductive layer to provide extremely low access and/or contact resistances, is also disclosed.
摘要翻译：一种用于制造具有低缓冲器泄漏的氮面（N面）氮化物基电子器件的方法，包括用AlGaInN成核层从衬底隔离缓冲器以抑制从衬底掺入缓冲器中的杂质。还公开了一种用于制造具有低寄生电阻和高击穿的N面氮化物基电子器件的方法，其包括用导电层封装器件结构以提供极低的访问和/或接触电阻。

3. 发明申请

US20100264461A1 N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor 有权
标题翻译：氮化镓氮化镓/氮化镓增强型场效应晶体管
公开(公告)号：US20100264461A1
公开(公告)日：2010-10-21
申请号：US11523286
申请日：2006-09-18
申请人： Siddharth Rajan , Chang Soo Suh , James S. Speck , Umesh K. Mishra
发明人： Siddharth Rajan , Chang Soo Suh , James S. Speck , Umesh K. Mishra
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L29/045 , H01L29/2003 , H01L29/432 , H01L29/7781 , H01L29/7783 , H01L29/7784
摘要： A novel enhancement mode field effect transistor (FET), such as a High Electron Mobility Transistors (HEMT), has an N-polar surface uses polarization fields to reduce the electron population under the gate in the N-polar orientation, has improved dispersion suppression, and low gate leakage.
摘要翻译：一种新型的增强型场效应晶体管（FET），例如高电子迁移率晶体管（HEMT），具有N-极性表面，利用极化场来减小N极方向栅极下的电子群，改善了色散抑制，低栅极泄漏。

4. 发明申请

US20080237640A1 N-FACE HIGH ELECTRON MOBILITY TRANSISTORS WITH LOW BUFFER LEAKAGE AND LOW PARASITIC RESISTANCE 有权
标题翻译：具有低缓冲层漏电和低抗隔离性的N面高电子移动晶体管
公开(公告)号：US20080237640A1
公开(公告)日：2008-10-02
申请号：US12059902
申请日：2008-03-31
申请人： Umesh K. Mishra , Yi Pei , Siddharth Rajan , Man Hoi Wong
发明人： Umesh K. Mishra , Yi Pei , Siddharth Rajan , Man Hoi Wong
IPC分类号： H01L29/267 , H01L21/205 , H01L21/336
CPC分类号： H01L29/7786 , H01L21/02378 , H01L21/02433 , H01L21/02458 , H01L21/02516 , H01L21/0254 , H01L29/0891 , H01L29/1608 , H01L29/2003
摘要： A method for fabricating nitrogen-face (N-face) nitride-based electronic devices with low buffer leakage, comprising isolating a buffer from a substrate with an AlGaInN nucleation layer to suppress impurity incorporation from the substrate into the buffer. A method for fabricating N-face nitride-based electronic devices with low parasitic resistance and high breakdown, comprising capping a device structure with a conductive layer to provide extremely low access and/or contact resistances, is also disclosed.
摘要翻译：一种用于制造具有低缓冲器泄漏的氮面（N面）氮化物基电子器件的方法，包括用AlGaInN成核层从衬底隔离缓冲器以抑制从衬底掺入缓冲器中的杂质。还公开了一种用于制造具有低寄生电阻和高击穿的N面氮化物基电子器件的方法，其包括用导电层封装器件结构以提供极低的访问和/或接触电阻。

5. 发明授权

US07948011B2 N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor 有权
标题翻译：氮化镓氮化镓/氮化镓增强型场效应晶体管
公开(公告)号：US07948011B2
公开(公告)日：2011-05-24
申请号：US11523286
申请日：2006-09-18
申请人： Siddharth Rajan , Chang Soo Suh , James S. Speck , Umesh K. Mishra
发明人： Siddharth Rajan , Chang Soo Suh , James S. Speck , Umesh K. Mishra
IPC分类号： H01L29/66
CPC分类号： H01L29/045 , H01L29/2003 , H01L29/432 , H01L29/7781 , H01L29/7783 , H01L29/7784
摘要： A novel enhancement mode field effect transistor (FET), such as a High Electron Mobility Transistors (HEMT), has an N-polar surface uses polarization fields to reduce the electron population under the gate in the N-polar orientation, has improved dispersion suppression, and low gate leakage.
摘要翻译：一种新型的增强型场效应晶体管（FET），例如高电子迁移率晶体管（HEMT），具有N-极性表面，利用极化场来减小N极方向栅极下的电子群，改善色散抑制，低栅极泄漏。

6. 发明申请

US20090085065A1 METHOD TO FABRICATE III-N SEMICONDUCTOR DEVICES ON THE N-FACE OF LAYERS WHICH ARE GROWN IN THE III-FACE DIRECTION USING WAFER BONDING AND SUBSTRATE REMOVAL 审中-公开
标题翻译：使用波形焊接和基板去除在III面形成的层的N面上制造III-N半导体器件的方法
公开(公告)号：US20090085065A1
公开(公告)日：2009-04-02
申请号：US12059907
申请日：2008-03-31
申请人： Umesh K. Mishra , Lee S. McCarthy , Chang Soo Suh , Siddharth Rajan
发明人： Umesh K. Mishra , Lee S. McCarthy , Chang Soo Suh , Siddharth Rajan
IPC分类号： H01L29/778 , H01L21/18 , H01L21/20
CPC分类号： H01L29/66462 , H01L21/187 , H01L29/045 , H01L29/2003 , H01L29/7783
摘要： A method for fabricating III-N semiconductor devices on the N-face of layers comprising (a) growing a III-nitride semiconductor device structure in a Ga-polar direction on a substrate, (b) attaching a Ga face of the III-nitride semiconductor device structure to a host substrate, and (c) removing the substrate to expose the N-face surface of the III-nitride semiconductor device structure. An N-polar (000-1) oriented III-nitride semiconductor device is also disclosed, comprising one or more (000-1) oriented nitride layers, each having an N-face opposite a group III-face, wherein at least one N-face is an at least partially exposed N-face, and a host substrate attached to one of the group III-faces.
摘要翻译：一种用于在层的N面上制造III-N半导体器件的方法，包括（a）在衬底上生长Ga极性方向上的III族氮化物半导体器件结构，（b）将III族氮化物的Ga面半导体器件结构，以及（c）去除衬底以露出III族氮化物半导体器件结构的N面。还公开了一种N极（000-1）取向的III族氮化物半导体器件，其包括一个或多个（000-1）取向的氮化物层，每个具有与III族面相反的N面，其中至少一个N 表面是至少部分暴露的N面，以及附着到III组面中的一个的主体衬底。

7. 发明授权

US09496353B2 Fabrication of single or multiple gate field plates 有权
标题翻译：制造单栅极或多栅极场板
公开(公告)号：US09496353B2
公开(公告)日：2016-11-15
申请号：US12898341
申请日：2010-10-05
申请人： Alessandro Chini , Umesh K. Mishra , Primit Parikh , Yifeng Wu
发明人： Alessandro Chini , Umesh K. Mishra , Primit Parikh , Yifeng Wu
IPC分类号： H01L29/40 , H01L27/06 , H01L29/423 , H01L29/66 , H01L29/778 , H01L29/20 , H01L29/207 , H01L29/417 , H01L29/78
CPC分类号： H01L29/404 , H01L27/0605 , H01L29/2003 , H01L29/205 , H01L29/207 , H01L29/401 , H01L29/402 , H01L29/41766 , H01L29/42312 , H01L29/42316 , H01L29/66462 , H01L29/7787 , H01L29/785
摘要： A process for fabricating single or multiple gate field plates using consecutive steps of dielectric material deposition/growth, dielectric material etch and metal evaporation on the surface of a field effect transistors. This fabrication process permits a tight control on the field plate operation since dielectric material deposition/growth is typically a well controllable process. Moreover, the dielectric material deposited on the device surface does not need to be removed from the device intrinsic regions: this essentially enables the realization of field-plated devices without the need of low-damage dielectric material dry/wet etches. Using multiple gate field plates also reduces gate resistance by multiple connections, thus improving performances of large periphery and/or sub-micron gate devices.
摘要翻译：使用在场效应晶体管的表面上的介电材料沉积/生长，介电材料蚀刻和金属蒸发的连续步骤来制造单栅极或多栅极场板的工艺。这种制造工艺允许对场板操作的严格控制，因为介电材料沉积/生长通常是良好可控的工艺。此外，沉积在器件表面上的电介质材料不需要从器件本征区域去除：这基本上使得能够实现电镀设备，而不需要低损耗介电材料干/湿蚀刻。使用多个栅极场板还通过多个连接降低栅极电阻，从而提高大的周边和/或亚微米栅极器件的性能。

8. 发明授权

US09129977B2 Method of controlling stress in group-III nitride films deposited on substrates 有权
标题翻译：控制沉积在衬底上的III族氮化物膜的应力的方法
公开(公告)号：US09129977B2
公开(公告)日：2015-09-08
申请号：US13306763
申请日：2011-11-29
申请人： Hugues Marchand , Brendan J. Moran , Umesh K. Mishra , James S. Speck
发明人： Hugues Marchand , Brendan J. Moran , Umesh K. Mishra , James S. Speck
IPC分类号： H01L33/32 , H01L29/267 , H01L23/00 , C30B25/02 , C30B29/40 , H01L21/02 , H01L33/00 , H01L29/20 , H01L29/205 , H01L33/12
CPC分类号： H01L23/562 , C30B25/02 , C30B29/403 , C30B29/406 , H01L21/02378 , H01L21/02381 , H01L21/02458 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L29/2003 , H01L29/205 , H01L33/0025 , H01L33/0066 , H01L33/0075 , H01L33/12 , H01L33/32 , H01L2924/0002 , H01L2924/00
摘要： Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.
摘要翻译：公开了控制沉积在硅和碳化硅衬底上的GaN膜中的应力控制方法和由其制备的膜。典型的方法包括提供衬底并在衬底上沉积梯度的氮化镓层，其具有基本上连续等级的从初始组成到由生长室中的至少一种前体的供应形成的最终组成的变化的组成，而不会中断在供应。典型的半导体膜包括沉积在衬底上的衬底和梯度的氮化镓层，其具有从初始组成到最终组成的基本连续等级的变化的组成，其由在生长室中供应至少一种前体而形成，而不会中断在供应。

9. 发明授权

US08324637B2 High efficiency LEDs with tunnel junctions 有权
标题翻译：具有隧道结的高效率LED
公开(公告)号：US08324637B2
公开(公告)日：2012-12-04
申请号：US12782107
申请日：2010-05-18
申请人： James P. Ibbetson , Bernd P. Keller , Umesh K. Mishra
发明人： James P. Ibbetson , Bernd P. Keller , Umesh K. Mishra
IPC分类号： H01L27/15
CPC分类号： H01L33/04 , H01L33/0016 , H01L33/08 , H01L33/32
摘要： An LED made from a wide band gap semiconductor material and having a low resistance p-type confinement layer with a tunnel junction in a wide band gap semiconductor device is disclosed. A dissimilar material is placed at the tunnel junction where the material generates a natural dipole. This natural dipole is used to form a junction having a tunnel width that is smaller than such a width would be without the dissimilar material. A low resistance p-type confinement layer having a tunnel junction in a wide band gap semiconductor device may be fabricated by generating a polarization charge in the junction of the confinement layer, and forming a tunnel width in the junction that is smaller than the width would be without the polarization charge. Tunneling through the tunnel junction in the confinement layer may be enhanced by the addition of impurities within the junction. These impurities may form band gap states in the junction.
摘要翻译：公开了一种由宽带隙半导体材料制成的LED，并具有在宽带隙半导体器件中具有隧道结的低电阻p型约束层。不同的材料放置在材料产生天然偶极子的隧道结处。该天然偶极子用于形成隧道宽度小于不具有不同材料的宽度的接合点。在宽带隙半导体器件中具有隧道结的低电阻p型限制层可以通过在限制层的接合处产生极化电荷并在接合部中形成小于宽度的隧道宽度来制造没有极化电荷。可以通过在连接处添加杂质来增强通过限制层中的隧道结的隧穿。这些杂质可能在结中形成带隙状态。

10. 发明授权

US08193020B2 Method for heteroepitaxial growth of high-quality N-face GaN, InN, and AlN and their alloys by metal organic chemical vapor deposition 有权
标题翻译：高品质N面GaN，InN和AlN及其合金的金属有机化学气相沉积异质外延生长方法
公开(公告)号：US08193020B2
公开(公告)日：2012-06-05
申请号：US12466705
申请日：2009-05-15
申请人： Stacia Keller , Umesh K. Mishra , Nicholas K. Fichtenbaum
发明人： Stacia Keller , Umesh K. Mishra , Nicholas K. Fichtenbaum
IPC分类号： H01L21/20
CPC分类号： C30B25/02 , C30B29/403 , H01L21/02378 , H01L21/02381 , H01L21/0242 , H01L21/02433 , H01L21/02458 , H01L21/02538 , H01L21/0254 , H01L21/02573 , H01L21/0262
摘要： Methods for the heteroepitaxial growth of smooth, high quality films of N-face GaN film grown by MOCVD are disclosed. Use of a misoriented substrate and possibly nitridizing the substrate allow for the growth of smooth N-face GaN and other Group III nitride films as disclosed herein. The present invention also avoids the typical large (μm sized) hexagonal features which make N-face GaN material unacceptable for device applications. The present invention allows for the growth of smooth, high quality films which makes the development of N-face devices possible.
摘要翻译：公开了通过MOCVD生长的N面GaN薄膜的平滑，高质量薄膜异质外延生长的方法。使用错误取向的衬底并且可能使衬底氮化使得能够生长平滑的N面GaN和其他III族氮化物膜，如本文所公开的。本发明还避免了典型的大（μm尺寸）六边形特征，这使得N面GaN材料不适合于器件应用。本发明允许平滑，高质量的膜的生长，这使得N面装置的发展成为可能。

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