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1. 发明授权

US07202716B1 Apparatus and method of controlling and tuning a fine calibration for clock source synchronization in dual loop of hybrid phase and time domain 有权
标题翻译：在混合相位和时域的双回路中控制和调整精确校准用于时钟源同步的装置和方法
公开(公告)号：US07202716B1
公开(公告)日：2007-04-10
申请号：US11320254
申请日：2005-12-27
申请人： Tze-hsiang Chao , Chia-hao Yang , Chia-jung Liu
发明人： Tze-hsiang Chao , Chia-hao Yang , Chia-jung Liu
IPC分类号： H03L7/06
CPC分类号： H03L7/07 , H03L7/0812
摘要： An apparatus and a method of controlling and tuning clock phase alignment with a dual loop of a hybrid phase and time domain for clock source synchronization in electronic devices are described. The coarse calibration unit generates a plurality of output signals, the output signals having a plurality of fixed phase intervals therebetween. At least one of the fixed phase intervals is equal to complete 360 degrees which are divided by the number of the output signals to cover the phase range of complete 360 degrees. The first fine calibration unit connected to the coarse calibration unit delays the output signals generated from the coarse calibration unit by coupling a programmable delay circuit to adjust the phase of a feedback signal toward the phase of a reference signal. The phase detector connected to the first fine calibration unit is used to detect a phase difference between the reference and the feedback signals and outputting an indicating signal corresponding to the phase difference between the reference and the feedback signals. The controller controls the coarse calibration unit and the first fine calibration unit to align the feedback signal to the reference signal according to the indicating signal generated from the phase detector. The rotating detector rapidly tunes the phase difference between the feedback signal and the reference signal by adding a number of time delays to the feedback signal when the feedback signal and the reference signal are miss-aligned.
摘要翻译：描述了一种用于电子设备中的时钟源同步的混合相位和时域的双环控制和调谐时钟相位对准的装置和方法。粗略校准单元产生多个输出信号，输出信号之间具有多个固定相间隔。固定相位间隔中的至少一个等于完成360度，其除以输出信号的数量以覆盖完整360度的相位范围。连接到粗校准单元的第一精细校准单元通过耦合可编程延迟电路来延迟从粗校准单元生成的输出信号，以将反馈信号的相位调整到参考信号的相位。连接到第一精细校准单元的相位检测器用于检测参考和反馈信号之间的相位差，并输出与参考和反馈信号之间的相位差对应的指示信号。控制器控制粗略校准单元和第一精细校准单元，以根据从相位检测器产生的指示信号将反馈信号与参考信号对准。当反馈信号和参考信号错过对准时，旋转检测器通过向反馈信号添加多个时间延迟来快速调谐反馈信号和参考信号之间的相位差。

2. 发明申请

US20070090862A1 APPARATUS AND METHOD OF CONTROLLING AND TUNING A FINE CALIBRATION FOR CLOCK SOURCE SYNCHRONIZATION IN DUAL LOOP OF HYBRID PHASE AND TIME DOMAIN 有权
标题翻译：控制和调谐混合相位和时域双环中时钟源同步的精细校准的装置和方法
公开(公告)号：US20070090862A1
公开(公告)日：2007-04-26
申请号：US11320254
申请日：2005-12-27
申请人： Tze-hsiang Chao , Chia-hao Yang , Chia-jung Liu
发明人： Tze-hsiang Chao , Chia-hao Yang , Chia-jung Liu
IPC分类号： H03L7/06
CPC分类号： H03L7/07 , H03L7/0812
摘要： An apparatus and a method of controlling and tuning clock phase alignment with a dual loop of a hybrid phase and time domain for clock source synchronization in electronic devices are described. The coarse calibration unit generates a plurality of output signals, the output signals having a plurality of fixed phase intervals therebetween. At least one of the fixed phase intervals is equal to complete 360 degrees which are divided by the number of the output signals to cover the phase range of complete 360 degrees. The first fine calibration unit connected to the coarse calibration unit delays the output signals generated from the coarse calibration unit by coupling a programmable delay circuit to adjust the phase of a feedback signal toward the phase of a reference signal. The phase detector connected to the first fine calibration unit is used to detect a phase difference between the reference and the feedback signals and outputting an indicating signal corresponding to the phase difference between the reference and the feedback signals. The controller controls the coarse calibration unit and the first fine calibration unit to align the feedback signal to the reference signal according to the indicating signal generated from the phase detector. The rotating detector rapidly tunes the phase difference between the feedback signal and the reference signal by adding a number of time delays to the feedback signal when the feedback signal and the reference signal are miss-aligned.
摘要翻译：描述了一种用于电子设备中的时钟源同步的混合相位和时域的双环控制和调谐时钟相位对准的装置和方法。粗略校准单元产生多个输出信号，输出信号之间具有多个固定相间隔。固定相位间隔中的至少一个等于完成360度，其除以输出信号的数量以覆盖完整360度的相位范围。连接到粗校准单元的第一精细校准单元通过耦合可编程延迟电路来延迟从粗校准单元生成的输出信号，以将反馈信号的相位调整到参考信号的相位。连接到第一精细校准单元的相位检测器用于检测参考和反馈信号之间的相位差，并输出与参考和反馈信号之间的相位差对应的指示信号。控制器控制粗略校准单元和第一精细校准单元，以根据从相位检测器产生的指示信号将反馈信号与参考信号对准。当反馈信号和参考信号错过对准时，旋转检测器通过向反馈信号添加多个时间延迟来快速调谐反馈信号和参考信号之间的相位差。

3. 发明授权

US07411429B2 System and method for clock switching 有权
标题翻译：时钟切换的系统和方法
公开(公告)号：US07411429B2
公开(公告)日：2008-08-12
申请号：US11261880
申请日：2005-10-28
申请人： Chia-hao Yang , Tze-hsiang Chao
发明人： Chia-hao Yang , Tze-hsiang Chao
IPC分类号： G06F1/08
CPC分类号： G06F1/08
摘要： A system for clock-switching applied in the field of integrated circuits is described. A phase interpolator converts an input clock signal into a clock_A and a clock_B having a phase difference therebetween and transmitting the clock_A and the clock_B. A switch command unit connected to the phase interpolator receives either the clock_A or the clock_B serving as a triggering signal for triggering the switch command unit to transform an input switching signal into an output switching signal when the output switching signal is located in either a rising or a falling edge. A selecting device connected to the phase interpolator and the switch command unit, selects either clock_A or clock_B according to the output switching signal from the switch command unit to output a clock-switching signal composed of clock_A and clock_B.
摘要翻译：描述了在集成电路领域中应用的时钟切换系统。相位插值器将输入时钟信号转换成时钟A和时钟B，其间具有相位差，并发送时钟A和时钟B。连接到相位插值器的开关指令单元接收作为触发信号的时钟A或时钟B，用于触发开关指令单元，以在输出开关信号位于上升沿或下降沿时将输入切换信号变换为输出切换信号一个下降的边缘。连接到相位插值器和开关指令单元的选择装置根据来自开关指令单元的输出切换信号选择clock_A或clock_B，以输出由clock_A和clock_B组成的时钟切换信号。

4. 发明申请

US20070096774A1 System and method for clock switching 有权
标题翻译：时钟切换的系统和方法
公开(公告)号：US20070096774A1
公开(公告)日：2007-05-03
申请号：US11261880
申请日：2005-10-28
申请人： Chia-hao Yang , Tze-hsiang Chao
发明人： Chia-hao Yang , Tze-hsiang Chao
IPC分类号： G06F1/08
CPC分类号： G06F1/08
摘要： A system for clock-switching applied in the field of integrated circuits is described. A phase interpolator converts an input clock signal into a clock_A and a clock_B having a phase difference therebetween and transmitting the clock_A and the clock_B. A switch command unit connected to the phase interpolator receives either the clock_A or the clock_B serving as a triggering signal for triggering the switch command unit to transform an input switching signal into an output switching signal when the output switching signal is located in either a rising or a falling edge. A selecting device connected to the phase interpolator and the switch command unit, selects either clock_A or clock_B according to the output switching signal from the switch command unit to output a clock-switching signal composed of clock_A and clock_B.
摘要翻译：描述了在集成电路领域中应用的时钟切换系统。相位插值器将输入时钟信号转换成时钟A和时钟B，其间具有相位差，并发送时钟A和时钟B。连接到相位插值器的开关指令单元接收作为触发信号的时钟A或时钟B，用于触发开关指令单元，以在输出开关信号位于上升沿或下降沿时将输入切换信号变换为输出切换信号一个下降的边缘。连接到相位插值器和开关指令单元的选择装置根据来自开关指令单元的输出切换信号选择clock_A或clock_B，以输出由clock_A和clock_B组成的时钟切换信号。

5. 发明授权

US07183821B1 Apparatus and method of controlling clock phase alignment with dual loop of hybrid phase and time domain for clock source synchronization 有权
标题翻译：用于时钟源同步的混合相位和时域双环控制时钟相位对准的装置和方法
公开(公告)号：US07183821B1
公开(公告)日：2007-02-27
申请号：US11257258
申请日：2005-10-24
申请人： Tze-hsiang Chao , Chia-jung Liu
发明人： Tze-hsiang Chao , Chia-jung Liu
IPC分类号： H03L7/06
CPC分类号： H03L7/07 , H03L7/0812
摘要： An apparatus and a method of controlling clock phase alignment with a dual loop of a hybrid phase and time domain for clock source synchronization in electronic devices are described. The coarse calibration unit generates a plurality of output signals, the output signals having a plurality of phase intervals therebetween. A predetermined phase angle is divided by the number of the output signals to generate one of the phase intervals. The first fine calibration unit connected to the coarse calibration unit delays the output signals generated from the coarse calibration unit by coupling a programmable delay circuit to adjust the phase of a feedback signal toward the phase of a reference signal. The phase detector connected to the first fine calibration unit is used to detect a phase difference between the reference and the feedback signal and outputting an indicating signal corresponding to the phase difference between the reference and the feedback signal. The controller controls the coarse calibration unit and the first fine calibration unit to align the feedback signal to the reference signal according to the indicating signal generated from the phase detector.
摘要翻译：描述了用于电子设备中的时钟源同步的混合相位和时域的双回路控制时钟相位对准的装置和方法。粗略校准单元产生多个输出信号，输出信号之间具有多个相位间隔。将预定的相位角除以输出信号的数量以产生相位间隔之一。连接到粗校准单元的第一精细校准单元通过耦合可编程延迟电路来延迟从粗校准单元生成的输出信号，以将反馈信号的相位调整到参考信号的相位。连接到第一精细校准单元的相位检测器用于检测参考和反馈信号之间的相位差，并输出与参考和反馈信号之间的相位差对应的指示信号。控制器控制粗略校准单元和第一精细校准单元，以根据从相位检测器产生的指示信号将反馈信号与参考信号对准。

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