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1. 发明授权

US08288293B2 Integrated circuit fabrication using sidewall nitridation processes 有权
标题翻译：使用侧壁氮化工艺的集成电路制造
公开(公告)号：US08288293B2
公开(公告)日：2012-10-16
申请号：US12763963
申请日：2010-04-20
申请人： Tuan Pham , Sanghyun Lee , Masato Horiike , Klaus Schuegraf , Masaaki Higashitani , Keiichi Isono
发明人： Tuan Pham , Sanghyun Lee , Masato Horiike , Klaus Schuegraf , Masaaki Higashitani , Keiichi Isono
IPC分类号： H01L21/469
CPC分类号： H01L27/11548 , H01L21/2815 , H01L27/11529 , H01L29/66825
摘要： Semiconductor devices are provided with encapsulating films for protection of sidewall features during fabrication processes, such as etching to form isolation regions. In a non-volatile flash memory, for example, a trench isolation process is divided into segments to incorporate an encapsulating film along the sidewalls of charge storage material. A pattern is formed over the layer stack followed by etching the charge storage material to form strips elongated in the column direction across the substrate, with a layer of tunnel dielectric material therebetween. Before etching the substrate, an encapsulating film is formed along the sidewalls of the strips of charge storage material. The encapsulating film can protect the sidewalls of the charge storage material during subsequent cleaning, oxidation and etch processes. In another example, the encapsulating film is simultaneously formed while etching to form strips of charge storage material and the isolation trenches.
摘要翻译：半导体器件设置有用于在制造工艺期间保护侧壁特征的封装膜，例如蚀刻以形成隔离区域。在非易失性闪速存储器中，例如，沟槽隔离工艺被分成段以沿着电荷存储材料的侧壁并入封装膜。在层堆叠上形成图案，随后蚀刻电荷存储材料，以形成沿着衬底的列方向延伸的条带，其间具有隧道介电材料层。在蚀刻基板之前，沿着电荷存储材料条的侧壁形成封装膜。封装膜可以在随后的清洁，氧化和蚀刻工艺期间保护电荷存储材料的侧壁。在另一个实例中，同时形成封装膜，同时蚀刻以形成电荷存储材料条和隔离槽。

2. 发明申请

US20100270608A1 Integrated Circuits And Fabrication Using Sidewall Nitridation Processes 有权
标题翻译：集成电路和使用侧壁氮化工艺的制造
公开(公告)号：US20100270608A1
公开(公告)日：2010-10-28
申请号：US12763963
申请日：2010-04-20
申请人： Tuan Pham , Sanghyun Lee , Masato Horiike , Klaus Schuegraf , Masaaki Higashitani , Keiichi Isono
发明人： Tuan Pham , Sanghyun Lee , Masato Horiike , Klaus Schuegraf , Masaaki Higashitani , Keiichi Isono
IPC分类号： H01L29/792 , H01L21/28 , H01L21/76
CPC分类号： H01L27/11548 , H01L21/2815 , H01L27/11529 , H01L29/66825
摘要： Semiconductor devices are provided with encapsulating films for protection of sidewall features during fabrication processes, such as etching to form isolation regions. In a non-volatile flash memory, for example, a trench isolation process is divided into segments to incorporate an encapsulating film along the sidewalls of charge storage material. A pattern is formed over the layer stack followed by etching the charge storage material to form strips elongated in the column direction across the substrate, with a layer of tunnel dielectric material therebetween. Before etching the substrate, an encapsulating film is formed along the sidewalls of the strips of charge storage material. The encapsulating film can protect the sidewalls of the charge storage material during subsequent cleaning, oxidation and etch processes. In another example, the encapsulating film is simultaneously formed while etching to form strips of charge storage material and the isolation trenches.
摘要翻译：半导体器件设置有用于在制造工艺期间保护侧壁特征的封装膜，例如蚀刻以形成隔离区域。在非易失性闪速存储器中，例如，沟槽隔离工艺被分成段以沿着电荷存储材料的侧壁并入封装膜。在层堆叠上形成图案，随后蚀刻电荷存储材料，以形成沿着衬底的列方向延伸的条带，其间具有隧道介电材料层。在蚀刻基板之前，沿着电荷存储材料条的侧壁形成封装膜。封装膜可以在随后的清洁，氧化和蚀刻工艺期间保护电荷存储材料的侧壁。在另一个实例中，同时形成封装膜，同时蚀刻以形成电荷存储材料条和隔离槽。

3. 发明授权

US08853763B2 Integrated circuits with sidewall nitridation 有权
标题翻译：具有侧壁氮化的集成电路
公开(公告)号：US08853763B2
公开(公告)日：2014-10-07
申请号：US13607375
申请日：2012-09-07
申请人： Tuan Pham , Sanghyun Lee , Masato Horiike , Klaus Schuegraf , Masaaki Higashitani , Keiichi Isono
发明人： Tuan Pham , Sanghyun Lee , Masato Horiike , Klaus Schuegraf , Masaaki Higashitani , Keiichi Isono
IPC分类号： H01L29/76 , H01L27/115 , H01L29/66 , H01L21/28
CPC分类号： H01L27/11548 , H01L21/2815 , H01L27/11529 , H01L29/66825
摘要： Semiconductor devices are provided with encapsulating films for protection of sidewall features during fabrication processes, such as etching to form isolation regions. In a non-volatile flash memory, for example, a trench isolation process is divided into segments to incorporate an encapsulating film along the sidewalls of charge storage material. A pattern is formed over the layer stack followed by etching the charge storage material to form strips elongated in the column direction across the substrate, with a layer of tunnel dielectric material therebetween. Before etching the substrate, an encapsulating film is formed along the sidewalls of the strips of charge storage material. The encapsulating film can protect the sidewalls of the charge storage material during subsequent cleaning, oxidation and etch processes. In another example, the encapsulating film is simultaneously formed while etching to form strips of charge storage material and the isolation trenches.
摘要翻译：半导体器件设置有用于在制造工艺期间保护侧壁特征的封装膜，例如蚀刻以形成隔离区域。在非易失性闪速存储器中，例如，沟槽隔离工艺被分成段以沿着电荷存储材料的侧壁并入封装膜。在层堆叠上形成图案，随后蚀刻电荷存储材料，以形成沿着衬底的列方向延伸的条带，其间具有隧道介电材料层。在蚀刻基板之前，沿着电荷存储材料条的侧壁形成封装膜。封装膜可以在随后的清洁，氧化和蚀刻工艺期间保护电荷存储材料的侧壁。在另一个实例中，同时形成封装膜，同时蚀刻以形成电荷存储材料条和隔离槽。

4. 发明申请

US20120326220A1 Integrated Circuits With Sidewall Nitridation 有权
标题翻译：集成电路与侧壁氮化
公开(公告)号：US20120326220A1
公开(公告)日：2012-12-27
申请号：US13607375
申请日：2012-09-07
申请人： Tuan Pham , Sanghyun Lee , Masato Horiike , Klaus Schuegraf , Masaaki Higashitani , Keiichi Isono
发明人： Tuan Pham , Sanghyun Lee , Masato Horiike , Klaus Schuegraf , Masaaki Higashitani , Keiichi Isono
IPC分类号： H01L29/78
CPC分类号： H01L27/11548 , H01L21/2815 , H01L27/11529 , H01L29/66825
摘要： Semiconductor devices are provided with encapsulating films for protection of sidewall features during fabrication processes, such as etching to form isolation regions. In a non-volatile flash memory, for example, a trench isolation process is divided into segments to incorporate an encapsulating film along the sidewalls of charge storage material. A pattern is formed over the layer stack followed by etching the charge storage material to form strips elongated in the column direction across the substrate, with a layer of tunnel dielectric material therebetween. Before etching the substrate, an encapsulating film is formed along the sidewalls of the strips of charge storage material. The encapsulating film can protect the sidewalls of the charge storage material during subsequent cleaning, oxidation and etch processes. In another example, the encapsulating film is simultaneously formed while etching to form strips of charge storage material and the isolation trenches.
摘要翻译：半导体器件设置有用于在制造工艺期间保护侧壁特征的封装膜，例如蚀刻以形成隔离区域。在非易失性闪速存储器中，例如，沟槽隔离工艺被分成段以沿着电荷存储材料的侧壁并入封装膜。在层堆叠上形成图案，随后蚀刻电荷存储材料，以形成沿着衬底的列方向延伸的条带，其间具有隧道介电材料层。在蚀刻基板之前，沿着电荷存储材料条的侧壁形成封装膜。封装膜可以在随后的清洁，氧化和蚀刻工艺期间保护电荷存储材料的侧壁。在另一个实例中，同时形成封装膜，同时蚀刻以形成电荷存储材料条和隔离槽。

5. 发明授权

US08260057B2 Image processing apparatus that obtains a ruled line from a multi-value image 有权
标题翻译：从多值图像获得划线的图像处理装置
公开(公告)号：US08260057B2
公开(公告)日：2012-09-04
申请号：US12216098
申请日：2008-06-30
申请人： Fumihiro Hasegawa , Keiichi Isono
发明人： Fumihiro Hasegawa , Keiichi Isono
IPC分类号： G06K9/48 , G06K9/34 , G06K9/40 , H04N1/40
CPC分类号： G06K9/346
摘要： In an image processing apparatus, a binary image generating unit generates a binary image from a multi-value image, a ruled line candidate extracting unit extracts ruled line candidate pixels constituting a ruled line from the binary image, an edge detecting unit determines, from the multi-value image, target pixels that are positioned near the ruled line candidate pixels and detects edge information indicative of whether each target pixel constitutes an edge, and a ruled line obtaining unit obtains a ruled line from the multi-value image based on the edge information detected by the edge detecting unit.
摘要翻译：在图像处理装置中，二进制图像生成单元从多值图像生成二值图像，划线候选提取单元从二值图像提取构成格线的划线候补像素，边缘检测单元从多值图像，位于格线候选像素附近的目标像素，并检测表示每个目标像素是否构成边缘的边缘信息，并且格线获取单元基于边缘从多值图像获得格线由边缘检测单元检测的信息。

6. 发明申请

US20090016613A1 Image processing apparatus, image processing method, and computer program product 有权
标题翻译：图像处理装置，图像处理方法和计算机程序产品
公开(公告)号：US20090016613A1
公开(公告)日：2009-01-15
申请号：US12216098
申请日：2008-06-30
申请人： Fumihiro Hasegawa , Keiichi Isono
发明人： Fumihiro Hasegawa , Keiichi Isono
IPC分类号： G06K9/48
CPC分类号： G06K9/346
摘要： In an image processing apparatus, a binary image generating unit generates a binary image from a multi-value image, a ruled line candidate extracting unit extracts ruled line candidate pixels constituting a ruled line from the binary image, an edge detecting unit determines, from the multi-value image, target pixels that are positioned near the ruled line candidate pixels and detects edge information indicative of whether each target pixel constitutes an edge, and a ruled line obtaining unit obtains a ruled line from the multi-value image based on the edge information detected by the edge detecting unit.
摘要翻译：在图像处理装置中，二进制图像生成单元从多值图像生成二值图像，划线候选提取单元从二值图像提取构成格线的划线候补像素，边缘检测单元从多值图像，位于格线候选像素附近的目标像素，并检测表示每个目标像素是否构成边缘的边缘信息，并且格线获取单元基于边缘从多值图像获得格线由边缘检测单元检测的信息。

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