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    • 2. 发明授权
    • Semiconductor device having high dielectric constant gate insulating layer and its manufacture method
    • 具有高介电常数栅极绝缘层的半导体器件及其制造方法
    • US07265401B2
    • 2007-09-04
    • US11148317
    • 2005-06-09
    • Masaomi YamaguchiHiroshi MinakataTsunehisa SakodaKazuto Ikeda
    • Masaomi YamaguchiHiroshi MinakataTsunehisa SakodaKazuto Ikeda
    • H01L29/94
    • H01L29/517H01L21/28185H01L21/28194H01L21/823857H01L29/513
    • A semiconductor device manufacture method has the steps of: (a) forming an interface layer of SiO or SiON on the surface of an active region of a silicon substrate; (b) forming a high dielectric constant gate insulating film such as HfSiON having a dielectric constant higher than that of silicon oxide, above the interface layer; (c) forming a gate electrode of polysilicon above the high dielectric constant gate insulating film; (d) passivating the substrate surface at least before or after the high dielectric constant gate insulating film is formed; (e) forming an insulated gate electrode structure by patterning at least the gate electrode and the high dielectric constant gate insulating film; and (f) forming source/drain regions in the active region on both sides of the insulated gate electrode structure. The semiconductor device has the high dielectric constant insulating film having a dielectric constant higher than that of silicon oxide.
    • 半导体器件制造方法具有以下步骤:(a)在硅衬底的有源区的表面上形成SiO或SiON的界面层; (b)在界面层之上形成介电常数高于氧化硅的介电常数的诸如HfSiON的高介电常数栅极绝缘膜; (c)在高介电常数栅极绝缘膜上方形成多晶硅栅电极; (d)至少在形成高介电常数栅极绝缘膜之前或之后使基板表面钝化; (e)通过至少构图栅电极和高介电常数栅极绝缘膜来形成绝缘栅电极结构; 和(f)在绝缘栅电极结构两侧的有源区中形成源/漏区。 半导体器件具有介电常数比氧化硅高的介电常数绝缘膜。