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1. 发明授权

US07487065B2 Executing an overall quantity of data processing within an overall processing period 失效
标题翻译：在整个处理期内执行总体数据处理量
公开(公告)号：US07487065B2
公开(公告)日：2009-02-03
申请号：US11008791
申请日：2004-12-09
申请人： Troy David Armstrong , Naresh Nayar , Gary Ross Ricard
发明人： Troy David Armstrong , Naresh Nayar , Gary Ross Ricard
IPC分类号： G06F3/01
CPC分类号： G06F9/485 , G06F9/4881
摘要： Exemplary methods, systems, and products are described for executing an overall quantity of data processing within an overall processing period that include executing repeatedly through a series of iterations a portion of the overall quantity of data processing that can be completed in a set processing period, wherein each iteration includes the set processing period and a variable delay period and calculating the variable delay period for an iteration in dependence upon the set processing period, a portion of the overall quantity of data processing performed during the set processing period of the iteration, the overall quantity of data processing, and the overall processing period.
摘要翻译：描述了用于在整个处理周期内执行总体数据处理的示例性方法，系统和产品，其包括通过一系列迭代重复地执行可以在设定的处理周期内完成的整个数据处理量的一部分，其中每次迭代包括设置处理周期和可变延迟周期，并且根据设定的处理周期计算迭代的可变延迟周期，在迭代的设置处理周期期间执行的总数量处理的一部分，总体数据处理量和总体处理时间。

2. 发明授权

US07275180B2 Transparent replacement of a failing processor 失效
标题翻译：透明地更换故障处理器
公开(公告)号：US07275180B2
公开(公告)日：2007-09-25
申请号：US10418598
申请日：2003-04-17
申请人： William Joseph Armstrong , Naresh Nayar , Gary Ross Ricard
发明人： William Joseph Armstrong , Naresh Nayar , Gary Ross Ricard
IPC分类号： G06F11/00 , G06F11/20
CPC分类号： G06F11/203 , G06F11/2028 , G06F11/2041 , G06F11/2046
摘要： Methods, systems, and articles of manufacture for replacement of a failing processor of a multi-processor system running at least one operating system are provided. In contrast to the prior art, the replacement may be performed by system firmware without intervention by the operating system (i.e., the replacement may be transparent to the operating system). For some embodiments, the multi-processor system may be logically partitioned and the methods may be utilized to replace one or more shared or dedicated processors assigned to a logical partition, transparent to an operating system running on the partition.
摘要翻译：提供了用于替代运行至少一个操作系统的多处理器系统故障处理器的方法，系统和制品。与现有技术相反，替换可以由系统固件执行，而不需要操作系统的干预（即，替换可能对操作系统是透明的）。对于一些实施例，多处理器系统可以被逻辑地分区，并且该方法可以用于替换分配给逻辑分区的一个或多个共享或专用处理器，对于在分区上运行的操作系统是透明的。

3. 发明申请

US20090282210A1 Partition Transparent Correctable Error Handling in a Logically Partitioned Computer System 失效
标题翻译：在逻辑分区计算机系统中的分区透明可纠正错误处理
公开(公告)号：US20090282210A1
公开(公告)日：2009-11-12
申请号：US12115613
申请日：2008-05-06
申请人： Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
发明人： Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
IPC分类号： G06F12/00
CPC分类号： G06F13/28
摘要： A method and apparatus for transparently handling recurring correctable errors to prevent costly system shutdowns for correctable memory errors or system failures from uncorrectable memory errors. When a high number of correctable errors are detected for a given memory location, the hypervisor moves the data associated with the memory location to an alternate physical memory location transparently to the partition such that the partition has no knowledge that the physical memory actualizing the memory location has been changed. Similarly, the hypervisor can move direct memory access (DMA) memory locations using an I/O translation table.
摘要翻译：一种用于透明地处理重复的可纠正错误以防止由于不可校正的存储器错误而导致的可校正的存储器错误或系统故障的昂贵的系统关闭的方法和装置。当对于给定的存储器位置检测到大量可校正错误时，管理程序将与存储器位置相关联的数据透明地移动到备用物理存储器位置到分区，使得分区不知道物理存储器实现存储器位置已经变了。类似地，管理程序可以使用I / O转换表移动直接存储器访问（DMA）存储器位置。

4. 发明授权

US08407515B2 Partition transparent memory error handling in a logically partitioned computer system with mirrored memory 有权
标题翻译：在具有镜像内存的逻辑分区计算机系统中分区透明内存错误处理
公开(公告)号：US08407515B2
公开(公告)日：2013-03-26
申请号：US12115625
申请日：2008-05-06
申请人： Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
发明人： Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
IPC分类号： G06F11/00
CPC分类号： G06F11/2082 , G06F11/2094
摘要： A method and apparatus for transparently handling recurring correctable errors and uncorrectable errors in a mirrored memory system prevents costly system shutdowns for correctable memory errors or system failures from uncorrectable memory errors. When a high number of correctable errors are detected for a given memory location, a memory relocation mechanism in the hypervisor moves the data associated with the memory location to an alternate physical memory location transparently to the partition such that the partition has no knowledge that the physical memory actualizing the memory location has been changed. When a correctable error occurs, the memory relocation mechanism uses data from a partner mirrored memory block as a data source for the memory block with the uncorrectable error and then relocates the data to a newly allocated memory block to replace the memory block with the uncorrectable error.
摘要翻译：用于透明地处理镜像存储器系统中的可重复校正错误和不可校正错误的方法和装置防止由于不可校正的存储器错误而导致的可校正存储器错误或系统故障的昂贵的系统关闭。当对于给定的存储器位置检测到大量的可校正错误时，管理程序中的存储器重定位机制将与存储器位置相关联的数据透明地移动到备用物理存储器位置到分区，使得分区不知道物理内存实现内存位置已更改。当发生可纠正错误时，内存重定位机制使用来自伙伴镜像内存块的数据作为具有不可校正错误的存储器块的数据源，然后将数据重新定位到新分配的存储器块以用不可校正的错误来替换存储器块。

5. 发明授权

US08255639B2 Partition transparent correctable error handling in a logically partitioned computer system 失效
标题翻译：逻辑分区计算机系统中的分区透明可校正错误处理
公开(公告)号：US08255639B2
公开(公告)日：2012-08-28
申请号：US12115613
申请日：2008-05-06
申请人： Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
发明人： Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
IPC分类号： G06F12/16 , G06F12/06
CPC分类号： G06F13/28
摘要： A method and apparatus for transparently handling recurring correctable errors to prevent costly system shutdowns for correctable memory errors or system failures from uncorrectable memory errors. When a high number of correctable errors are detected for a given memory location, the hypervisor moves the data associated with the memory location to an alternate physical memory location transparently to the partition such that the partition has no knowledge that the physical memory actualizing the memory location has been changed. Similarly, the hypervisor can move direct memory access (DMA) memory locations using an I/O translation table.
摘要翻译：一种用于透明地处理重复的可纠正错误以防止由于不可校正的存储器错误而导致的可校正的存储器错误或系统故障的昂贵的系统关闭的方法和装置。当对于给定的存储器位置检测到大量可校正错误时，管理程序将与存储器位置相关联的数据透明地移动到备用物理存储器位置到分区，使得分区不知道物理存储器实现存储器位置已经变了。类似地，管理程序可以使用I / O转换表移动直接存储器访问（DMA）存储器位置。

6. 发明申请

US20090282300A1 Partition Transparent Memory Error Handling in a Logically Partitioned Computer System With Mirrored Memory 有权
标题翻译：在具有镜像内存的逻辑分区计算机系统中分区透明内存错误处理
公开(公告)号：US20090282300A1
公开(公告)日：2009-11-12
申请号：US12115625
申请日：2008-05-06
申请人： Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
发明人： Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
IPC分类号： G06F11/07
CPC分类号： G06F11/2082 , G06F11/2094
摘要： A method and apparatus for transparently handling recurring correctable errors and uncorrectable errors in a mirrored memory system prevents costly system shutdowns for correctable memory errors or system failures from uncorrectable memory errors. When a high number of correctable errors are detected for a given memory location, a memory relocation mechanism in the hypervisor moves the data associated with the memory location to an alternate physical memory location transparently to the partition such that the partition has no knowledge that the physical memory actualizing the memory location has been changed. When a correctable error occurs, the memory relocation mechanism uses data from a partner mirrored memory block as a data source for the memory block with the uncorrectable error and then relocates the data to a newly allocated memory block to replace the memory block with the uncorrectable error.
摘要翻译：用于透明地处理镜像存储器系统中的可重复校正错误和不可校正错误的方法和装置防止由于不可校正的存储器错误而导致的可校正存储器错误或系统故障的昂贵的系统关闭。当对于给定的存储器位置检测到大量的可校正错误时，管理程序中的存储器重定位机制将与存储器位置相关联的数据透明地移动到备用物理存储器位置到分区，使得分区不知道物理内存实现内存位置已更改。当发生可纠正错误时，内存重定位机制使用来自伙伴镜像内存块的数据作为具有不可校正错误的存储器块的数据源，然后将数据重新定位到新分配的存储器块以用不可校正的错误来替换存储器块。

7. 发明申请

US20090112518A1 Executing An Overall Quantity Of Data Processing Within An Overall Processing Period 有权
标题翻译：在整个处理期间执行总体数据处理量
公开(公告)号：US20090112518A1
公开(公告)日：2009-04-30
申请号：US12349877
申请日：2009-01-07
申请人： Troy David Armstrong , Naresh Nayar , Gary R. Ricard
发明人： Troy David Armstrong , Naresh Nayar , Gary R. Ricard
IPC分类号： G06F11/30
CPC分类号： G06F9/485 , G06F9/4881
摘要： Exemplary methods, systems, and products are described for executing an overall quantity of data processing within an overall processing period that include executing repeatedly through a series of iterations a portion of the overall quantity of data processing that can be completed in a set processing period, wherein each iteration includes the set processing period and a variable delay period and calculating the variable delay period for an iteration in dependence upon the set processing period, a portion of the overall quantity of data processing performed during the set processing period of the iteration, the overall quantity of data processing, and the overall processing period.
摘要翻译：描述了用于在整个处理周期内执行总体数据处理的示例性方法，系统和产品，其包括通过一系列迭代重复地执行可以在设定的处理周期内完成的整个数据处理量的一部分，其中每次迭代包括设置处理周期和可变延迟周期，并且根据设定的处理周期计算迭代的可变延迟周期，在迭代的设置处理周期期间执行的总数量处理的一部分，总体数据处理量和总体处理时间。

8. 发明授权

US07111200B2 Apparatus and method for debugging a logical partition 有权
标题翻译：用于调试逻辑分区的装置和方法
公开(公告)号：US07111200B2
公开(公告)日：2006-09-19
申请号：US10418323
申请日：2003-04-17
申请人： Troy David Armstrong , William Joseph Armstrong , Tracy Bashore , George F. Eckman , Naresh Nayar
发明人： Troy David Armstrong , William Joseph Armstrong , Tracy Bashore , George F. Eckman , Naresh Nayar
IPC分类号： G06F11/00 , G06F11/36
CPC分类号： G06F11/362
摘要： A logical partition debugger allows debugging one logical partition in a computer system without requiring the shutdown of other logical partitions. The logical partition debugger is implemented in software in the partition manager. The logical partition debugger provides many common debug functions known in existing hardware and software debuggers, but does so in a manner that only the partition being debugged is affected.
摘要翻译：逻辑分区调试器允许在计算机系统中调试一个逻辑分区，而不需要关闭其他逻辑分区。逻辑分区调试器在分区管理器中的软件中实现。逻辑分区调试器提供了现有硬件和软件调试器中已知的许多常见的调试功能，但这样做的方式只有被调试的分区受到影响。

9. 发明授权

US06467007B1 Processor reset generated via memory access interrupt 失效
标题翻译：通过存储器访问中断产生处理器复位
公开(公告)号：US06467007B1
公开(公告)日：2002-10-15
申请号：US09314769
申请日：1999-05-19
申请人： Troy David Armstrong , William Joseph Armstrong , Naresh Nayar , Kenneth Charles Vossen
发明人： Troy David Armstrong , William Joseph Armstrong , Naresh Nayar , Kenneth Charles Vossen
IPC分类号： G06F1324
CPC分类号： G06F11/0712 , G06F1/24 , G06F11/073 , G06F11/0793
摘要： An apparatus, program product, and method utilize a memory access interrupt to effect a reset of a processor in a multi-processor environment. Specifically, a source processor is permitted to initiate a reset of a target processor simply by generating both a reset request and a memory access interrupt for the target processor. The target processor is then specifically configured to detect the presence of a pending reset request during handing of the memory access interrupt, such that the target processor will perform a reset operation responsive to detection of such a request.
摘要翻译：一种装置，程序产品和方法利用存储器访问中断来实现多处理器环境中的处理器的复位。具体来说，源处理器被简单地通过产生目标处理器的复位请求和存储器访问中断来允许目标处理器的复位。然后，目标处理器被特别地配置成在处理存储器访问中断期间检测到待处理复位请求的存在，使得目标处理器将响应于对这种请求的检测而执行复位操作。

10. 发明授权

US06711700B2 Method and apparatus to monitor the run state of a multi-partitioned computer system 有权
标题翻译：监视多分区计算机系统的运行状态的方法和装置
公开(公告)号：US06711700B2
公开(公告)日：2004-03-23
申请号：US09840345
申请日：2001-04-23
申请人： Troy David Armstrong , William Joseph Armstrong , Stephanie Maria Forsman , Naresh Nayar , Jeffrey Jay Scheel , Andy Wottreng
发明人： Troy David Armstrong , William Joseph Armstrong , Stephanie Maria Forsman , Naresh Nayar , Jeffrey Jay Scheel , Andy Wottreng
IPC分类号： G06F1100
CPC分类号： G06F11/1441 , G06F11/0712 , G06F11/0724 , G06F11/0757
摘要： An apparatus and method for monitoring the state of a computer system running multiple operating systems shared by a partition manager is provided. A dedicated service processor monitors the individual run state condition of a plurality of processors running a plurality of operating systems. The service processor executes a routine to poll a memory location in each processor in the system to determine if the processor has entered an error loop with interrupts disabled. If any one of the plurality of processors are in an error loop, the service processor executes a routine to send a non-maskable interrupt to the looped processor so that the partition manager may regain control of the processor.
摘要翻译：提供了一种监视由分区管理器共享的运行多个操作系统的计算机系统的状态的装置和方法。专用服务处理器监视运行多个操作系统的多个处理器的各个运行状态条件。服务处理器执行例程来轮询系统中的每个处理器中的存储器位置，以确定处理器是否已经进入了具有禁止中断的错误循环。如果多个处理器中的任何一个处于错误循环中，则服务处理器执行例程以将不可屏蔽的中断发送到循环的处理器，使得分区管理器可以重新获得处理器的控制。

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